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91.发明申请公开(公告)号：US20040137169A1
公开(公告)日：2004-07-15
申请号：US10686556
申请日：2003-10-14
发明人： Enzo Carollo
IPC分类号： H05H001/24
CPC分类号： H01L21/3145 , C23C16/345 , C23C16/455 , C23C16/507 , H01L21/3144 , H01L21/3185
摘要： A high-density plasma process is proposed for depositing a layer of Silicon Nitride on a substrate in a plasma reactor. The process includes the steps of: providing a gas including precursor components of the Silicon Nitride, generating a plasma applying a radio-frequency power to the gas, and the plasma reacting with the substrate to deposit the layer of Silicon Nitride. The power applied to the gas is in the range from 2.5 kW to 4 kW.
摘要翻译： 提出了一种高等离子体工艺，用于在等离子体反应器中的衬底上沉积氮化硅层。 该方法包括以下步骤：提供包括氮化硅的前体成分的气体，产生对气体施加射频功率的等离子体，并且等离子体与衬底反应以沉积氮化硅层。 施加到气体的功率在2.5kW至4kW的范围内。
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92.发明申请公开(公告)号：US20040135908A1
公开(公告)日：2004-07-15
申请号：US10696396
申请日：2003-10-29
发明人： Francesco Pappalardo , Alessandro Capra , Massimo Mancuso , Herve Broquin , Paolo Antonino Fodera , Elena Salurso
IPC分类号： H04N005/335
CPC分类号： H04N1/648
摘要： Digital video signals, such as the signals generated by an image sensor in a Bayer format, are converted into an encoded format. In the Bayer format, the pixels of each line are alternately coded with two colors, and then converted into the encoded format. In the encoded format, the pixels of the digital video signals are reordered into sets of adjacent pixels, such that the sets group pixels coded with the same color. The encoded signal data results in a reduced switching activity when transmitted over a bus.
摘要翻译： 诸如由拜耳格式的图像传感器产生的信号的数字视频信号被转换成编码格式。 在拜耳格式中，每行的像素被交替地用两种颜色编码，然后被转换为编码格式。 在编码格式中，将数字视频信号的像素重新排列成相邻像素的集合，使得组合像素以相同颜色编码。 编码的信号数据在总线上传输时导致切换活动降低。
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93.发明申请Method and relative circuit for incrementing, decrementing or two's complementing a bit string 有权用于递增，递减或二进制补码的方法和相关电路公开(公告)号：US20040073586A1
公开(公告)日：2004-04-15
申请号：US10651075
申请日：2003-08-28
发明人： Daniele Lo Iacono
IPC分类号： G06F007/38
CPC分类号： G06F7/5055 , G06F7/48 , G06F7/49921
摘要： A method for incrementing, decrementing or two's complementing a first string of bits includes generating an auxiliary string of bits as a function of the first string, and logically combining the auxiliary string with the first string to generate a corresponding output string. A least significant bit of the auxiliary string is independent from the bits of the first string, and any other bit of the auxiliary string. The method is particularly convenient for generating an overflow flag when the number to be output exceeds the representation interval. An overflow flag is generated by logically combining the most significant bits of the first and auxiliary strings.
摘要翻译： 用于递增，递减或二进制补码第一比特串的方法包括生成辅助字符串作为第一字符串的函数，并将辅助字符串与第一字符串逻辑组合以生成相应的输出字符串。 辅助字符串的最低有效位与第一个字符串的位和辅助字符串的任何其他位无关。 当要输出的数字超过表示间隔时，该方法特别方便生成溢出标志。 通过逻辑组合第一和辅助字符串的最高有效位来产生溢出标志。
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94.发明申请Method for detecting the null current condition in a PWM driven inductor and a relative driving circuit 有权用于检测PWM驱动电感器和相对驱动电路中的零电流状态的方法公开(公告)号：US20040036450A1
公开(公告)日：2004-02-26
申请号：US10438192
申请日：2003-05-14
IPC分类号： G05F001/10
CPC分类号： H02M1/4225 , Y02B70/126 , Y02P80/112
摘要： A method for detecting a null current condition in a PWM driven inductor connected between a voltage source node and a second circuit node of a line for outputting current to a load includes generating a derivative signal by time differentiating a voltage on the second node. The method further includes monitoring an instant when the derivative signal becomes negative, and signaling verification of the null current condition each time the derivative signal becomes negative.
摘要翻译： 用于检测连接在用于向负载输出电流的线路的电压源节点和第二电路节点之间的PWM驱动电感器中的零电流状态的方法包括通过时间微分第二节点上的电压来产生导数信号。 该方法还包括监视导数信号变为负的瞬间，以及每当导数信号变为负时，对零电流状态的信令验证。
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95.发明申请公开(公告)号：US20040027454A1
公开(公告)日：2004-02-12
申请号：US10462090
申请日：2003-06-13
发明人： Filippo Vella , Massimo Mancuso
IPC分类号： H04N007/18
CPC分类号： G06T7/215
摘要： A method of estimating a global motion vector representative of the motion of a first digital image with respect to a second digital image, the first and the second image forming part of a sequence of images and being made up of, respectively, a first and a second pixel matrix. The method estimates the global motion vector on the basis of the estimate of at least one motion vector of at least one region of the first image representative of the motion of the at least one region from the first image to the second image and comprising phases of: subdividing the at least one region of the first image into a plurality of pixel blocks, assigning to each block of the plurality a respective weighting coefficient calculated on the basis of a respective inhomogeneity measure, and estimating the at least one motion vector of said at least one region on the basis of the weighting coefficients assigned to each block of the at least one region.
摘要翻译： 一种估计表示第一数字图像相对于第二数字图像的运动的全局运动矢量的方法，所述第一和第二图像形成图像序列的一部分，并且分别由第一和第二数字图像构成 第二像素矩阵。 该方法基于对从第一图像到第二图像的至少一个区域的运动的第一图像的至少一个区域的至少一个运动矢量的估计来估计全局运动矢量，并且包括 将所述第一图像的至少一个区域细分为多个像素块，向所述多个像素块中的至少一个运动矢量分配所述多个像素块中的所述至少一个运动矢量， 基于分配给所述至少一个区域的每个块的加权系数的至少一个区域。
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96.发明申请Assembly structure for electronic power integrated circuit formed on a semiconductor die and corresponding manufacturing process 有权在半导体芯片上形成的电子集成电路的组装结构和相应的制造过程公开(公告)号：US20030209783A1
公开(公告)日：2003-11-13
申请号：US10369114
申请日：2003-02-18
发明人： Paolo Casati , Amedeo Maierna , Bruno Murari
IPC分类号： H01L023/552
CPC分类号： H01L23/49568 , H01L23/4334 , H01L23/49503 , H01L23/552 , H01L2224/83855 , H01L2924/01079 , H01L2924/01322 , H01L2924/3025
摘要： An assembly structure for an electronic integrated power circuit, which circuit is fabricated on a semiconductor die having a plurality of contact pads associated with said integrated circuit and connected electrically to respective leads of said structure, wherein a shield element is coupled thermally to said die by a layer of an adhesive material.
摘要翻译： 一种用于电子集成电力电路的组装结构，该电路制造在具有与所述集成电路相关联的多个接触焊盘并且电连接到所述结构的相应引线的半导体管芯上，其中屏蔽元件通过 一层粘合剂材料。
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97.发明申请Process for manufacturing an SOI wafer by annealing and oxidation of buried channels 有权通过掩埋通道的退火和氧化来制造SOI晶片的工艺公开(公告)号：US20030168711A1
公开(公告)日：2003-09-11
申请号：US10327702
申请日：2002-12-20
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L029/00
CPC分类号： H01L21/76283 , H01L21/3003 , H01L21/3247 , H01L21/76289 , H01L21/764 , H01L29/0649 , Y10S438/967
摘要： A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.
摘要翻译： 一种制造SOI晶片的方法，包括以下步骤：在半导体材料的晶片中形成限定半导体材料结构的空腔; 通过热过程稀释结构; 并完全氧化结构。
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98.发明申请公开(公告)号：US20030149538A1
公开(公告)日：2003-08-07
申请号：US10329988
申请日：2002-12-26
IPC分类号： G01R035/00
摘要： A method of self-calibrating a modulator includes at least one integrator likely to incur a phase error may include reading a pulse response of the modulator, calculating a phase error parameter of the at least one integrator, and calibrating the phase error parameter. In addition, the calibration may provide a count of pulse response samples above suitable threshold values, as well as a change in the value of a capacitor associated with the integrator based upon the sample count.
摘要翻译： 自校准调制器的方法包括可能引起相位误差的至少一个积分器可以包括读取调制器的脉冲响应，计算至少一个积分器的相位误差参数，以及校准相位误差参数。 此外，校准可以提供高于合适阈值的脉冲响应样本的计数，以及基于样本计数与积分器相关联的电容器的值的变化。
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99.发明申请Power supply circuit structure for a row decoder of a multilevel non-volatile memory device 有权用于多电平非易失性存储器件的行解码器的电源电路结构公开(公告)号：US20030147290A1
公开(公告)日：2003-08-07
申请号：US10334126
申请日：2002-12-30
发明人： Rino Micheloni , Giovanni Campardo
IPC分类号： G11C007/00
CPC分类号： G11C11/5621 , G11C8/14 , G11C11/56 , G11C16/08 , G11C16/30
摘要： A power supply circuit structure is useful with a row decoder for reading/writing data from/into memory cells of an integrated electrically programmable/erasable non-volatile memory device incorporating an array of multilevel memory cells. Advantageously, multiple supply voltages to the row decoder and a switching circuit for transferring the voltages over hierarchic-mode enabled conduction paths are provided.
摘要翻译： 电源电路结构对于包含多层存储器单元阵列的集成电可编程/可擦除非易失性存储器件的/从存储单元读/写数据的行解码器是有用的。 有利地，提供了对行解码器的多个电源电压和用于将电压传送到分层模式使能的传导路径的开关电路。
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公开(公告)号：US20030143773A1
公开(公告)日：2003-07-31
申请号：US10293980
申请日：2002-11-12
IPC分类号： H01L021/00 , H01L021/44 , H01L021/48 , H01L021/50
CPC分类号： B81C1/00333
摘要： A process for the fabrication of devices that integrate protected microstructures, comprising the following steps: forming, in a body of semiconductor material, at least one microstructure having at least one first portion and one second portion which are relatively mobile with respect to one another and are separated from one another by at least one gap region, which is accessible through a face of the body; and sealing the gap. The sealing step includes depositing on the face of the body a layer of protective material, in such a way as to close the gap region, the protective layer being such as to enable relative motion between the first portion and the second portion of the microstructure.
摘要翻译： 一种用于制造整合受保护微结构的器件的方法，包括以下步骤：在半导体材料体中形成至少一个具有至少一个第一部分和一个第二部分的微结构，所述第一部分和第二部分相对于彼此相对移动， 通过至少一个间隙区域彼此分离，所述间隙区域可通过身体的面部接近; 并密封间隙。 所述密封步骤包括在所述主体的表面上沉积一层保护材料，以使得所述间隙区域闭合，所述保护层能够使所述微结构的第一部分和第二部分之间相对运动。
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