公开(公告)号：US06818956B2

公开(公告)日：2004-11-16

申请号：US10643335

申请日：2003-08-15

申请人： Tung-Cheng Kuo ,  Chien-Hung Liu ,  Shyi-Shuh Pan ,  Shou-Wei Huang

发明人： Tung-Cheng Kuo ,  Chien-Hung Liu ,  Shyi-Shuh Pan ,  Shou-Wei Huang

IPC分类号： H01L2362

CPC分类号： H01L29/792 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/11568 ,  H01L29/66833

摘要： A nonvolatile read-only memory device, wherein a word line is on a substrate and the word line includes a metal layer and a polysilicon line. A trapping layer is further located between the word line and the substrate. A polysilicon protection line is formed over the substrate and the polysilicon protection line connects the word line and a grounded doped region in the substrate, wherein the resistance of the polysilicon protection line is higher than that of the word line.

摘要翻译： 一种非易失性只读存储器件，其中字线在衬底上，字线包括金属层和多晶硅线。 捕获层还位于字线和基板之间。 多晶硅保护线形成在衬底上，多晶硅保护线连接字线和衬底中的接地掺杂区，其中多晶硅保护线的电阻高于字线的电阻。

公开(公告)号：US06680227B2

公开(公告)日：2004-01-20

申请号：US10134223

申请日：2002-04-25

申请人： Tung-Cheng Kuo ,  Chien-Hung Liu ,  Shyi-Shuh Pan ,  Shou-Wei Huang

发明人： Tung-Cheng Kuo ,  Chien-Hung Liu ,  Shyi-Shuh Pan ,  Shou-Wei Huang

IPC分类号： H01L218238

CPC分类号： H01L29/792 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/11568 ,  H01L29/66833

摘要： A nonvolatile read-only memory device, wherein a word line is on a substrate and the word line includes a metal layer a polysilicon line. A trapping layer is further located between the word line and the substrate. A polysilicon protection line is formed over the substrate and the polysilicon protection line connects the word line and a grounded doped region in the substrate, wherein the resistance of the polysilicon protection line is higher than that of the word line.

公开(公告)号：US06448137B1

公开(公告)日：2002-09-10

申请号：US09682941

申请日：2001-11-02

申请人： Erh-Kun Lai ,  Chien-Hung Liu ,  Shyi-Shuh Pan ,  Shou-Wei Huang ,  Ying-Tso Chen

发明人： Erh-Kun Lai ,  Chien-Hung Liu ,  Shyi-Shuh Pan ,  Shou-Wei Huang ,  Ying-Tso Chen

IPC分类号： H01L218247

CPC分类号： H01L27/11568 ,  H01L27/0629 ,  H01L27/105 ,  H01L27/11573 ,  Y10S438/981

摘要： A method of forming an NROM comprising mixed-signal circuits is provided. The method starts by providing a semiconductor substrate having a memory area and a periphery area. The periphery area has a plurality of active areas isolated by an isolation layer. A bottom electrode of a capacitor is formed atop the isolation layer in the periphery area. An ONO(oxide-nitride-oxide) process is performed. A photolithography, an anisotropic etching, and an ion implantation process are performed in order to etch the ONO dielectric layer in a bit line region not protected by the first photolithography process, and to form a plurality of buried bit lines. A photolithography and an ion implantation process are performed in order to form at least one ion well. The surface of the active area in the periphery area is wet etched. An oxidation process is performed in order to simultaneously form at least one gate oxide layer with a specific thickness in the active area, and to form a thermal oxide layer atop each of the buried bit lines in the memory area. Each of the gates, the top electrode of the capacitor and the resistor are formed in the periphery area, and a word line is formed in the memory area.

摘要翻译： 提供了一种形成包括混合信号电路的NROM的方法。 该方法通过提供具有存储区域和周边区域的半导体衬底开始。 周边区域具有由隔离层隔离的多个有效区域。 电容器的底部电极形成在外围区域中的隔离层顶部。 进行ONO（氧化物 - 氮化物 - 氧化物）处理。 执行光刻，各向异性蚀刻和离子注入工艺以蚀刻未被第一光刻工艺保护的位线区域中的ONO介电层，并形成多个掩埋位线。 进行光刻和离子注入工艺以形成至少一个离子阱。 周边区域的有源区域的表面被湿蚀刻。 执行氧化处理以在有源区域中同时形成具有特定厚度的至少一个栅极氧化物层，并且在存储区域中的每个掩埋位线上形成热氧化物层。 每个栅极，电容器的顶部电极和电阻器形成在周边区域中，并且在存储区域中形成字线。

公开(公告)号：US06436800B1

公开(公告)日：2002-08-20

申请号：US09990393

申请日：2001-11-20

申请人： Tung-Cheng Kuo ,  Shou-Wei Hung ,  Chien-Hung Liu ,  Shyi-Shuh Pan

发明人： Tung-Cheng Kuo ,  Shou-Wei Hung ,  Chien-Hung Liu ,  Shyi-Shuh Pan

IPC分类号： H01L2138

CPC分类号： H01L27/11568 ,  H01L27/105 ,  H01L27/11573

摘要： A fabrication method for a nonvolatile memory with a shallow junction is described. A gate structure, comprising an electron-trapping layer and a conductive layer, is formed on a substrate. A doped spacer is formed on the sidewall of the gate structure. Buried bit lines are further formed in the substrate beside the gate structure. Thereafter, thermal process is conducted to diffuse the dopants from the doped spacer into the substrate adjacent to the buried bit lines.

摘要翻译： 描述了一种具有浅结的非易失性存储器的制造方法。 在基板上形成包括电子捕获层和导电层的栅极结构。 掺杂间隔物形成在栅极结构的侧壁上。 在栅极结构旁边的衬底中进一步形成掩埋位线。 此后，进行热处理以将掺杂的掺杂剂从埋入的位线扩散到衬底中。

公开(公告)号：US06432778B1

公开(公告)日：2002-08-13

申请号：US09682216

申请日：2001-08-07

申请人： Erh-Kun Lai ,  Ying-Tso Chen ,  Chien-Hung Liu ,  Shyi-Shuh Pan ,  Shou-Wei Huang

发明人： Erh-Kun Lai ,  Ying-Tso Chen ,  Chien-Hung Liu ,  Shyi-Shuh Pan ,  Shou-Wei Huang

IPC分类号： H01L218236

CPC分类号： H01L27/11266 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/82345 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11293 ,  H01L27/11573 ,  Y10S438/954

摘要： An ONO dielectric layer is formed on the surface of a substrate, and then a plurality of bit lines are formed in the substrate by utilizing a photolithography and an ion implantation process. Thereafter the ONO dielectric layer in the periphery area is removed and the threshold voltage of the periphery transistor is adjusted. After the ONO dielectric layer in the read only memory area is removed, and a buried drain oxide layer and a plurality of gate oxide layers are formed atop each bit line and the surface of each device respectively. Then each word line in the memory area and each gate of each periphery transistor in the periphery area is formed so as to simultaneously form at least a nitride read only memory in the nitride read only memory area and a high, low threshold voltage device in the read only memory area. Finally the threshold voltage of the high threshold voltage device is adjusted by utilizing a ROM code implantation process.

摘要翻译： 在衬底的表面上形成ONO电介质层，然后利用光刻和离子注入工艺在衬底中形成多个位线。 此后，去除外围区域中的ONO电介质层，并调整周边晶体管的阈值电压。 在只读存储器区域中的ONO介电层被去除之后，并且在每个位线和每个器件的表面上分别形成掩埋的漏极氧化物层和多个栅极氧化物层。 然后形成周边区域的存储区域和每个周边晶体管的每个栅极的每个字线，以便在氮化物只读存储器区域和高，低阈值电压器件中同时形成至少一个氮化物只读存储器 只读存储区。 最后，通过利用ROM代码注入过程来调整高阈值电压器件的阈值电压。

公开(公告)号：US08867832B2

公开(公告)日：2014-10-21

申请号：US13756874

申请日：2013-02-01

申请人： Shih-Chang Hsia ,  Chien-Hung Liu

发明人： Shih-Chang Hsia ,  Chien-Hung Liu

IPC分类号： G06K9/00 ,  G06K9/34 ,  G06K9/40 ,  G06K9/32 ,  H04N11/02 ,  G06T7/00

CPC分类号： G06T5/005 ,  G06T7/11 ,  G06T7/174 ,  G06T7/254 ,  G06T2207/10016

摘要： A method for detecting and removing scrolling texts comprising a step of using an adaptive transient difference processing of video communication to conduct frame calculation, wherein the adaptive transient difference processing takes first N frames fjkt−N and a current frame fjkt, and subtracts them to obtain a frame difference; and if the frame difference is greater than a threshold value, it is determined that the current frame fjkt has scrolling texts; and interpolates the first N frames before the current position of the scrolling texts to replace the current frame fjkt to achieve the goal of hiding the scrolling texts during video communication to enhance the viewing effect.

摘要翻译： 一种用于检测和去除滚动文本的方法，包括使用视频通信的自适应瞬时差分处理进行帧计算的步骤，其中自适应瞬态差分处理采取前N帧fjkt-N和当前帧fjkt，并且减去它们以获得 一帧差异; 并且如果帧差大于阈值，则确定当前帧fjkt具有滚动文本; 并且在滚动文本的当前位置之前内插前N个帧以替换当前帧fjkt，以实现在视频通信期间隐藏滚动文本以增强观看效果的目的。

公开(公告)号：US08823179B2

公开(公告)日：2014-09-02

申请号：US12667383

申请日：2008-06-13

申请人： Chia-Lun Tsai ,  Wen-Cheng Chien ,  Po-Han Lee ,  Wei-Ming Chen ,  Chien-Hung Liu ,  Ying-Nan Wen

发明人： Chia-Lun Tsai ,  Wen-Cheng Chien ,  Po-Han Lee ,  Wei-Ming Chen ,  Chien-Hung Liu ,  Ying-Nan Wen

IPC分类号： H01L23/48 ,  H01L27/146 ,  H01L21/768 ,  H01L23/00

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L24/12 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/05001 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05655 ,  H01L2924/00014 ,  H01L2924/01021 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/05099

摘要： An embodiment of the present invention provides an electronic device package, which includes a chip having a first surface and an opposite second surface and a trench extending into a body of the chip along a direction from the second surface to the first surface, wherein a bottom portion of the trench includes at least two contact holes.

摘要翻译： 本发明的实施例提供了一种电子器件封装，其包括具有第一表面和相对的第二表面的芯片以及沿着从第二表面到第一表面的方向延伸到芯片的主体中的沟槽，其中底部 沟槽的一部分包括至少两个接触孔。

公开(公告)号：US20140219555A1

公开(公告)日：2014-08-07

申请号：US13756874

申请日：2013-02-01

申请人： Shih-Chang Hsia ,  Chien-Hung Liu

发明人： Shih-Chang Hsia ,  Chien-Hung Liu

IPC分类号： G06T7/00

CPC分类号： G06T5/005 ,  G06T7/11 ,  G06T7/174 ,  G06T7/254 ,  G06T2207/10016

摘要： A method for detecting and removing scrolling texts comprising a step of using an adaptive transient difference processing of video communication to conduct frame calculation, wherein the adaptive transient difference processing takes first N frames fjkt−N and a current frame fjkt, and subtracts them to obtain a frame difference; and if the frame difference is greater than a threshold value, it is determined that the current frame fjkt has scrolling texts; and interpolates the first N frames before the current position of the scrolling texts to replace the current frame fjkt to achieve the goal of hiding the scrolling texts during video communication to enhance the viewing effect.

摘要翻译： 一种用于检测和去除滚动文本的方法，包括使用视频通信的自适应瞬时差分处理进行帧计算的步骤，其中自适应瞬态差分处理采取前N帧fjkt-N和当前帧fjkt，并且减去它们以获得 一帧差异; 并且如果帧差大于阈值，则确定当前帧fjkt具有滚动文本; 并且在滚动文本的当前位置之前内插前N个帧以替换当前帧fjkt，以实现在视频通信期间隐藏滚动文本以增强观看效果的目的。

公开(公告)号：US08713227B2

公开(公告)日：2014-04-29

申请号：US13444315

申请日：2012-04-11

申请人： Chien-Hung Liu

发明人： Chien-Hung Liu

IPC分类号： G06F13/12 ,  G06F12/00

CPC分类号： G06F3/0607 ,  G06F3/0661 ,  G06F3/0676

摘要： An accessing device communicating with a host device and including a connector, a storage unit and a control unit is disclosed. The connector connects to the host device. The storage unit stores data. The control unit communicates with the storage unit according to a first communication protocol and communicates with the host device via the connector according to a second communication protocol. The control unit determines the kind of the second communication protocol according to selection information.

摘要翻译： 公开了一种与主机设备通信并包括连接器，存储单元和控制单元的访问设备。 连接器连接到主机设备。 存储单元存储数据。 控制单元根据第一通信协议与存储单元通信，并根据第二通信协议经由连接器与主机设备进行通信。 控制单元根据选择信息确定第二通信协议的种类。

公开(公告)号：US08497534B2

公开(公告)日：2013-07-30

申请号：US12788091

申请日：2010-05-26

申请人： Chien-Hung Liu ,  Cheng-Te Chou

发明人： Chien-Hung Liu ,  Cheng-Te Chou

IPC分类号： H01L23/48 ,  H01L23/02 ,  H01L21/00

CPC分类号： H01L27/14618 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L24/93 ,  H01L24/94 ,  H01L25/0657 ,  H01L27/14683 ,  H01L2224/0231 ,  H01L2224/0237 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05024 ,  H01L2224/051 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/056 ,  H01L2224/05638 ,  H01L2224/05688 ,  H01L2224/13022 ,  H01L2224/29007 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32052 ,  H01L2224/32145 ,  H01L2224/33181 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/01014 ,  H01L2924/053 ,  H01L2924/01 ,  H01L2224/83 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552

摘要： The invention provides a chip package and fabrication method thereof. In one embodiment, the chip package includes: a semiconductor substrate having opposite first and second surfaces, at least one bond pad region and at least one device region; a plurality of conductive pad structures disposed on the bond pad region at the first surface of the semiconductor substrate; a plurality of heavily doped regions isolated from one another, underlying and electrically connected to the conductive pad structures; and a plurality of conductive bumps underlying the heavily doped regions and electrically connected to the conductive pad structures through the heavily-doped regions.

摘要翻译： 本发明提供一种芯片封装及其制造方法。 在一个实施例中，芯片封装包括：具有相对的第一和第二表面，至少一个焊盘区域和至少一个器件区域的半导体衬底; 多个导电焊盘结构，设置在半导体衬底的第一表面处的焊盘区域上; 多个彼此隔离的重掺杂区域，其下面并电连接到导电焊盘结构; 以及在重掺杂区域下面的多个导电凸块，并通过重掺杂区域电连接到导电焊盘结构。