利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

141 条记录 (耗时 0.026 秒)

    Method for forming IMD films
    91.
    发明授权
    Method for forming IMD films 有权
    形成IMD膜的方法

    公开(公告)号：US07253121B2

    公开(公告)日：2007-08-07

    申请号：US10937215

    申请日：2004-09-09

    申请人： Yi-Lung Cheng ,  Miao-Cheng Liao ,  Ying-Lang Wang

    发明人： Yi-Lung Cheng ,  Miao-Cheng Liao ,  Ying-Lang Wang

    IPC分类号： H01L21/471

    CPC分类号： H01L21/76807

    摘要： A method for forming IMD films. A substrate is provided. A plurality of dielectric films are formed on the substrate, wherein each of the dielectric layers are deposited in-situ in one chamber with only one thermal cycle.

    摘要翻译： 一种形成IMD膜的方法。 提供基板。 在基板上形成多个电介质膜，其中每个电介质层原位沉积在仅具有一个热循环的一个室中。

    Dual contact ring and method for metal ECP process
    92.
    发明授权
    Dual contact ring and method for metal ECP process 有权
    双接触环和金属ECP工艺方法

    公开(公告)号：US07252750B2

    公开(公告)日：2007-08-07

    申请号：US10664347

    申请日：2003-09-16

    申请人： Chi-Wen Liu ,  Jung-Chih Tsao ,  Ke-Wei Chen ,  Ying-Lang Wang

    发明人： Chi-Wen Liu ,  Jung-Chih Tsao ,  Ke-Wei Chen ,  Ying-Lang Wang

    IPC分类号： C25D17/00

    CPC分类号： C25D5/48 ,  C25D5/028 ,  Y10S204/07

    摘要： A dual contact ring for contacting a patterned surface of a wafer and electrochemical plating of a metal on the patterned central region of the wafer and removing the metal from the outer, edge region of the wafer. The dual contact ring has an outer voltage ring in contact with the outer, edge region of the wafer and an inner voltage ring in contact with the inner, central region of the wafer. The outer voltage ring is connected to a positive voltage source and the inner voltage ring is connected to a negative voltage source. The inner voltage ring applies a negative voltage to the wafer to facilitate the plating of metal onto the patterned region of the wafer. A positive voltage is applied to the wafer through the outer voltage ring to remove the plated metal from the outer, edge region of the substrate.

    摘要翻译： 用于接触晶片的图案化表面的双接触环和在晶片的图案化中心区域上的金属的电化学电镀，并从晶片的外边缘区域移除金属。 双接触环具有与晶片的外部边缘区域接触的外部电压环和与晶片的内部中心区域接触的内部电压环。 外部电压环连接到正电压源，内部电压环连接到负电压源。 内部电压环向晶片施加负电压以便于将金属电镀到晶片的图案化区域上。 通过外部电压环将正电压施加到晶片，以从衬底的外部边缘区域去除镀覆的金属。

    Damascene process using dielectic layer containing fluorine and nitrogen
    94.
    发明申请
    Damascene process using dielectic layer containing fluorine and nitrogen 审中-公开
    使用含氟和氮的介电层的镶嵌工艺

    公开(公告)号：US20060292859A1

    公开(公告)日：2006-12-28

    申请号：US11166237

    申请日：2005-06-27

    申请人： Shiu-Ko Jian ,  Sheng-Wen Chen ,  Hung-Jui Chang ,  Ying-Lang Wang

    发明人： Shiu-Ko Jian ,  Sheng-Wen Chen ,  Hung-Jui Chang ,  Ying-Lang Wang

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76808 ,  H01L21/02131 ,  H01L21/0214 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/3144 ,  H01L21/31629

    摘要： An improved damascene process for fabricating a semiconductor device. A dielectric layer comprising at least both fluorine and nitrogen is formed overlying a substrate, in which a nitrogen content in the dielectric layer is about 5% to 10%. The dielectric layer is subsequently pattered to form at least one damascene opening therein. A metal layer is formed overlying the dielectric layer and fills the damascene opening. The excess metal layer on the dielectric layer is removed to leave the metal layer in the damascene opening. A semiconductor device with the same damascene structure is also disclosed.

    摘要翻译： 用于制造半导体器件的改进的镶嵌工艺。 形成至少包含氟和氮两者的电介质层，覆盖在基底中，其中介电层中的氮含量为约5％至10％。 随后图案化介电层以在其中形成至少一个镶嵌开口。 形成覆盖在电介质层上的金属层并填充镶嵌开口。 去除电介质层上的多余的金属层，使金属层离开镶嵌开口。 还公开了具有相同镶嵌结构的半导体器件。

    Chamber cleaning method
    97.
    发明申请
    Chamber cleaning method 审中-公开
    室内清洗方式

    公开(公告)号：US20050155625A1

    公开(公告)日：2005-07-21

    申请号：US10761654

    申请日：2004-01-20

    申请人： Shiu-Ko Jangjian ,  Sheng-Wen Chen ,  Hung-Jui Chang ,  Chen-Liang Chang ,  Ying-Lang Wang

    发明人： Shiu-Ko Jangjian ,  Sheng-Wen Chen ,  Hung-Jui Chang ,  Chen-Liang Chang ,  Ying-Lang Wang

    IPC分类号： B08B7/00 ,  B08B7/02 ,  B08B9/00 ,  B08B9/08 ,  C23C16/44

    CPC分类号： C23C16/4405 ,  B08B7/00

    摘要： A method suitable for cleaning the interior surfaces of a process chamber is disclosed. The invention is particularly effective in removing silicon nitride and silicon dioxide residues from the interior surfaces of a chemical vapor deposition (CVD) chamber. The method includes reacting nitrous oxide (N2O) gas with nitrogen trifluoride (NF3) gas in a plasma to generate nitric oxide (NO) and fluoride (F) radicals. Due to the increased density of nitric oxide radicals generated from the nitrous oxide, the etch and removal rate of the residues on the interior surfaces of the chamber is enhanced. Consequently, the quantity of nitrogen trifluoride necessary to efficiently and expeditiously carry out the chamber cleaning process is reduced.

    摘要翻译： 公开了一种适于清洁处理室内表面的方法。 本发明特别有效地从化学气相沉积（CVD）室的内表面去除氮化硅和二氧化硅残余物。 该方法包括在等离子体中使一氧化二氮（N 2 O 2 O）气体与三氟化氮（NF 3 N 3）气体反应以产生一氧化氮（NO）和氟化物（F）基团 。 由于由一氧化二氮产生的一氧化氮自由基的密度增加，腔室内表面上残留物的蚀刻和去除速度增强。 因此，有效且快速地进行室清洁处理所需的三氟化氮的量减少。

    Metal surface and film protection method to prolong Q-time after metal deposition
    99.
    发明授权
    Metal surface and film protection method to prolong Q-time after metal deposition 失效
    金属表面和膜保护方法延长金属沉积后的Q时间

    公开(公告)号：US06825120B1

    公开(公告)日：2004-11-30

    申请号：US10176855

    申请日：2002-06-21

    申请人： Chi-Wen Liu ,  Ying-Lang Wang

    发明人： Chi-Wen Liu ,  Ying-Lang Wang

    IPC分类号： H01L21461

    CPC分类号： H01L21/76877 ,  H01L21/7684

    摘要： The present invention relates to a method of protecting a fresh metal surface, preferably copper, after a metal deposition step. The metal deposition is preferably part of single or dual damascene process. The metal surface is treated with an amine, preferably BTA, to form a metal complex that is a hydrophobic monolayer and prevents the underlying metal from reacting to form oxides that can degrade device performance. The amine can be applied in various ways including dipping, spraying, spin coating, and by a CVD method. The sacrificial protective layer can remain on the substrate during a storage period of up to hours or days before it is removed in a subsequent chemical mechanical polish step. The use of a sacrificial protective layer improves throughput in a damascene process by allowing long queue times between metal deposition and CMP which gives more flexibility to production flow and reduces cost.

    摘要翻译： 本发明涉及在金属沉积步骤之后保护新鲜金属表面，优选铜的方法。 金属沉积优选是单镶嵌或双镶嵌工艺的一部分。 用胺（优选BTA）处理金属表面以形成作为疏水性单层的金属络合物，并防止下面的金属反应形成可能降低器件性能的氧化物。 胺可以以各种方式施用，包括浸渍，喷涂，旋涂和通过CVD方法。 在后续化学机械抛光步骤中除去之前，牺牲保护层可以在高达数小时或数天的储存期间保留在基材上。 牺牲保护层的使用通过允许金属沉积和CMP之间的长队列时间来提高镶嵌工艺中的生产率，这为生产流程提供了更大的灵活性并降低了成本。

    Method for capping over a copper layer
    100.
    发明授权
    Method for capping over a copper layer 失效
    覆铜层的方法

    公开(公告)号：US06790778B1

    公开(公告)日：2004-09-14

    申请号：US10658270

    申请日：2003-09-10

    申请人： Yi-Lung Cheng ,  Ying-Lang Wang ,  We-Li Chen

    发明人： Yi-Lung Cheng ,  Ying-Lang Wang ,  We-Li Chen

    IPC分类号： H01L2144

    CPC分类号： H01L21/76834 ,  H01L21/76883 ,  Y10S438/902 ,  Y10S438/906

    摘要： A method for capping over a copper layer. A copper layer is deposited overlying a substrate. The copper surface is treated with hydrogen-containing plasma to remove copper oxides formed thereon, thereby suppressing copper hillock formation. The treated copper surface is treated again with nitrogen-containing plasma to improve adhesion of the copper surface. A capping layer is formed on the copper layer.

    摘要翻译： 一种覆盖铜层的方法。 将铜层沉积在衬底上。 用含氢等离子体处理铜表面以除去其上形成的铜氧化物，从而抑制铜形成小丘。 处理的铜表面再次用含氮等离子体处理以改善铜表面的粘附。 在铜层上形成覆盖层。