公开(公告)号：US08558321B2

公开(公告)日：2013-10-15

申请号：US13005085

申请日：2011-01-12

申请人： Hiroji Shimizu ,  Yoshihiro Sato ,  Hideyuki Arai ,  Takayuki Yamada ,  Tsutomu Oosuka

发明人： Hiroji Shimizu ,  Yoshihiro Sato ,  Hideyuki Arai ,  Takayuki Yamada ,  Tsutomu Oosuka

IPC分类号： H01L21/40

CPC分类号： H01L27/0629 ,  H01L28/20

摘要： A semiconductor device includes: a first MIS transistor of a first conductivity type having a first active region as a region of a semiconductor substrate surrounded by an element isolation region formed in an upper portion of the semiconductor substrate, a first gate insulating film having a first high dielectric film formed on the first active region, and a first gate electrode formed on the first gate insulating film; and a resistance element having a second high dielectric film formed on the element isolation region and a resistance layer made of silicon formed on the second high dielectric film. The first high dielectric film and the second high dielectric film include the same high dielectric material, and the first high dielectric film includes a first adjustment metal, but the second high dielectric film does not include the first adjustment metal.

摘要翻译： 一种半导体器件包括：第一导电类型的第一MIS晶体管，具有作为由半导体衬底的上部形成的元件隔离区围绕的半导体衬底的区域的第一有源区，第一栅绝缘膜， 形成在第一有源区上的高电介质膜和形成在第一栅极绝缘膜上的第一栅电极; 以及电阻元件，其具有形成在元件隔离区域上的第二高电介质膜和形成在第二高介电膜上的由硅制成的电阻层。 第一高介电膜和第二高电介质膜包括相同的高介电材料，第一高电介质膜包括第一调节金属，但第二高电介质膜不包括第一调节金属。

公开(公告)号：US08350332B2

公开(公告)日：2013-01-08

申请号：US12619222

申请日：2009-11-16

申请人： Tsutomu Oosuka ,  Yoshihiro Sato ,  Hisashi Ogawa

发明人： Tsutomu Oosuka ,  Yoshihiro Sato ,  Hisashi Ogawa

IPC分类号： H01L27/092

CPC分类号： H01L21/823842 ,  H01L21/82345 ,  H01L21/823462 ,  H01L21/823481 ,  H01L21/823857 ,  H01L21/823878

摘要： A first and second gate electrodes are formed on a first and second active regions, respectively. The first and second gate electrodes have a first and second metal-containing conductive films, respectively. The first and second metal-containing conductive films are formed on the isolation region for segmenting the first and second active regions to be spaced apart from each other. A third metal-containing conductive film, which is a part of each of the first and second gate electrodes, is continuously formed from a top of the first metal-containing conductive film through a top of the isolation region to a top of the second metal-containing conductive film. The third metal-containing conductive film is in contact with the first and second metal-containing conductive films.

摘要翻译： 第一和第二栅电极分别形成在第一和第二有源区上。 第一和第二栅电极分别具有第一和第二含金属的导电膜。 第一和第二含金属导电膜形成在隔离区域上，用于将第一和第二有源区域彼此分隔开。 作为第一和第二栅电极中的每一个的一部分的第三含金属导电膜从第一含金属导电膜的顶部通过隔离区的顶部连续地形成到第二金属的顶部 的导电膜。 第三含金属导电膜与第一和第二含金属导电膜接触。

公开(公告)号：US08344455B2

公开(公告)日：2013-01-01

申请号：US13149554

申请日：2011-05-31

申请人： Tsutomu Oosuka ,  Hisashi Ogawa ,  Yoshihiro Sato

发明人： Tsutomu Oosuka ,  Hisashi Ogawa ,  Yoshihiro Sato

IPC分类号： H01L29/78

CPC分类号： H01L23/535 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/76895 ,  H01L21/823425 ,  H01L21/823468 ,  H01L21/823475 ,  H01L27/11 ,  H01L29/161 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device includes: a transistor having a gate electrode formed on a semiconductor substrate and first and second source/drain regions formed in portions of the semiconductor substrate on both sides of the gate electrode; a gate interconnect formed at a position opposite to the gate electrode with respect to the first source/drain region; and a first silicon-germanium layer formed on the first source/drain region to protrude above the top surface of the semiconductor substrate. The gate interconnect and the first source/drain region are connected via a local interconnect structure that includes the first silicon-germanium layer.

摘要翻译： 半导体器件包括：晶体管，其具有形成在半导体衬底上的栅极电极和形成在半导体衬底的位于栅电极两侧的部分中的第一和第二源极/漏极区域; 形成在相对于第一源极/漏极区域的与栅电极相对的位置处的栅极互连; 以及形成在所述第一源极/漏极区域上以在所述半导体衬底的顶表面上方突出的第一硅 - 锗层。 栅极互连和第一源极/漏极区域经由包括第一硅 - 锗层的局部互连结构连接。

公开(公告)号：US08304809B2

公开(公告)日：2012-11-06

申请号：US12292164

申请日：2008-11-13

申请人： Shusuke Kaya ,  Seikoh Yoshida ,  Masatoshi Ikeda, legal representative ,  Sadahiro Kato ,  Takehiko Nomura ,  Nariaki Ikeda ,  Masayuki Iwami ,  Yoshihiro Sato ,  Hiroshi Kambayashi ,  Koh Li

发明人： Shusuke Kaya ,  Seikoh Yoshida ,  Sadahiro Kato ,  Takehiko Nomura ,  Nariaki Ikeda ,  Masayuki Iwami ,  Yoshihiro Sato ,  Hiroshi Kambayashi ,  Koh Li

IPC分类号： H01L29/737 ,  H01L21/28 ,  H01L21/265

CPC分类号： H01L29/7787 ,  H01L29/0611 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/66462

摘要： In a GaN-based semiconductor device, an active layer of a GaN-based semiconductor is formed on a silicon substrate. A trench is formed in the active layer and extends from a top surface of the active layer to a depth reaching the silicon substrate. A first electrode is formed on an internal wall surface of the trench and extends from the top surface of the active layer to the silicon substrate. A second electrode is formed on the active layer to define a current path between the first electrode and the second electrode via the active layer in an on-state of the device. A bottom electrode is formed on a bottom surface of the silicon substrate and defines a bonding pad for the first electrode. The first electrode is formed of metal in direct ohmic contact with both the silicon substrate and the active layer.

摘要翻译： 在GaN基半导体器件中，在硅衬底上形成GaN基半导体的有源层。 在有源层中形成沟槽并从有源层的顶表面延伸到达到硅衬底的深度。 第一电极形成在沟槽的内壁表面上并从有源层的顶表面延伸到硅衬底。 第二电极形成在有源层上，以在器件的导通状态中经由有源层在第一电极和第二电极之间限定电流路径。 底部电极形成在硅衬底的底表面上，并且限定了用于第一电极的焊盘。 第一电极由与硅衬底和有源层直接欧姆接触的金属形成。

公开(公告)号：US08241982B2

公开(公告)日：2012-08-14

申请号：US12942057

申请日：2010-11-09

申请人： Yoshihiro Hirota ,  Yoshihiro Sato ,  Nobuo Okumura

发明人： Yoshihiro Hirota ,  Yoshihiro Sato ,  Nobuo Okumura

IPC分类号： H01L21/336

CPC分类号： H01L27/11521 ,  H01L21/0214 ,  H01L21/02332 ,  H01L21/28273 ,  H01L21/31111 ,  H01L21/3144 ,  H01L21/3211 ,  H01L21/76232 ,  H01L29/42336 ,  H01L29/7881

摘要： A plasma nitriding process is followed by a selective etching process which removes a silicon oxynitride film formed on surfaces of both an element separation film and an insulation film while leaving a silicon nitride film formed on an electrode layer. The selective etching process removes the silicon oxynitride film formed on the surfaces of the element separation film and the insulation film.

摘要翻译： 等离子体氮化处理之后是选择性蚀刻工艺，其除去在元件分离膜和绝缘膜的表面上形成的氮氧化硅膜，同时留下形成在电极层上的氮化硅膜。 选择性蚀刻工艺除去在元件分离膜和绝缘膜的表面上形成的氧氮化硅膜。

公开(公告)号：US08183165B2

公开(公告)日：2012-05-22

申请号：US13019093

申请日：2011-02-01

申请人： Seiji Matsuyama ,  Toshio Nakanishi ,  Shigenori Ozaki ,  Hikaru Adachi ,  Koichi Takatsuki ,  Yoshihiro Sato

发明人： Seiji Matsuyama ,  Toshio Nakanishi ,  Shigenori Ozaki ,  Hikaru Adachi ,  Koichi Takatsuki ,  Yoshihiro Sato

IPC分类号： H01L21/318

CPC分类号： C23C8/36 ,  H01J37/32192 ,  H01L21/02332 ,  H01L21/0234 ,  H01L21/28202 ,  H01L21/3144 ,  H01L29/518

摘要： According to the present invention,when a nitridation process by plasma generated by a microwave is applied to a substrate with an oxide film having been formed thereon to from an oxynitride film, the microwave is intermittently supplied. By the intermittent supply of the microwave, ion bombardment is reduced in accordance with a decrease in electron temperature, and a diffusion velocity of nitride species in the oxide film lowers, which as a result makes it possible to prevent nitrogen from concentrating in a substrate-side interface of an oxynitride film to increase the nitrogen concentration therein. Consequently,it is possible to improve quality of the oxynitride film, resulting in a reduced leadage current, an improved operating speed, and improved NBTI resistance.

摘要翻译： 根据本发明，当通过微波产生的等离子体的氮化处理被施加到其上形成有氧化膜的基板上，从而形成氮氧化物膜时，间歇地供给微波。 通过间歇地供给微波，根据电子温度的降低，离子轰击降低，氮化物在氧化膜中的扩散速度降低，结果使得可以防止氮浓缩到基板 - 氮氧化物膜的侧面界面，以增加其中的氮浓度。 因此，可以提高氧氮化膜的质量，导致降低的引线电流，提高的工作速度和改善的NBTI电阻。

公开(公告)号：US08134181B2

公开(公告)日：2012-03-13

申请号：US12539736

申请日：2009-08-12

申请人： Yoshihiro Sato ,  Sadahiro Kato ,  Seikoh Yoshida

发明人： Yoshihiro Sato ,  Sadahiro Kato ,  Seikoh Yoshida

IPC分类号： H01L29/778

CPC分类号： H01L29/7787 ,  H01L29/2003 ,  H01L29/66462

摘要： A semiconductor device includes a substrate; a buffer layer; and a compound semiconductor layer laminated on the substrate with the buffer layer in between. The buffer layer has a dislocation density in a plane in parallel to an in-plane direction thereof, so that a volume resistivity of the buffer layer becomes a substantially maximum value.

摘要翻译： 半导体器件包括衬底; 缓冲层; 以及层叠在基板上的化合物半导体层之间的缓冲层。 缓冲层在与其面内方向平行的平面中具有位错密度，使得缓冲层的体积电阻率变为基本上最大值。

公开(公告)号：US20110149713A1

公开(公告)日：2011-06-23

申请号：US12967104

申请日：2010-12-14

申请人： Yoshihiro Sato ,  Hidenao Saito ,  Jun Hato ,  Ryuichiro Mizuno ,  Katsuhiko Kimura ,  Seiichi Kato

发明人： Yoshihiro Sato ,  Hidenao Saito ,  Jun Hato ,  Ryuichiro Mizuno ,  Katsuhiko Kimura ,  Seiichi Kato

IPC分类号： G11B7/135

CPC分类号： G11B7/0933 ,  G11B7/0932 ,  G11B7/0935

摘要： In an optical pickup equipped with a semiconductor laser, electro-optical components such as a lens, and an objective lens drive device, the objective lens drive device includes objective lenses, a holder holding the objective lenses, a focusing coil, and tracking coils. The focusing coil is wound in parallel to the optical surface of the objective lens, and formed in a parallelogram shape having inclined portions provided near the tracking coils. The two tracking coils are placed on diagonal portions of the lens holder.

摘要翻译： 在配备有半导体激光器的光学拾取器，诸如透镜的电光部件和物镜驱动装置中，物镜驱动装置包括物镜，保持物镜的保持器，聚焦线圈和跟踪线圈。 聚焦线圈与物镜的光学表面平行地缠绕，并且形成为具有设置在跟踪线圈附近的倾斜部分的平行四边形。 两个跟踪线圈被放置在透镜架的对角部分上。

公开(公告)号：US20110086263A1

公开(公告)日：2011-04-14

申请号：US12970179

申请日：2010-12-16

申请人： Takayoshi Yamasaki ,  Hiroaki Sato ,  Toshiaki Ueda ,  Tomonori Watanabe ,  Yoichi Miyajima ,  Masayuki Ishii ,  Shoichi Shintani ,  Yoshihiro Sato

发明人： Takayoshi Yamasaki ,  Hiroaki Sato ,  Toshiaki Ueda ,  Tomonori Watanabe ,  Yoichi Miyajima ,  Masayuki Ishii ,  Shoichi Shintani ,  Yoshihiro Sato

IPC分类号： H01M2/30

CPC分类号： H01M2/1061 ,  H01M2/30 ,  H01M2/342 ,  H01M10/46

摘要： In a battery including a battery cell formed in a flattened substantially parallelepiped shape and a terminal contacting section electrically connected to the battery cell, at one end in the longitudinal direction of a face of the battery opposing to the face on which the terminal contacting section is provided, a projecting portion which projects in the longitudinal direction of the face is provided. Meanwhile, another projecting portion which projects in the longitudinal direction of the face is provided at the other end. The projecting portions may have projecting lengths different from each other or may have projecting lengths and projecting thicknesses different from each other. A charging apparatus into which the battery is to be installed includes an accommodating section for the battery which in turn includes projection accommodating portions configured to individually accommodate the projecting portions.

摘要翻译： 在包括形成为扁平大致平行六面体形状的电池单元的电池和与电池单元电连接的端子接触部分中，在电池的与端子接触部分的面相对的面的纵向方向上的一端 设置有设置在面部的长度方向突出的突出部。 同时，在另一端设置有在面的纵向突出的另一突出部。 突出部分可以具有彼此不同的突出长度，或者可以具有彼此不同的突出长度和突出厚度。 要安装电池的充电装置包括一个用于电池的容纳部分，该容纳部分又包括被构造成分别容纳突出部分的突起容纳部分。

公开(公告)号：US20110049529A1

公开(公告)日：2011-03-03

申请号：US12943448

申请日：2010-11-10

申请人： Yoshihiro Sato ,  Takehiko Nomura ,  Hiroshi Kambayashi ,  Shinji Nagata

发明人： Yoshihiro Sato ,  Takehiko Nomura ,  Hiroshi Kambayashi ,  Shinji Nagata

IPC分类号： H01L29/20 ,  H01L21/28

CPC分类号： H01L29/2003 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/28264 ,  H01L21/31608 ,  H01L29/1083 ,  H01L29/4236 ,  H01L29/51 ,  H01L29/66462 ,  H01L29/7787

摘要： Provided is a GaN series semiconductor element, which is capable of obtaining an adequate normally-off characteristic, and a manufacturing method thereof.In a GaN series semiconductor element that comprises an operating layer comprising a GaN series compound semiconductor, a gate insulating film that is formed on the operating layer, and a gate electrode that is formed on the gate insulating film, the gate insulating is a SiO2 film of which an infrared absorption peak that corresponds to the vibration energy of a Si—H bond does not appear in the absorption spectrum of transmitted light that is obtained by the Fourier transform infrared spectroscopy method. This kind of SiO2 film is a high-quality SiO2 film in which the occurrence of Si—H bonds and dangling bonds is suppressed. With this kind of construction, adverse effects on the control of the threshold value of the GaN series semiconductor element are also suppressed, so an adequate normally-off characteristic is obtained.

摘要翻译： 提供能够获得足够的常关特性的GaN系半导体元件及其制造方法。 在包括GaN系化合物半导体的工作层的GaN系半导体元件，形成在工作层上的栅极绝缘膜和形成在栅极绝缘膜上的栅极电极之间，栅绝缘体是SiO 2膜 其中通过傅立叶变换红外光谱法获得的透射光的吸收光谱中不出现与Si-H键的振动能相对应的红外吸收峰。 这种SiO 2膜是抑制Si-H键和悬挂键发生的高质量SiO 2膜。 通过这种构造，也可以抑制对GaN系半导体元件的阈值的控制的不利影响，从而获得充分的常关特性。