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    DISPLAY DEVICE, DISPLAY MODULE, AND ELECTRONIC DEVICE
    92.
    发明申请
    DISPLAY DEVICE, DISPLAY MODULE, AND ELECTRONIC DEVICE 审中-公开

    公开(公告)号：US20170365203A1

    公开(公告)日：2017-12-21

    申请号：US15615994

    申请日：2017-06-07

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Kei TAKAHASHI

    IPC: G09G3/20 ,  G02F1/1335 ,  G09G3/36 ,  G06F3/041 ,  G09G3/3208

    Abstract: To provide a display device in which a reflective liquid crystal element and a light-emitting element are switched for display, and the operation of a reflective liquid crystal element driver IC and the operation of a light-emitting element driver IC can be alternately stopped even when they are integrated. The display device includes a pixel, a driver circuit, and a switching control circuit. The driver IC includes a buffer amplifier for outputting a grayscale voltage to drive the liquid crystal element and a buffer amplifier for outputting a grayscale voltage to drive the light-emitting element. Each buffer amplifier includes a transistor configured to supply a bias current, and a switch. The switch is configured to control a conduction state between a wiring for supplying a bias voltage and a gate of the transistor. The switching control circuit is configured to output a switching signal for controlling a conduction state of the switch.

    SEMICONDUCTOR DEVICE, DISPLAY PANEL, AND ELECTRONIC DEVICE
    95.
    发明申请
    SEMICONDUCTOR DEVICE, DISPLAY PANEL, AND ELECTRONIC DEVICE 审中-公开
    半导体器件，显示面板和电子器件

    公开(公告)号：US20170053584A1

    公开(公告)日：2017-02-23

    申请号：US15223198

    申请日：2016-07-29

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Kei TAKAHASHI

    IPC: G09G3/20

    CPC classification number: G09G3/3283 ,  G09G2300/0426 ,  G09G2310/027 ,  G09G2310/0291 ,  G09G2330/028 ,  H01L27/28

    Abstract: A semiconductor device having a novel structure is provided. Fluctuation in the grayscale voltage due to an offset voltage is suppressed. When a current corresponding to a lower-bit grayscale voltage is generated in a transconductance amplifier, voltages VHI and VLO supplied to the transconductance amplifier are alternately input to two input terminals in accordance with a digital signal of the most significant bit of lower bits. Since a change corresponding to the offset voltage is added to both the maximum and minimum values of the current output from the transconductance amplifier, fluctuation in the grayscale voltage due to the offset voltage can be suppressed.

    Abstract translation: 提供具有新颖结构的半导体器件。 由于偏移电压引起的灰度电压的波动被抑制。 当在跨导放大器中产生对应于较低位灰度电压的电流时，根据低位的最高有效位的数字信号将提供给跨导放大器的电压VHI和VL0交替地输入到两个输入端。 由于对应于偏移电压的变化被加到从跨导放大器输出的电流的最大值和最小值两者中，所以可以抑制由偏移电压引起的灰度级电压的波动。

    CONTROL CIRCUIT AND DC-DC CONVERTER
    97.
    发明申请
    CONTROL CIRCUIT AND DC-DC CONVERTER 审中-公开
    控制电路和直流 - 直流转换器

    公开(公告)号：US20150035509A1

    公开(公告)日：2015-02-05

    申请号：US14330016

    申请日：2014-07-14

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Jun KOYAMA ,  Kei TAKAHASHI ,  Takuro OHMARU

    IPC: H02M3/157

    CPC classification number: H02M3/157

    Abstract: To provide a control circuit in a DC-DC converter, which includes transistors with the same conductivity type. The control circuit generates a pulse signal (GS), and includes a hysteresis comparator, a logic unit, a digital-analog converter circuit, and a comparator. The hysteresis comparator converts a signal (FB) based on an output voltage of the DC-DC converter into a digital signal (comp). The logic unit generates, in accordance with the signal comp, a pulse width modulation signal (pwm) determining a pulse width of the signal GS. The logic unit also divides a reference clock signal to generate an m-bit (m is greater than or equal to 2) second digital signal. The digital-analog converter circuit converts the m-bit second digital signal into an analog signal to generate a 2m-level triangular wave signal. The comparator compares the signal pwm with the triangular wave signal to output the comparison result as the signal GS.

    Abstract translation: 在DC-DC转换器中提供一种控制电路，它包括具有相同导电类型的晶体管。 控制电路产生脉冲信号（GS），并且包括滞后比较器，逻辑单元，数模转换器电路和比较器。 滞后比较器将基于DC-DC转换器的输出电压的信号（FB）转换为数字信号（comp）。 逻辑单元根据信号comp产生确定信号GS的脉冲宽度的脉宽调制信号（pwm）。 逻辑单元还划分参考时钟信号以产生m位（m大于或等于2）的第二数字信号。 数模转换器电路将m位第二数字信号转换为模拟信号以产生2m级的三角波信号。 比较器将信号pwm与三角波信号进行比较，输出比较结果作为信号GS。

    POWER STORAGE DEVICE AND CHARGING METHOD THEREOF
    99.
    发明申请
    POWER STORAGE DEVICE AND CHARGING METHOD THEREOF 有权
    蓄电装置及其充电方法

    公开(公告)号：US20140184172A1

    公开(公告)日：2014-07-03

    申请号：US14136503

    申请日：2013-12-20

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Junpei MOMO ,  Hiroyuki MIYAKE ,  Kei TAKAHASHI

    IPC: H02J7/00

    CPC classification number: B60L11/1816 ,  B60L11/182 ,  G01R31/3606 ,  H01M4/625 ,  H01M10/0525 ,  H01M10/44 ,  H02J7/0052 ,  H02J7/0057 ,  H02J7/0068 ,  Y02E60/122 ,  Y02T10/7011

    Abstract: An object is to inhibit a decrease in the capacity of a power storage device or to compensate the capacity, by adjusting or rectifying an imbalance between a positive electrode and a negative electrode, which is caused by decomposition of an electrolyte solution at the negative electrode. Provided is a charging method of a power storage device including a positive electrode using an active material that exhibits two-phase reaction, a negative electrode, and an electrolyte solution. The method includes the steps of, after constant current charging, performing constant voltage charging with a voltage that does not cause decomposition of the electrolyte solution until a charging current becomes lower than or equal to a lower current value limit; and after the constant voltage charging, performing additional charging with a voltage that causes decomposition of the electrolyte solution until a resistance of the power storage device reaches a predetermined resistance.

    Abstract translation: 本发明的目的是通过调节或校正由负极上的电解质溶液分解引起的正极和负极之间的不平衡来抑制蓄电装置的容量的降低或补偿容量。 提供一种蓄电装置的充电方法，其包括使用表现出二相反应的活性物质的正极，负极和电解液。 该方法包括以下步骤：在恒流充电之后，以不会导致电解质溶液分解的电压进行恒压充电直到充电电流低于或等于较低的电流值极限; 并且在恒压充电之后，用导致电解质溶液分解的电压进行附加充电直到蓄电装置的电阻达到预定电阻。

    DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
    100.
    发明申请
    DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20250098317A1

    公开(公告)日：2025-03-20

    申请号：US18956273

    申请日：2024-11-22

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei YAMAZAKI ,  Kei TAKAHASHI ,  Yoshiyuki KUROKAWA

    IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368 ,  G09G3/36 ,  H01L29/24 ,  H01L29/786

    Abstract: A display device that is suitable for increasing its size is provided. The display device includes first to third wirings, a first transistor, first to third conductive layers, and a first pixel electrode; the first wiring extends in a first direction and intersects with the second and the third wirings; the second and the third wirings each extend in a second direction intersecting with the first direction; a gate of the first transistor is electrically connected to the first wiring; one of a source and a drain of the first transistor is electrically connected to the second wiring through the first to the third conductive layers; the second conductive layer includes a region overlapping with the third wiring; the first conductive layer, the third conductive layer, and the first pixel electrode contain the same material; the first wiring and the second conductive layer contain the same material; the first wiring is supplied with a selection signal; and the second and the third wirings are supplied with different signals.

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