公开(公告)号：US20110111558A1

公开(公告)日：2011-05-12

申请号：US12938538

申请日：2010-11-03

申请人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Toru TAKAYAMA

发明人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Toru TAKAYAMA

IPC分类号： H01L21/336 ,  C23C14/34 ,  C23C14/08

CPC分类号： H01L21/6719 ,  H01L21/02422 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/67207 ,  H01L29/66969 ,  H01L29/7869

摘要： An object is to provide a deposition apparatus for forming a thin film which contains few impurities such as a hydrogen atom or a carbon atom. Further, an object is to provide a method for forming a thin film containing few impurities. Furthermore, an object is to provide a method for manufacturing a highly reliable semiconductor element including an oxide semiconductor film containing few impurities. A deposition apparatus can be provided for forming a thin film which contains few impurities such as a compound containing a hydrogen atom such as H2O, a compound containing a carbon atom, a hydrogen atom, or a carbon atom can be provided. Further, a method for forming a thin film containing few impurities can be provided. Furthermore, a method for forming a highly reliable semiconductor element including an oxide semiconductor film containing few impurities can be provided.

摘要翻译： 本发明的目的是提供一种用于形成含有少量诸如氢原子或碳原子的杂质的薄膜的沉积装置。 此外，目的在于提供一种形成含有少量杂质的薄膜的方法。 此外，目的在于提供一种制造高可靠性的半导体元件的方法，所述半导体元件包括少量杂质的氧化物半导体膜。 可以提供沉积装置，用于形成含有少量杂质的薄膜，例如含有氢原子的化合物如H 2 O，含有碳原子的化合物，氢原子或碳原子。 此外，可以提供形成含有少量杂质的薄膜的方法。 此外，可以提供形成包含少量杂质的氧化物半导体膜的高可靠性半导体元件的方法。

公开(公告)号：US20110095292A1

公开(公告)日：2011-04-28

申请号：US12983538

申请日：2011-01-03

申请人： Toru TAKAYAMA ,  Shunpei YAMAZAKI ,  Kengo AKIMOTO

发明人： Toru TAKAYAMA ,  Shunpei YAMAZAKI ,  Kengo AKIMOTO

IPC分类号： H01L29/12

CPC分类号： H01L21/0217 ,  B32B17/04 ,  B32B17/06 ,  C23C14/0652 ,  C23C14/5846 ,  H01L21/02266 ,  H01L21/3145 ,  H01L21/3185 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/13 ,  H01L27/3244 ,  H01L27/3248 ,  H01L27/3297 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/518 ,  H01L29/66757 ,  H01L2224/16225 ,  H01L2924/181 ,  H01L2924/00012

摘要： An object of the present invention is to apply an insulating film of cure and high quality that is suitably applicable as gate insulating film and protective film to a technique that the insulating film is formed on the glass substrate under a temperature of strain point or lower, and to a semiconductor device realizing high efficiency and high reliability by using it. In a semiconductor device of the present invention, a gate insulating film of a field effect type transistor with channel length of from 0.35 to 2.5 μm in which a silicon nitride film is formed over a crystalline semiconductor film through a silicon oxide film, wherein the silicon nitride film contains hydrogen with the concentration of 1×1021/cm3 or less and has characteristic of an etching rate of 10 nm/min or less with respect to mixed solution containing an ammonium hydrogen fluoride (NH4HF2) of 7.13% and an ammonium fluoride (NH4F) of 15.4%.

摘要翻译： 本发明的目的是将适合作为栅极绝缘膜和保护膜的固化和高质量的绝缘膜应用于在应变点或更低的温度下在玻璃基板上形成绝缘膜的技术， 以及通过使用它实现高效率和高可靠性的半导体器件。 在本发明的半导体器件中，通过氧化硅膜在晶体半导体膜上形成沟道长度为0.35〜2.5μm的场效应晶体管的栅极绝缘膜，其中，硅 氮化物膜含有浓度为1×1021 / cm3以下的氢，相对于含有7.13％的氟化氢铵（NH4HF2）和氟化铵（NH4HF2）的混合溶液，蚀刻速率为10nm /分钟以下的特性 NH4F）为15.4％。

公开(公告)号：US20110090207A1

公开(公告)日：2011-04-21

申请号：US12906538

申请日：2010-10-18

申请人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE

IPC分类号： G06F3/038

CPC分类号： G09G3/3208 ,  G09G3/2003 ,  G09G3/3233 ,  G09G2330/021 ,  H01L27/1225 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/78609 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

摘要： Objects are to provide a display device the power consumption of which is reduced, to provide a self-luminous display device the power consumption of which is reduced and which is capable of long-term use in a dark place. A circuit is formed using a thin film transistor in which a highly-purified oxide semiconductor is used and a pixel can keep a certain state (a state in which a video signal has been written). As a result, even in the case of displaying a still image, stable operation is easily performed. In addition, an operation interval of a driver circuit can be extended, which results in a reduction in power consumption of a display device. Moreover, a light-storing material is used in a pixel portion of a self-luminous display device to store light, whereby the display device can be used in a dark place for a long time.

摘要翻译： 目的是提供一种降低功耗的显示装置，以提供其功耗降低并且能够在黑暗处长期使用的自发光显示装置。 使用其中使用高度纯化的氧化物半导体并且像素可以保持一定状态（已经写入视频信号的状态）的薄膜晶体管形成电路。 结果，即使在显示静止图像的情况下，也能够容易地进行稳定的动作。 此外，可以延长驱动电路的操作间隔，这导致显示装置的功耗的降低。 此外，在自发光显示装置的像素部分中使用光存储材料来存储光，由此显示装置可以在黑暗的地方长时间使用。

公开(公告)号：US20110090184A1

公开(公告)日：2011-04-21

申请号：US12902670

申请日：2010-10-12

申请人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

IPC分类号： G06F3/038 ,  H03K19/0175

CPC分类号： H01L27/1255 ,  G09G3/20 ,  G09G3/2092 ,  G09G3/3233 ,  G09G3/3291 ,  G09G3/36 ,  G09G3/3648 ,  G09G2300/0439 ,  G09G2300/08 ,  G09G2300/0842 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/184 ,  G11C19/28 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/7869 ,  H03K17/161 ,  H03K19/00315 ,  H03K19/096

摘要： To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10−13 A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.

摘要翻译： 为了减小晶体管的漏电流，可以抑制逻辑电路的故障。 逻辑电路包括晶体管，其包括具有沟道形成层的功能的氧化物半导体层，并且其中截止电流在沟道宽度中为每微米1×10-13A或更小。 作为时钟信号的第一信号，第二信号和第三信号被输入作为输入信号。 作为输出信号输出第四信号和第五信号，其电压状态根据输入的第一至第三信号而被设定。

公开(公告)号：US20110086475A1

公开(公告)日：2011-04-14

申请号：US12968656

申请日：2010-12-15

申请人： Shunpei YAMAZAKI ,  Yasuyuki ARAI ,  Ikuko KAWAMATA

发明人： Shunpei YAMAZAKI ,  Yasuyuki ARAI ,  Ikuko KAWAMATA

IPC分类号： H01L21/336

CPC分类号： H01L27/11546 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/1255 ,  H01L29/66825 ,  H01L29/7881

摘要： In order to form a plurality of semiconductor elements over an insulating surface, in one continuous semiconductor layer, an element region serving as a semiconductor element and an element isolation region having a function to electrically isolate element regions from each other by repetition of PN junctions. The element isolation region is formed by selective addition of an impurity element of at least one or more kinds of oxygen, nitrogen, and carbon and an impurity element that imparts an opposite conductivity type to that of the adjacent element region in order to electrically isolate elements from each other in one continuous semiconductor layer.

摘要翻译： 为了在绝缘表面上形成多个半导体元件，在一个连续半导体层中，用作半导体元件的元件区域和具有通过重复PN结将元件区域彼此电隔离的功能的元件隔离区域。 通过选择性地添加至少一种或多种氧，氮和碳的杂质元素和赋予与相邻元件区相反的导电类型的杂质元素来形成元件隔离区域，以便电隔离元件 在一个连续的半导体层中彼此相交。

公开(公告)号：US20110084264A1

公开(公告)日：2011-04-14

申请号：US12897160

申请日：2010-10-04

申请人： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Akiharu MIYANAGA ,  Masahiro TAKAHASHI ,  Takuya HIROHASHI ,  Takashi SHIMAZU

发明人： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Akiharu MIYANAGA ,  Masahiro TAKAHASHI ,  Takuya HIROHASHI ,  Takashi SHIMAZU

IPC分类号： H01L29/12

CPC分类号： H01L29/7869 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78693 ,  H01L29/78696

摘要： An object is to provide an oxide semiconductor layer having a novel structure which is preferably used for a semiconductor device. Alternatively, another object is to provide a semiconductor device using an oxide semiconductor layer having the novel structure. An oxide semiconductor layer includes an amorphous region which is mainly amorphous and a crystal region containing crystal grains of In2Ga2ZnO7 in a vicinity of a surface, in which the crystal grains are oriented so that the c-axis is almost vertical with respect to the surface. Alternatively, a semiconductor device uses such an oxide semiconductor layer.

摘要翻译： 目的在于提供一种具有新的结构的氧化物半导体层，其优选用于半导体器件。 或者，另一个目的是提供一种使用具有新颖结构的氧化物半导体层的半导体器件。 氧化物半导体层包括主要为非晶质的非晶区域和在表面附近含有In2Ga2ZnO7晶体的晶体区域，其中晶粒取向为使得c轴相对于表面几乎垂直。 或者，半导体器件使用这种氧化物半导体层。

公开(公告)号：US20110075038A1

公开(公告)日：2011-03-31

申请号：US12964838

申请日：2010-12-10

申请人： Shunpei YAMAZAKI ,  Hajime KIMURA ,  Mai AKIBA ,  Aya ANZAI ,  Yu YAMAZAKI

发明人： Shunpei YAMAZAKI ,  Hajime KIMURA ,  Mai AKIBA ,  Aya ANZAI ,  Yu YAMAZAKI

IPC分类号： H04N5/30

CPC分类号： G09G3/006 ,  G09G3/2022 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3291 ,  G09G2300/0809 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/061 ,  G09G2320/0233 ,  G09G2320/0285 ,  G09G2320/029 ,  G09G2320/0295 ,  G09G2320/043 ,  G09G2320/048 ,  G09G2320/0693

摘要： To provide a light emitting device without nonuniformity of luminance, a correcting circuit for correcting a video signal supplied to each pixel to a light emitting device. The correcting circuit is stored with data of a dispersion of a characteristic of a driving TFT among pixels and data of a change over time of luminance of a light emitting element. Further, by correcting a video signal inputted to the light emitting device in conformity with a characteristic of the driving TFT of each pixel and a degree of a deterioration of the light emitting element based on the over-described two data, nonuniformity of luminance caused by a deterioration of an electroluminescent layer and nonuniformity of luminance caused by dispersion of a characteristic of the driving TFT are restrained.

摘要翻译： 为了提供没有不均匀亮度的发光器件，用于将提供给每个像素的视频信号校正到发光器件的校正电路。 校正电路与像素中的驱动TFT的特性的色散的数据和发光元件的亮度随时间的变化的数据一起存储。 此外，通过根据上述两个数据，校正根据每个像素的驱动TFT的特性和发光元件的劣化程度输入到发光器件的视频信号，由 抑制了电致发光层的劣化以及由驱动TFT的特性的分散引起的亮度的不均匀性。

公开(公告)号：US20110068438A1

公开(公告)日：2011-03-24

申请号：US12952925

申请日：2010-11-23

申请人： Shunpei YAMAZAKI ,  Yasuyuki ARAI

发明人： Shunpei YAMAZAKI ,  Yasuyuki ARAI

IPC分类号： H01L29/06

CPC分类号： G06K19/07749 ,  G06K19/07728 ,  G06K19/0775 ,  H01L23/49855 ,  H01L23/66 ,  H01L24/48 ,  H01L24/73 ,  H01L2223/6677 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/19041 ,  H01Q1/2216 ,  H01Q23/00 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In inlets used for ID tags and the like, a defective connection between an integrated circuit part and an antenna is suppressed by improvement of tolerance for a bending or a pressing pressure. The integrated circuit part includes a semiconductor chip and a multilayer substrate having a concave portion. The semiconductor chip is mounted on the bottom of the concave portion. The multilayer substrate includes a connection electrode at the top surface and a connection electrode connected to the semiconductor chip on the bottom of the concave portion. The connection electrode on the bottom of the concave portion is connected to the connection electrode at the top surface by a penetration electrode inside a multilayer substrate. By such a configuration, the semiconductor chip is connected to the antenna.

摘要翻译： 在用于ID标签等的入口中，通过提高弯曲或按压压力的公差来抑制集成电路部件和天线之间的有缺陷的连接。 集成电路部分包括半导体芯片和具有凹部的多层基板。 半导体芯片安装在凹部的底部。 多层基板包括在顶表面处的连接电极和连接到凹部底部的半导体芯片的连接电极。 凹部的底部的连接电极通过多层基板内的贯通电极在顶面与连接电极连接。 通过这样的结构，将半导体芯片连接到天线。

公开(公告)号：US20110062461A1

公开(公告)日：2011-03-17

申请号：US12949165

申请日：2010-11-18

申请人： Shunpei YAMAZAKI ,  Yasuyuki ARAI

发明人： Shunpei YAMAZAKI ,  Yasuyuki ARAI

IPC分类号： H01L33/08

CPC分类号： H01L51/5237 ,  H01L27/3244 ,  H01L51/524 ,  H01L51/5259 ,  H01L51/5275 ,  H01L51/5281 ,  H01L2251/5315 ,  H05B33/04

摘要： An organic EL display device of active matrix type wherein insulated-gate field effect transistors formed on a single-crystal semiconductor substrate are overlaid with an organic EL layer; characterized in that the single-crystal semiconductor substrate (413 in FIG. 4) is held in a vacant space (414) which is defined by a bed plate (401) and a cover plate (405) formed of an insulating material, and a packing material (404) for bonding the bed and cover plates; and that the vacant space (414) is filled with an inert gas and a drying agent, whereby the organic EL layer is prevented from oxidizing.

摘要翻译： 其中有源矩阵型的有机EL显示器件，其中形成在单晶半导体衬底上的绝缘栅场效应晶体管与有机EL层重叠; 其特征在于，单晶半导体衬底（图4中的413）保持在由隔板（401）和由绝缘材料形成的盖板（405）限定的空白空间（414）中，并且 包装材料（404），用于粘合床和盖板; 并且空置空间（414）填充有惰性气体和干燥剂，由此防止有机EL层氧化。

公开(公告)号：US20110057186A1

公开(公告)日：2011-03-10

申请号：US12869278

申请日：2010-08-26

申请人： Shunpei YAMAZAKI ,  Toshinari SASAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU

发明人： Shunpei YAMAZAKI ,  Toshinari SASAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU

IPC分类号： H01L29/786

CPC分类号： H01L27/1225 ,  H01L27/1214 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/3248 ,  H01L27/3262 ,  H01L27/3265 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/45 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693

摘要： It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.

摘要翻译： 本发明的目的是制造使用具有良好的电特性和高可靠性的薄膜晶体管作为开关元件的高度可靠的显示装置。 在包括非晶氧化物半导体的底栅薄膜晶体管中，在已经通过热处理脱水或脱氢的氧化物半导体层与源电极层和漏电极层中的每一个之间形成具有晶体区的氧化物导电层， 使用金属材料形成。 因此，可以减小氧化物半导体层与源极电极层和漏极电极层中的每一个之间的接触电阻; 因此，可以提供具有良好电特性的薄膜晶体管和使用该薄膜晶体管的高度可靠的显示装置。