公开(公告)号：US20060244028A1

公开(公告)日：2006-11-02

申请号：US11479045

申请日：2006-06-30

申请人： Wei Gao ,  Yoshi Ono

发明人： Wei Gao ,  Yoshi Ono

IPC分类号： H01L29/94

CPC分类号： H01L29/66583 ,  H01L21/28088 ,  H01L21/28194 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/78

摘要： MOSFET gate structures are provided comprising a niobium monoxide gate, overlying a gate dielectric. The niobium monoxide gate may have a low work function suitable for use as an NMOS gate.

摘要翻译： 提供包括覆盖栅极电介质的铌氧化物栅极的MOSFET栅极结构。 铌氧化物栅可能具有适合用作NMOS栅极的低功函数。

公开(公告)号：US20060240662A1

公开(公告)日：2006-10-26

申请号：US11114862

申请日：2005-04-25

申请人： John Conley ,  Yoshi Ono ,  David Evans

发明人： John Conley ,  Yoshi Ono ,  David Evans

IPC分类号： H01L21/4763 ,  H01L21/31 ,  H01L21/469

CPC分类号： H01L21/0228 ,  C23C16/042 ,  C23C16/407 ,  C23C16/45525 ,  H01L21/0217 ,  H01L21/02175 ,  H01L21/02334 ,  H01L21/0234 ,  H01L21/3141

摘要： A method for selective ALD of ZnO on a wafer preparing a silicon wafer; patterning the silicon wafer with a blocking agent in selected regions where deposition of ZnO is to be inhibited, wherein the blocking agent is taken from a group of blocking agents includes isopropyl alcohol, acetone and deionized water; depositing a layer of ZnO on the wafer by ALD using diethyl zinc and H2O at a temperature of between about 140° C. to 170° C.; and removing the blocking agent from the wafer.

摘要翻译： 在准备硅晶片的晶片上的ZnO的选择性ALD的方法; 在其中要抑制ZnO沉积的选定区域中用封闭剂对硅晶片进行图案化，其中封闭剂取自一组封闭剂，包括异丙醇，丙酮和去离子水; 在约140℃至170℃的温度下，使用二乙基锌和H 2 O 2，通过ALD在晶片上沉积ZnO层。 并从晶片上除去封闭剂。

公开(公告)号：US20060091554A1

公开(公告)日：2006-05-04

申请号：US11311546

申请日：2005-12-19

申请人： Wei Pan ,  Yoshi Ono ,  David Evans ,  Sheng Hsu

发明人： Wei Pan ,  Yoshi Ono ,  David Evans ,  Sheng Hsu

IPC分类号： H01L23/48

CPC分类号： H01L21/28562 ,  H01L21/76841 ,  H01L2221/1078

摘要： A multi-layered barrier metal thin film is deposited on a substrate by atomic layer chemical vapor deposition (ALCVD). The multi-layer film may comprise several different layers of a single chemical species, or several layers each of distinct or alternating chemical species. In a preferred embodiment, the multi-layer barrier thin film comprises a Tantalum Nitride layer on a substrate, with a Titanium Nitride layer deposited thereon. The thickness of the entire multi-layer film may be approximately fifty Angstroms. The film has superior film characteristics, such as anti-diffusion capability, low resistivity, high density, and step coverage, when compared to films deposited by conventional chemical vapor deposition (CVD). The multi-layered barrier metal thin film of the present invention has improved adhesion characteristics and is particularly suited for metallization of a Copper film thereon.

摘要翻译： 通过原子层化学气相沉积（ALCVD）将多层阻挡金属薄膜沉积在衬底上。 多层膜可以包括单个化学物质的几个不同层，或者各个不同的或交替的化学物质的几个层。 在优选实施例中，多层阻挡薄膜包括在衬底上的氮化钽层，其上沉积有氮化钛层。 整个多层膜的厚度可以是大约50埃。 当与通过常规化学气相沉积（CVD）沉积的膜相比时，该膜具有优异的膜特性，例如抗扩散能力，低电阻率，高密度和台阶覆盖。 本发明的多层阻挡金属薄膜具有改善的粘合特性，特别适用于其上的铜膜的金属化。

公开(公告)号：US07029944B1

公开(公告)日：2006-04-18

申请号：US10956789

申请日：2004-09-30

申请人： John F. Conley, Jr. ,  Yoshi Ono ,  Wei Gao ,  David R. Evans

发明人： John F. Conley, Jr. ,  Yoshi Ono ,  Wei Gao ,  David R. Evans

IPC分类号： H01L21/00

CPC分类号： H01L21/31053 ,  H01L21/31133 ,  H01L27/14627 ,  H01L27/14685

摘要： A method of forming a microlens structure is provided along with a CCD array structure employing a microlens array. An embodiment of the method comprises providing a substrate having a surface with photo-elements on the surface; depositing a transparent material overlying the surface of the substrate; depositing a CMP stop overlying the transparent material; depositing a lens-shaping layer overlying the CMP stop layer; depositing and patterning a photoresist layer overlying the lens-shaping layer to form openings to expose the lens-shaping layer; introducing a first isotropic etchant into the openings and etching the lens-shaping layer where exposed to form initial lens shapes having a radius; stripping the photoresist; exposing the lens-shaping layer to a second isotropic etchant to increase the radius of the lens shapes; transferring the lens shape through the CMP stop layer into the transparent material using an anisotropic etch; and depositing a lens material overlying the transparent material, whereby the lens shapes are at least partially filled with lens material. Planarizing the lens material using CMP and stopping at the CMP stop layer.

摘要翻译： 提供一种形成微透镜结构的方法以及采用微透镜阵列的CCD阵列结构。 该方法的一个实施例包括提供具有在表面上具有光元件的表面的基底; 沉积覆盖衬底表面的透明材料; 沉积覆盖透明材料的CMP停止点; 沉积覆盖CMP停止层的透镜成形层; 沉积和图案化覆盖透镜成形层的光致抗蚀剂层以形成露出透镜成形层的开口; 在开口中引入第一各向同性蚀刻剂并蚀刻暴露于其中形成具有半径的初始透镜形状的透镜成形层; 剥离光刻胶; 将透镜成形层暴露于第二各向同性蚀刻剂以增加透镜形状的半径; 使用各向异性蚀刻将透镜形状通过CMP停止层转移到透明材料中; 以及沉积覆盖透明材料的透镜材料，由此透镜形状至少部分地被透镜材料填充。 使用CMP对透镜材料进行平面化，并在CMP停止层处停止。

公开(公告)号：US20050211665A1

公开(公告)日：2005-09-29

申请号：US10813789

申请日：2004-03-26

申请人： Wei Gao ,  Yoshi Ono ,  John Conley

发明人： Wei Gao ,  Yoshi Ono ,  John Conley

IPC分类号： G02B1/11 ,  B29C33/38 ,  B29D11/00 ,  B29L11/00 ,  G02B3/00

CPC分类号： G02B3/0012 ,  G02B3/0056

摘要： Methods of forming microlens structure are provided. A hard mask is formed overlying a transparent material. An opening is patterned into the hard mask. Both the patterned hard mask and the underlying transparent material are exposed to a wet etch that etches the hard mask and the transparent material. As the hard mask is etched the opening increases exposing more of the transparent material. Depending on the etch selectivity, a lens shape is formed with sloped sidewalls. The lens opening may be filled with lens material to form a lens.

摘要翻译： 提供了形成微透镜结构的方法。 形成覆盖透明材料的硬掩模。 将开口图案化成硬掩模。 图案化的硬掩模和下面的透明材料都暴露于蚀刻硬掩模和透明材料的湿蚀刻。 当硬掩模被蚀刻时，开口增加了暴露更多的透明材料。 根据蚀刻选择性，形成具有倾斜侧壁的透镜形状。 透镜开口可以被透镜材料填充以形成透镜。

公开(公告)号：US20050170667A1

公开(公告)日：2005-08-04

申请号：US11089947

申请日：2005-03-24

申请人： John Conley ,  Yoshi Ono ,  Rajendra Solanki

发明人： John Conley ,  Yoshi Ono ,  Rajendra Solanki

IPC分类号： H01L21/205 ,  C23C16/40 ,  C23C16/44 ,  C23C16/455 ,  C23C16/56 ,  H01L21/28 ,  H01L21/314 ,  H01L21/316 ,  H01L21/336 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/49 ,  H01L29/51 ,  B05D5/12

CPC分类号： H01L21/0228 ,  C23C16/40 ,  C23C16/45529 ,  C23C16/45531 ,  C23C16/56 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/022 ,  H01L21/02205 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/3142 ,  H01L21/31616 ,  H01L21/31645 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66583

摘要： An atomic layer deposition method to deposit an oxide nanolaminate thin film is provided. The method employs a nitrate ligand in a first precursor as an oxidizer for a second precursor to form the oxide nanolaminates. Using a hafnium nitrate precursor and an aluminum precursor, the method is well suited for the deposition of a high k hafnium oxide/aluminum oxide nanolaminate dielectric for gate dielectric or capacitor dielectric applications on a hydrogen-terminated silicon surface.

摘要翻译： 提供沉积氧化物Naminaminate薄膜的原子层沉积方法。 该方法在第一前体中使用硝酸盐配体作为第二前体的氧化剂，以形成氧化物纳米级氨酸盐。 使用硝酸铪前体和铝前体，该方法非常适合于在氢封端的硅表面上沉积栅极电介质或电容器电介质应用的高k铪氧化物/氧化铝纳米酸盐电介质。

公开(公告)号：US06689646B1

公开(公告)日：2004-02-10

申请号：US10295579

申请日：2002-11-14

申请人： Pooran Chandra Joshi ,  John W. Hartzell ,  Masahiro Adachi ,  Yoshi Ono

发明人： Pooran Chandra Joshi ,  John W. Hartzell ,  Masahiro Adachi ,  Yoshi Ono

IPC分类号： H01L2100

CPC分类号： H01L29/66757 ,  H01L29/78603 ,  H01L29/78609

摘要： A method is provided for fabricating a thin film oxide. The method include forming a first silicon layer, applying a second silicon layer overlying the first silicon layer, oxidizing the second silicon layer at a temperature of less than 400° C. using an inductively coupled plasma source, and forming a thin film oxide layer overlying the first silicon layer. In some cases, the thin film oxide layer overlies the oxidized second silicon layer and is formed by a high-density plasma enhanced chemical vapor deposition process and an inductively coupled plasma source at a temperature of less than 400° C. In some cases, the thin film oxide layer and the first silicon layer are incorporated into a thin film transistor and the thin film oxide layer has a fixed oxide charge density of 3×1011 per square centimeter.

摘要翻译： 提供了制造薄膜氧化物的方法。 该方法包括形成第一硅层，施加覆盖第一硅层的第二硅层，使用电感耦合等离子体源在小于400℃的温度下氧化第二硅层，以及形成覆盖层的薄膜氧化物层 第一硅层。 在一些情况下，薄膜氧化物层覆盖氧化的第二硅层，并且通过高密度等离子体增强化学气相沉积工艺和电感耦合等离子体源在低于400℃的温度下形成。在一些情况下， 薄膜氧化物层和第一硅层结合到薄膜晶体管中，并且薄膜氧化物层具有固定的氧化物电荷密度为3×10 11每平方厘米。

公开(公告)号：US06686212B1

公开(公告)日：2004-02-03

申请号：US10286100

申请日：2002-10-31

申请人： John F. Conley, Jr. ,  Yoshi Ono ,  Rajendra Solanki

发明人： John F. Conley, Jr. ,  Yoshi Ono ,  Rajendra Solanki

IPC分类号： H01L2100

CPC分类号： H01L21/28194 ,  C23C16/405 ,  C23C16/45529 ,  H01L21/3141 ,  H01L21/31604 ,  H01L21/31683 ,  H01L21/823857 ,  H01L28/56 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545

摘要： A method of forming a layer of high-&kgr; dielectric material in an integrated circuit includes preparing a silicon substrate; depositing a first layer of metal oxide using ALD with a metal nitrate precursor; depositing another layer of metal oxide using ALD with a metal chloride precursor; and completing the integrated circuit.

摘要翻译： 在集成电路中形成高k电介质材料层的方法包括制备硅衬底; 使用ALD与金属硝酸盐前体沉积第一层金属氧化物; 使用ALD与金属氯化物前体沉积另一层金属氧化物; 并完成集成电路。

公开(公告)号：US06627503B2

公开(公告)日：2003-09-30

申请号：US10137567

申请日：2002-04-30

申请人： Yanjun Ma ,  Yoshi Ono

发明人： Yanjun Ma ,  Yoshi Ono

IPC分类号： H01L21336

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66583

摘要： A multilayer dielectric stack is provided which has alternating layers of a high-k material and an interposing material. The presence of the interposing material and the thinness of the high-k material layers reduces or eliminate effects of crystallization within the high-k material, even at relatively high annealing temperatures. The high-k dielectric layers are a metal oxide of preferably zirconium or hafnium. The interposing layers are preferably amorphous aluminum oxide, aluminum nitride, or silicon nitride. Because the layers reduce the effects of crystalline structures within individual layers, the overall tunneling current is reduced. Also provided are atomic layer deposition, sputtering, and evaporation as methods of depositing desired materials for forming the above-mentioned multilayer dielectric stack.

公开(公告)号：US06207589B1

公开(公告)日：2001-03-27

申请号：US09515743

申请日：2000-02-29

申请人： Yanjun Ma ,  Yoshi Ono

发明人： Yanjun Ma ,  Yoshi Ono

IPC分类号： H01L2131

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L28/56 ,  H01L29/513 ,  H01L29/517

摘要： A high-k dielectric film is provided which remains amorphous at relatively high annealing temperatures. The high-k dielectric film is a metal oxide of either Zr or Hf, doped with a trivalent metal, such as Al. Because the film resists the formation of a crystalline structure, interfaces to adjacent films have fewer irregularities. When used as a gate dielectric, the film can be made thin to support smaller transistor geometries, while the surface of the channel region can be made smooth to support high electron mobility. Also provided are CVD, sputtering, and evaporation deposition methods for the above-mentioned, trivalent metal doped high dielectric films.

摘要翻译： 提供了一种高k电介质膜，其在相对高的退火温度下保持非晶态。 高k电介质膜是掺杂有三价金属如Al的Zr或Hf的金属氧化物。 由于膜抵抗晶体结构的形成，与相邻膜的界面具有较少的不规则性。 当用作栅极电介质时，可以使膜变薄以支持更小的晶体管几何形状，同时沟道区域的表面可以被制成平滑的以支持高电子迁移率。 还提供了用于上述三价金属掺杂的高介电膜的CVD，溅射和蒸发沉积方法。