-
公开(公告)号：US06902960B2
公开(公告)日：2005-06-07
申请号：US10295400
申请日：2002-11-14
IPC分类号： H01L21/316 , H01L21/336 , H01L29/49 , H01L29/786 , H01L21/00 , H01L21/84
CPC分类号： H01L29/66757 , H01L29/4908 , H01L29/66772
摘要： An oxide interface and a method for fabricating an oxide interface are provided. The method comprises forming a silicon layer and an oxide layer overlying the silicon layer. The oxide layer is formed at a temperature of less than 400° C. using an inductively coupled plasma source. In some aspects of the method, the oxide layer is more than 20 nanometers (nm) thick and has a refractive index between 1.45 and 1.47. In some aspects of the method, the oxide layer is formed by plasma oxidizing the silicon layer, producing plasma oxide at a rate of up to approximately 4.4 nm per minute (after one minute). In some aspects of the method, a high-density plasma enhanced chemical vapor deposition (HD-PECVD) process is used to form the oxide layer. In some aspects of the method, the silicon and oxide layers are incorporated into a thin film transistor.
摘要翻译： 提供氧化物界面和制造氧化物界面的方法。 该方法包括形成硅层和覆盖硅层的氧化物层。 使用电感耦合等离子体源在低于400℃的温度下形成氧化物层。 在该方法的一些方面，氧化物层的厚度大于20纳米（nm），折射率在1.45和1.47之间。 在该方法的一些方面，通过等离子体氧化硅层形成氧化物层，以每分钟高达约4.4nm的速率产生等离子体氧化物（1分钟后）。 在该方法的某些方面，使用高密度等离子体增强化学气相沉积（HD-PECVD）工艺来形成氧化物层。 在该方法的一些方面，将硅和氧化物层结合到薄膜晶体管中。
-
公开(公告)号：US07196383B2
公开(公告)日：2007-03-27
申请号：US11046571
申请日：2005-01-28
IPC分类号： H01L29/772
CPC分类号： H01L29/66757 , H01L29/4908 , H01L29/66772
摘要： An oxide interface and a method for fabricating an oxide interface are provided. The method comprises forming a silicon layer and an oxide layer overlying the silicon layer. The oxide layer is formed at a temperature of less than 400° C. using an inductively coupled plasma source. In some aspects of the method, the oxide layer is more than 20 nanometers (nm) thick and has a refractive index between 1.45 and 1.47. In some aspects of the method, the oxide layer is formed by plasma oxidizing the silicon layer, producing plasma oxide at a rate of up to approximately 4.4 nm per minute (after one minute). In some aspects of the method, a high-density plasma enhanced chemical vapor deposition (HD-PECVD) process is used to form the oxide layer. In some aspects of the method, the silicon and oxide layers are incorporated into a thin film transistor.
摘要翻译： 提供氧化物界面和制造氧化物界面的方法。 该方法包括形成硅层和覆盖硅层的氧化物层。 使用电感耦合等离子体源在低于400℃的温度下形成氧化物层。 在该方法的一些方面，氧化物层的厚度大于20纳米（nm），折射率在1.45和1.47之间。 在该方法的一些方面，通过等离子体氧化硅层形成氧化物层，以每分钟高达约4.4nm的速率产生等离子体氧化物（1分钟后）。 在该方法的某些方面，使用高密度等离子体增强化学气相沉积（HD-PECVD）工艺来形成氧化物层。 在该方法的一些方面，将硅和氧化物层结合到薄膜晶体管中。
-
公开(公告)号：US06689646B1
公开(公告)日：2004-02-10
申请号：US10295579
申请日：2002-11-14
IPC分类号： H01L2100
CPC分类号： H01L29/66757 , H01L29/78603 , H01L29/78609
摘要： A method is provided for fabricating a thin film oxide. The method include forming a first silicon layer, applying a second silicon layer overlying the first silicon layer, oxidizing the second silicon layer at a temperature of less than 400° C. using an inductively coupled plasma source, and forming a thin film oxide layer overlying the first silicon layer. In some cases, the thin film oxide layer overlies the oxidized second silicon layer and is formed by a high-density plasma enhanced chemical vapor deposition process and an inductively coupled plasma source at a temperature of less than 400° C. In some cases, the thin film oxide layer and the first silicon layer are incorporated into a thin film transistor and the thin film oxide layer has a fixed oxide charge density of 3×1011 per square centimeter.
摘要翻译： 提供了制造薄膜氧化物的方法。 该方法包括形成第一硅层，施加覆盖第一硅层的第二硅层，使用电感耦合等离子体源在小于400℃的温度下氧化第二硅层，以及形成覆盖层的薄膜氧化物层 第一硅层。 在一些情况下，薄膜氧化物层覆盖氧化的第二硅层，并且通过高密度等离子体增强化学气相沉积工艺和电感耦合等离子体源在低于400℃的温度下形成。在一些情况下， 薄膜氧化物层和第一硅层结合到薄膜晶体管中，并且薄膜氧化物层具有固定的氧化物电荷密度为3×10 11每平方厘米。
-
公开(公告)号：US07544625B2
公开(公告)日：2009-06-09
申请号：US11418273
申请日：2006-05-04
IPC分类号： H01L21/31
CPC分类号： H01L21/31608 , C23C16/30 , C23C16/401 , C23C16/402 , C23C16/505 , C23C16/56 , H01L21/02164 , H01L21/02274 , H01L21/02337 , H01L21/0234
摘要： A method is provided for forming a silicon oxide (SiOx) thin-film with embedded nanocrystalline silicon (Si). The method deposits SiOx, where x is in the range of 1 to 2, overlying a substrate, using a high-density (HD) plasma-enhanced chemical vapor deposition (PECVD) process. As a result, the SiOx thin-film is embedded with nanocrystalline Si. The HD PECVD process may use an inductively coupled plasma (ICP) source, a substrate temperature of less than about 400° C., and an oxygen source gas with a silicon precursor. In one aspect, a hydrogen source gas and an inert gas are used, where the ratio of oxygen source gas to inert gas is in the range of about 0.02 to 5. The SiOx thin-film with embedded nanocrystalline Si typically has a refractive index in the range of about 1.6 to 2.2, with an extinction coefficient in the range of 0 to 0.5.
摘要翻译： 提供了一种用嵌入式纳米晶硅（Si）形成氧化硅（SiOx）薄膜的方法。 该方法使用高密度（HD）等离子体增强化学气相沉积（PECVD）工艺沉积SiO x，其中x在1至2的范围内，覆盖在衬底上。 结果，SiO x薄膜埋入有纳米晶体Si。 HD PECVD工艺可以使用电感耦合等离子体（ICP）源，小于约400℃的衬底温度，以及具有硅前体的氧源气体。 一方面，使用氢源气体和惰性气体，其中氧源气体与惰性气体的比例在约0.02至5的范围内。具有嵌入的纳米晶体硅的SiO x薄膜通常具有折射率 约1.6至2.2的范围，消光系数在0至0.5的范围内。
-
公开(公告)号：US07807225B2
公开(公告)日：2010-10-05
申请号：US11698623
申请日：2007-01-26
IPC分类号： C23C16/00
CPC分类号： G02B1/10 , C23C16/308 , C23C16/509 , G02B1/11
摘要： A high-density plasma method is provided for forming a SiOXNY thin-film. The method provides a substrate and introduces a silicon (Si) precursor. A thin-film is deposited overlying the substrate, using a high density (HD) plasma-enhanced chemical vapor deposition (PECVD) process. As a result, a SiOXNY thin-film is formed, where (X+Y 0). The SiOXNY thin-film can be stoichiometric or non-stoichiometric. The SiOXNY thin-film can be graded, meaning the values of X and Y vary with the thickness of the SiOXNY thin-film. Further, the process enables the in-situ deposition of a SiOXNY thin-film multilayer structure, where the different layers may be stoichiometric, non-stoichiometric, graded, and combinations of the above-mentioned types of SiOXNY thin-films.
摘要翻译： 提供了用于形成SiOXNY薄膜的高密度等离子体方法。 该方法提供衬底并引入硅（Si）前体。 使用高密度（HD）等离子体增强化学气相沉积（PECVD）工艺将薄膜沉积在衬底上。 结果，形成SiOXNY薄膜，其中（X + Y <2和Y> 0）。 SiOXNY薄膜可以是化学计量的或非化学计量的。 SiOXNY薄膜可以分级，这意味着X和Y的值随SiOXNY薄膜的厚度而变化。 此外，该方法能够实现SiOXNY薄膜多层结构的原位沉积，其中不同的层可以是化学计量的，非化学计量的，分级的，以及上述类型的SiOXNY薄膜的组合。
-
公开(公告)号：US07723781B2
公开(公告)日：2010-05-25
申请号：US12108333
申请日：2008-04-23
IPC分类号： H01L29/78
CPC分类号： H01L29/78642 , C23C16/24 , C23C16/45523 , C23C16/509 , H01L21/02164 , H01L21/0234 , H01L21/049 , H01L21/31612 , H01L29/66666 , H01L29/6675
摘要： A method is provided for forming a low-temperature vertical gate insulator in a vertical thin-film transistor (V-TFT) fabrication process. The method comprises: forming a gate, having vertical sidewalls and a top surface, overlying a substrate insulation layer; depositing a silicon oxide thin-film gate insulator overlying the gate; plasma oxidizing the gate insulator at a temperature of less than 400° C., using a high-density plasma source; forming a first source/drain region overlying the gate top surface; forming a second source/drain region overlying the substrate insulation layer, adjacent a first gate sidewall; and, forming a channel region overlying the first gate sidewall, in the gate insulator interposed between the first and second source/drain regions. When the silicon oxide thin-film gate insulator is deposited overlying the gate a Si oxide layer, a low temperature deposition process can be used, so that a step-coverage of greater than 65% can be obtained.
摘要翻译： 提供一种用于在垂直薄膜晶体管（V-TFT）制造工艺中形成低温垂直栅极绝缘体的方法。 该方法包括：形成具有垂直侧壁和顶表面的栅极，覆盖衬底绝缘层; 沉积覆盖栅极的氧化硅薄膜栅极绝缘体; 使用高密度等离子体源在低于400℃的温度下等离子体氧化栅极绝缘体; 形成覆盖所述栅极顶表面的第一源极/漏极区域; 在第一栅极侧壁附近形成覆盖衬底绝缘层的第二源极/漏极区域; 以及在位于第一和第二源极/漏极区之间的栅极绝缘体中形成覆盖第一栅极侧壁的沟道区。 当氧化硅薄膜栅极绝缘体沉积在栅极上覆盖Si氧化物层时，可以使用低温沉积工艺，从而可以获得大于65％的阶梯覆盖率。
-
公开(公告)号：US20080079663A1
公开(公告)日：2008-04-03
申请号：US11821148
申请日：2007-06-22
IPC分类号： G09G3/20
摘要： A pixel-by-pixel, digitally-addressable, pixelated, precursor, fluid-assay, active-matrix micro-structure including plural pixels formed on a substrate, wherein each pixel includes (a) at least one non-functionalized, digitally-addressable assay sensor, and (b), disposed operatively adjacent this sensor, digitally-addressable and energizable electromagnetic field-creating structure which is selectively energizable to create, in the vicinity of the at least one assay sensor, an ambient electromagnetic field environment which is structured to assist in functionalizing, as a possession on said at least one assay sensor, at least one digitally-addressable assay site which will display an affinity for a selected fluid-assay material.
摘要翻译： 逐像素，可数字寻址，像素化，前体，流体测定，包括形成在衬底上的多个像素的有源矩阵微结构，其中每个像素包括（a）至少一个非功能化的，可数字寻址的 和（b），其可操作地邻近该传感器设置，可数字寻址和激励的电磁场产生结构，其被选择性地激励以在所述至少一个测定传感器附近产生环境电磁场环境，所述环境电磁场环境被构造 在所述至少一个测定传感器上辅助功能化至少一个可显示对所选择的流体测定材料的亲和性的可数字寻址的测定位点。
-
公开(公告)号：US20120245049A1
公开(公告)日：2012-09-27
申请号：US13488501
申请日：2012-06-05
CPC分类号： C12Q1/6813 , Y10S436/805
摘要： A method of performing a fluid-material assay employing a device including at least one active pixel having a sensor with an assay site functionalized for selected fluid-assay material. The method includes exposing the pixel's sensor assay site to such material, and in conjunction with such exposing, and employing the active nature of the pixel, remotely requesting from the pixel's sensor assay site an assay-result output report. The method further includes, in relation to the employing step, creating, relative to the sensor's assay site in the at least one pixel, a predetermined, pixel-specific electromagnetic field environment.
摘要翻译： 使用包括至少一个具有传感器的活性像素的装置进行流体材料测定的方法，所述传感器具有用于所选流体测定材料功能化的测定位点。 该方法包括将像素的传感器测定位点暴露于这种材料，并结合这样的曝光，并采用像素的主动特性，从像素的传感器测定位点远程请求测定结果输出报告。 该方法还包括关于采用步骤，相对于至少一个像素中的传感器的测定位置产生预定的像素特定的电磁场环境。
-
公开(公告)号：US08232108B2
公开(公告)日：2012-07-31
申请号：US11827176
申请日：2007-07-10
IPC分类号： G01N21/00
CPC分类号： B01J19/0046 , B01J2219/00527 , B01J2219/00605 , B01J2219/00626 , B01J2219/00653 , B01J2219/00659 , B01J2219/00695 , B01J2219/00711 , B01J2219/00713 , B01J2219/00716 , B82Y30/00 , Y10S436/805
摘要： A method for producing an active-matrix, fluid-assay micro-structure including, utilizing low-temperature TFT and Si technology, establishing preferably on a glass or plastic substrate a matrix array of digitally-addressable, assay-material-specific-functionalizable pixels, and employing pixel-specific digital addressing for selected, array-established pixels, individually functionalizing these pixels.
摘要翻译： 一种用于生产活性基质流体测定微结构的方法，包括利用低温TFT和Si技术，优选在玻璃或塑料基材上建立可数字寻址的测定材料特异性可官能化像素的矩阵阵列 并且针对所选择的阵列建立的像素采用像素特定的数字寻址，分别对这些像素进行功能化。
-
公开(公告)号：US20080084363A1
公开(公告)日：2008-04-10
申请号：US11827175
申请日：2007-07-10
IPC分类号： G09G3/20
CPC分类号： B81C1/00246 , B81B2201/0214 , B81C2203/075 , Y10S436/805
摘要： A method of producing a precursor, active-matrix, fluid-assay micro-structure including the steps of (1) utilizing low-temperature TFT and Si technology, establishing preferably on a glass or plastic substrate a matrix array of non-functionalized pixels, and (2) preparing at least one of these pixels for individual, digitally-addressed (a) functionalization, and (b) reading out, ultimately, of completed assay results.
摘要翻译： 一种制备前体，活性基质，流体测定微结构的方法，包括以下步骤：（1）利用低温TFT和Si技术，优选在玻璃或塑料基材上建立非官能化像素的矩阵阵列， 和（2）准备用于个体，数字寻址（a）功能化的这些像素中的至少一个，以及（b）最终读出完成的测定结果。
-
-
-
-
-
-
-
-
-
搜索结果
55 条记录 (耗时 0.027 秒)
