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公开(公告)号：US20090295493A1
公开(公告)日：2009-12-03
申请号：US12131417
申请日：2008-06-02
Applicant: Wayne S. Lee , Akira Kato , Toru Matsuura
Inventor： Wayne S. Lee , Akira Kato , Toru Matsuura
CPC classification number: H03C3/0941 , H03C3/08 , H03C3/095 , H03C3/0975 , H03C3/0991 , H03C5/00
Abstract: A self-calibrating modulator apparatus includes a modulator having a controlled oscillator and an oscillator gain calibration circuit. The oscillator gain calibration circuit includes an oscillator gain coefficient calculator configured to calculate a plurality of frequency dependent oscillator gain coefficients from results of measurements taken at the output of the controlled oscillator in response to a test pattern signal representing a plurality of different reference frequencies. The plurality of frequency dependent gain coefficients determined from the calibration process are stored in a look up table (LUT), where they are made available after the calibration process ends to scale a modulation signal applied to the modulator. By scaling the modulation signal prior to it being applied to the control input of the controlled oscillator, the nonlinear response of the controlled oscillator is countered and the modulation accuracy of the modulator is thereby improved.
Abstract translation: 自校准调制器装置包括具有受控振荡器和振荡器增益校准电路的调制器。 振荡器增益校准电路包括振荡器增益系数计算器，其被配置为响应于表示多个不同参考频率的测试模式信号，从受控振荡器的输出处获得的测量结果计算多个频率相关振荡器增益系数。 从校准过程确定的多个与频率相关的增益系数被存储在查找表（LUT）中，在校准过程结束之后它们可用以缩放施加到调制器的调制信号。 通过在将调制信号应用于受控振荡器的控制输入之前缩放调制信号，可以对受控振荡器的非线性响应进行调整，从而提高调制器的调制精度。
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公开(公告)号：US20090074106A1
公开(公告)日：2009-03-19
申请号：US11857929
申请日：2007-09-19
Applicant: Puay Hoe See , Gurkanwal Singh Sahota , Bo Sun , Gary John Ballantyne , William Ronald Panton , Zae Yong Choi
Inventor： Puay Hoe See , Gurkanwal Singh Sahota , Bo Sun , Gary John Ballantyne , William Ronald Panton , Zae Yong Choi
CPC classification number: H04L27/0008 , H03C3/0916 , H03C3/0975 , H03C5/00 , H03F1/3241 , H03F1/3252 , H04B1/0483 , H04B2001/0425 , H04L27/361 , H04L27/362
Abstract: Transmitters supporting multiple modulation modes and/or multiple frequency bands are described. A transmitter may perform large signal polar modulation, small signal polar modulation, and/or quadrature modulation, which may support different modulation schemes and systems. Circuit blocks may be shared by the different modulation modes to reduce cost and power. For example, a single modulator and a single power amplifier may be used for small signal polar modulation and quadrature modulation. The transmitter may apply pre-distortion to improve performance, to allow a power amplifier to support multiple frequency bands, to allow the power amplifier to operate at higher output power levels, etc. Envelope and phase distortions due to non-linearity of the power amplifier may be characterized for different input levels and different bands and stored at the transmitter. Thereafter, envelope and phase signals may be pre-distorted based on the stored characterizations to compensate for non-linearity of the power amplifier.
Abstract translation: 描述了支持多个调制模式和/或多个频带的发射机。 发射机可以执行可能支持不同调制方案和系统的大信号极性调制，小信号极化调制和/或正交调制。 电路块可以由不同的调制模式共享以降低成本和功率。 例如，单个调制器和单个功率放大器可用于小信号极性调制和正交调制。 发射机可以应用预失真来提高性能，以允许功率放大器支持多个频带，以允许功率放大器在较高的输出功率电平下工作等。由功率放大器的非线性引起的包络和相位失真 可以表征为不同的输入电平和不同的频带并存储在发射机。 此后，包络和相位信号可以基于存储的特征来预失真，以补偿功率放大器的非线性。
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公开(公告)号：US20080032649A1
公开(公告)日：2008-02-07
申请号：US11878286
申请日：2007-07-23
Applicant: Toru Matsuura
Inventor： Toru Matsuura
IPC: H04B1/18
CPC classification number: H03C3/0941 , H03C3/095 , H03C3/0975
Abstract: A bandpass type delta sigma modulation section 15 performs delta sigma modulation on an inputted modulation signal such that quantization noise is reduced in a frequency band which requires low noise. An LPF 16 removes a noise component in a high frequency region from the signal on which the delta sigma modulation has been performed. A frequency modulation circuit 1 reduces noise in the frequency band which requires low noise with the bandpass type delta sigma modulation section 15 and the LPF 16, and reduces noise in the vicinity of a direct current component DC with a feedback comparison section 11 and a loop filter 12.
Abstract translation: 带通型ΔΣ调制部分15对输入的调制信号执行ΔΣ调制，使得量化噪声在需要低噪声的频带中减小。 LPF16从已经执行了ΔΣ调制的信号中去除高频区域中的噪声分量。 频率调制电路1通过带通型ΔΣ调制部分15和LPF 16降低需要低噪声的频带中的噪声，并且通过反馈比较部分11和环路减小直流分量DC附近的噪声 过滤器12。
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公开(公告)号：US07142070B2
公开(公告)日：2006-11-28
申请号：US10947847
申请日：2004-09-23
Applicant: Stefan Herzinger , Günter Märzinger , Burkhard Neurauter , Robert Weigel
Inventor： Stefan Herzinger , Günter Märzinger , Burkhard Neurauter , Robert Weigel
IPC: H03C3/06
CPC classification number: H03C3/0975 , H03C3/0925 , H03C3/0933 , H03C3/0941
Abstract: A two-point modulator arrangement is specified, said arrangement being developed with respect to conventional two-point modulators to the effect that the high-pass coupling-in point of the modulator that comprises a phase locked loop is formed by an expanded loop filter. In accordance with the present principle, the expanded loop filter comprises a coupling-in element, at which the modulation signal is combined with the output signal of a phase comparator. A voltage-controlled oscillator having only one tuning input can thus advantageously be used.
Abstract translation: 指定了两点调制器布置，所述布置相对于传统的两点调制器被展开，使得包括锁相环的调制器的高通耦合点由扩展环路滤波器形成。 根据本原理，扩展环路滤波器包括耦合入元件，其中调制信号与相位比较器的输出信号组合。 因此，可以有利地使用仅具有一个调谐输入的压控振荡器。
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公开(公告)号：US20050130609A1
公开(公告)日：2005-06-16
申请号：US10737473
申请日：2003-12-16
Applicant: Thomas Nagode , Peter Nanni , Louis Nigra , Greg Black , Keith Tilley
Inventor： Thomas Nagode , Peter Nanni , Louis Nigra , Greg Black , Keith Tilley
CPC classification number: H04B1/04 , H03C1/06 , H03C3/0975 , H03F1/3223 , H03F1/34 , H03F3/24 , H03F2200/102 , H03F2200/105 , H03F2201/3221 , H03F2201/3227 , H04B2001/0416 , H04B2001/0433 , H04B2001/0441
Abstract: A transmitter circuit (200, 400, 510) and method reduces amplitude modulation distortion in an amplifier (210). The transmitter circuit (200, 400, 510) includes a power control error data generator (230), a feedforward predistortion data generator (240), feedforward adder logic (250) and the amplifier (210). The power control error data generator (230) receives amplitude modulation data (252) and an RF coupled output signal (254) and, in response, produces power control error data (256). The feedforward predistortion data generator (240) receives the amplitude modulation data (252) and, in response, produces feedforward predistortion data (258). The feedforward adder logic (250) receives the power control error data (256) and the feedforward predistortion data (258) and, in response, produces power control data (260). The amplifier (210) receives the power control data (260) and an RF input signal (261) and, in response, produces an RF output signal (262), such that the power control data (260) reduces amplitude modulation distortion in the RF output signal (262).
Abstract translation: 发射机电路（200,400,510）和方法减小放大器（210）中的调幅失真。 发射机电路（200,400,510）包括功率控制误差数据发生器（230），前馈预失真数据生成器（240），前馈加法器逻辑（250）和放大器（210）。 功率控制误差数据发生器（230）接收幅度调制数据（252）和RF耦合的输出信号（254），作为响应，产生功率控制误差数据（256）。 前馈预失真数据生成器（240）接收幅度调制数据（252），作为响应，产生前馈预失真数据（258）。 前馈加法器逻辑（250）接收功率控制误差数据（256）和前馈预失真数据（258），作为响应，产生功率控制数据（260）。 放大器（210）接收功率控制数据（260）和RF输入信号（261），并且作为响应产生RF输出信号（262），使得功率控制数据（260）降低功率控制数据 RF输出信号（262）。
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Patent Agency Ranking
公开(公告)号：US06754474B1
公开(公告)日：2004-06-22
申请号：US09621815
申请日：2000-07-21
Applicant: Patrick Savelli , Vassiliki Nikolopoulou
Inventor： Patrick Savelli , Vassiliki Nikolopoulou
IPC: H04B104
CPC classification number: H03C3/0983 , H03C3/0933 , H03C3/0975 , H03L7/1974 , H04B1/408 , H04L27/2017
Abstract: In a transmission system, a modulator and a fractional frequency divider are introduced into the control loop of a voltage-controlled oscillator. It is shown that the benefit of this is a reduction in noise associated with the reduction of noise due to using a divider with a lower division coefficient. In one embodiment, the fractional divider is obtained by selecting different dividers in turn in accordance with temporal proportions corresponding to a required division fraction.
Abstract translation: 在传输系统中，调制器和分数分频器被引入到压控振荡器的控制环路中。 显示出这样的益处是由于使用具有较低分频系数的分频器而与降低噪声相关联的噪声的降低。 在一个实施例中，通过根据对应于所需分割分数的时间比例依次选择不同的分频器来获得分数分频器。
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公开(公告)号：US06734749B2
公开(公告)日：2004-05-11
申请号：US09867921
申请日：2001-05-29
Applicant: Sven Mattisson , Håkan Eriksson
Inventor： Sven Mattisson , Håkan Eriksson
IPC: H03C300
CPC classification number: H03C3/0975 , H03C3/0925 , H03C3/0933 , H03C3/0941 , H03C3/095
Abstract: Direct frequency modulation of a phase-locked loop (PLL) output signal is achieved by means of a modulation signal comprising a digital sequence. The digital modulation signal is coupled to the input of the VCO of the PLL, and is also coupled to drive an up-down counter. The output of the counter is coupled to a D/A converter to provide a compensation signal for the PLL. When the counter output reaches values representing modulation-induced phase errors of +360 degrees and −360 degrees, the counter generates signals respectively corresponding thereto to adjust the PLL frequency divider.
Abstract translation: 通过包括数字序列的调制信号来实现锁相环（PLL）输出信号的直接频率调制。 数字调制信号耦合到PLL的VCO的输入，并且还耦合以驱动上下计数器。 计数器的输出耦合到D / A转换器，为PLL提供补偿信号。 当计数器输出达到表示+ 360度和-360度的调制诱发相位误差的值时，计数器产生分别对应的信号以调整PLL分频器。
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公开(公告)号：US06734741B2
公开(公告)日：2004-05-11
申请号：US10006607
申请日：2001-11-30
Applicant: Robert B. Staszewski , Dirk Leipold , Khurram Muhammad , Chih-Ming Hung
Inventor： Robert B. Staszewski , Dirk Leipold , Khurram Muhammad , Chih-Ming Hung
IPC: H03L700
CPC classification number: H03C3/0975 , H03C3/0941 , H03C3/095 , H03C3/0958 , H03C3/0966 , H03K19/0016 , H03L7/085 , H03L7/087 , H03L7/091 , H03L7/093 , H03L7/099 , H03L7/16 , H03L2207/50 , H04L7/0029
Abstract: A transmitter (10) based on a frequency synthesizer includes an LC tank (12) of a digitally controlled oscillator (DCO) with various arrays of capacitors. The LC tank 12 is divided into two major groups that reflect two general operational modes: acquisition and tracking. The first group (process/voltage/temperature and acquisition) approximately sets the desired center frequency of oscillation initially, while the second group (integer and fractional tracking) precisely controls the oscillating frequency during the actual operation. For highly accurate outputs, dynamic element matching (DEM) is used in the integer tracking controller to reduce non-linearities caused by non-uniform capacitor values. Also, a preferred range of the integer tracking capacitor array may be used for modulation after the selected channel has been acquired. A digital sigma-delta modulator circuit (50) drives a capacitor array (14d) in response to the fractional bits of the error word. On mode switches, the accumulated error is recalculated to a phase restart value to prevent perturbations.
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公开(公告)号：US20040066240A1
公开(公告)日：2004-04-08
申请号：US10679792
申请日：2003-10-06
Inventor： Robert B. Staszewski , Dirk Leipold , Khurram Muhammad , Chih-Ming Hung
IPC: H03L007/00
CPC classification number: H03C3/0975 , H03C3/0941 , H03C3/095 , H03C3/0958 , H03C3/0966 , H03K19/0016 , H03L7/085 , H03L7/087 , H03L7/091 , H03L7/093 , H03L7/099 , H03L7/16 , H03L2207/50 , H04L7/0029
Abstract: A transmitter (10) based on a frequency synthesizer includes an LC tank (12) of a digitally controlled oscillator (DCO) with various arrays of capacitors. The LC tank 12 is divided into two major groups that reflect two general operational modes: acquisition and tracking. The first group (process/voltage/temperature and acquisition) approximately sets the desired center frequency of oscillation initially, while the second group (integer and fractional tracking) precisely controls the oscillating frequency during the actual operation. For highly accurate outputs, dynamic element matching (DEM) is used in the integer tracking controller to reduce non-linearities caused by non-uniform capacitor values. Also, a preferred range of the integer tracking capacitor array may be used for modulation after the selected channel has been acquired. A digital sigma-delta modulator circuit (50) drives a capacitor array (14d) in response to the fractional bits of the error word. On mode switches, the accumulated error is recalculated to a phase restart value to prevent perturbations.
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公开(公告)号：US20030174025A1
公开(公告)日：2003-09-18
申请号：US10390557
申请日：2003-03-17
Inventor： John C. Ho , Charles Stone , Thomas McClelland
IPC: H03B001/00
CPC classification number: H03L7/1806 , H03B5/04 , H03B5/36 , H03B5/366 , H03C3/0975 , H03L1/02 , H03L2207/12
Abstract: A precision oven-controlled crystal oscillator (OCXO) uses an adjustment feedback signal that, when mixed with a reference signal from a stable reference oscillator, accurately controls the generation of an output signal from a voltage controlled crystal oscillator (VCXO). An OCXO according to the invention has high stability and high accuracy. The digital OXCO can be manufactured at low cost, and is particularly beneficial for Code Division Multiple Access (CDMA) base station applications in cellular communication networks an the like.
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