公开(公告)号：US20130194762A1

公开(公告)日：2013-08-01

申请号：US13718473

申请日：2012-12-18

Applicant: Minebea Co., Ltd.

Inventor： Hidetoshi HIJIKATA ,  Takayuki MATSUI ,  Kazuo TAKADA ,  Haruka MIYAJI

IPC: H05K1/02

CPC classification number: H05K1/0271 ,  H05K1/028 ,  H05K1/0281 ,  H05K1/147 ,  H05K2201/10204

Abstract: A motor control device includes a circuit board having a control circuit controlling electric power to be supplied to a motor, a base fixedly supporting the circuit board, a flexible printed circuit supplying electric power to the motor, a pin terminal disposed on the circuit board, being electrically connected with the control circuit, a dummy pin terminal disposed on the circuit board, being electrically free from the control circuit, a wiring pattern land disposed on the FPC, being electrically connected with the pin terminal, and a dummy wiring pattern land disposed on the FPC, being connected with the dummy pin terminal.

Abstract translation: 一种电动机控制装置，包括：电路板，其具有控制供给电动机的电力的控制电路;固定地支撑所述电路板的基座;向所述电动机供给电力的柔性印刷电路;配置在所述电路基板上的销子端子; 与所述控制电路电连接，设置在所述电路板上的虚拟针端子与所述控制电路电气相连，设置在所述FPC上的布线图案区域与所述引脚端子电连接，以及设置的虚拟布线图案区域 在FPC上，与虚拟针端子连接。

公开(公告)号：US20130176701A1

公开(公告)日：2013-07-11

申请号：US13823700

申请日：2010-10-01

Applicant: Mitsuaki Toda ,  Yoshio Imamura ,  Takuya Hasegawa

Inventor： Mitsuaki Toda ,  Yoshio Imamura ,  Takuya Hasegawa

IPC: H05K1/18 ,  H05K3/32

CPC classification number: H05K1/182 ,  H05K1/0269 ,  H05K1/188 ,  H05K3/32 ,  H05K2201/09918 ,  H05K2201/10204 ,  H05K2201/10636 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/4913

Abstract: A component-embedded substrate includes an electrically insulating base (11) of resin, an electric or electronic embedded component (8) and a dummy embedded component (7) both embedded in the insulating base (11), a conductor pattern (18) formed on at least one side of the insulating base (11) and connected directly to or indirectly via a connection layer (6) to the embedded component (8) and the dummy embedded component (7), and a mark (10) formed on a surface of the dummy embedded component (7) and used as a reference when the conductor pattern (18) is formed, whereby positional accuracy of the conductor pattern (18) relative to the embedded component (8) can be improved.

Abstract translation: 部件嵌入式基板包括树脂电绝缘基座（11），嵌入在绝缘基座（11）中的电气或电子嵌入式部件（8）和虚拟嵌入部件（7），形成有导体图案（18） 在所述绝缘基体（11）的至少一侧上并且直接连接到所述嵌入部件（8）和所述虚拟嵌入部件（7）的连接层（6）或间接连接，以及形成在所述绝缘基体 并且当形成导体图案（18）时用作参考，从而能够提高导体图案（18）相对于嵌入部件（8）的位置精度。

公开(公告)号：US20120188733A1

公开(公告)日：2012-07-26

申请号：US13499109

申请日：2010-05-14

Applicant: Hiroki Miyazaki ,  Gen Nagaoka ,  Yasuhiro Hida

Inventor： Hiroki Miyazaki ,  Gen Nagaoka ,  Yasuhiro Hida

IPC: H05K7/06 ,  B32B37/12 ,  H05K1/16

CPC classification number: H05K3/323 ,  H05K2201/10204 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T156/10

Abstract: To provide a substrate mounting structure with which reliability can be improved. This substrate mounting structure includes an ACF (2) disposed on a surface (1a) of a glass substrate (1) and SMDs (3) mounted on the surface (1a) of the glass substrate (1) via the ACF (2) and disposed in an SMD mounting region (10a) on the surface (1a) of the glass substrate (1). Then, dummy components (4) are respectively disposed in a region adjacent to one side of the SMD mounting region (10a) and in a region adjacent to the other side thereof.

Abstract translation: 提供可提高可靠性的基板安装结构。 该基板安装结构包括经由ACF（2）设置在玻璃基板（1）的表面（1a）上的ACF（2）和安装在玻璃基板（1）的表面（1a）上的SMD（3），以及 设置在玻璃基板（1）的表面（1a）上的SMD安装区域（10a）中。 然后，虚拟部件（4）分别设置在与SMD安装区域（10a）的一侧相邻的区域中，并且在与其另一侧相邻的区域中。

公开(公告)号：US20120044036A1

公开(公告)日：2012-02-23

申请号：US13205777

申请日：2011-08-09

Applicant: Wei Shang

Inventor： Wei Shang

IPC: H01H85/20

CPC classification number: H01H85/046 ,  H01H69/022 ,  H05K1/0293 ,  H05K3/28 ,  H05K2201/10204 ,  H05K2201/10636 ,  Y02P70/611

Abstract: The invention provides a safety unit integrated on a PCB (printed circuit board) and the PCB, and pertains to the technical field of circuit protecting device. The safety unit comprises: first electrode terminals; copper wire connected to the first electrode terminals at both ends respectively; an insulating paint film covering the copper wire; a chip fixed resistor disposed on the insulating paint film; and second electrode terminals connected to both ends of the chip fixed resistor respectively; wherein the first electrode terminals, the second electrode terminals and the copper wire are firmly pressed to be fixed onto the substrate of the printed circuit board. The safety unit provided by the invention possesses such characteristics as being simple in structure, low in cost and small in volume.

Abstract translation: 本发明提供集成在PCB（印刷电路板）和PCB上的安全单元，并且涉及电路保护装置的技术领域。 安全单元包括：第一电极端子; 铜线分别连接到两端的第一电极端子; 覆盖铜线的绝缘漆膜; 设置在绝缘漆膜上的芯片固定电阻器; 和分别连接到芯片固定电阻两端的第二电极端子; 其中第一电极端子，第二电极端子和铜线被牢固地按压以固定到印刷电路板的基板上。 本发明提供的安全单元具有结构简单，成本低，体积小等特点。

公开(公告)号：US20120036710A1

公开(公告)日：2012-02-16

申请号：US13159276

申请日：2011-06-13

Applicant: Philip H. Thompson ,  Larry D. Pottebaum

Inventor： Philip H. Thompson ,  Larry D. Pottebaum

IPC: H05K3/30

CPC classification number: H05K9/0088 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/97 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025 ,  H05K3/0052 ,  H05K3/3405 ,  H05K3/3442 ,  H05K2201/10204 ,  H05K2201/10371 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/4913 ,  Y10T29/49144 ,  H01L2224/85 ,  H01L2924/00

Abstract: An electronic module with an integrated electromagnetic shield using surface mount shield wall components has been disclosed. Each surface mount shield wall component provides side shielding of the circuitry within the overmolded electronic module and provides an exposed conductive shield wall section to which a top conductive shield can be applied. By including the shield structure as part of the overmolded electronic module, the need for a separate shield and separate process steps for installing the separate shield can be eliminated. Each surface mount shield wall component comprises a non-conductive portion that provides stability during a reflow soldering process, but at least a sacrificial portion of the non-conductive portion can be removed to reduce the amount of area occupied by the overmoldable shield structure.

Abstract translation: 已经公开了具有使用表面安装屏蔽壁部件的集成电磁屏蔽的电子模块。 每个表面安装屏蔽壁部件提供了包覆成型的电子模块内的电路的侧面屏蔽，并且提供暴露的导电屏蔽壁部分，可以向其施加顶部导电屏蔽。 通过将屏蔽结构作为包覆成型的电子模块的一部分，可以消除对单独的屏蔽和用于安装单独的屏蔽的单独的工艺步骤的需要。 每个表面安装屏蔽壁部件包括在回流焊接过程期间提供稳定性的非导电部分，但是可以去除非导电部分的至少牺牲部分以减少由可包覆模制的屏蔽结构占据的面积的量。

公开(公告)号：US08078310B2

公开(公告)日：2011-12-13

申请号：US12440776

申请日：2007-09-25

Applicant: Tomotaka Nishimoto ,  Yasuhiro Okada ,  Chihiro Igarashi ,  Takanori Yoshitake ,  Nobuhisa Watanabe

Inventor： Tomotaka Nishimoto ,  Yasuhiro Okada ,  Chihiro Igarashi ,  Takanori Yoshitake ,  Nobuhisa Watanabe

IPC: G06F19/00 ,  D02G1/00 ,  D01D10/00

CPC classification number: H05K3/323 ,  H05K3/3494 ,  H05K3/361 ,  H05K2201/10151 ,  H05K2201/10204 ,  H05K2203/0195 ,  H05K2203/163

Abstract: A component crimping apparatus control method which enables a measuring tool to directly measure a temperature of a part pressed by a pressing head. The component crimping apparatus control method is applied to a component crimping apparatus which crimps a component onto a plate-shaped workpiece, and causes a measuring tool shaped identically as the workpiece to measure a temperature or a pressure of a pressed part in a pressing process of pressing a component onto the workpiece using a heated pressing head. The method includes acquiring information indicating whether or not the measuring tool is held in the component crimping apparatus, and, in the case where the information indicating that the measuring tool is held is acquired, positioning the measuring tool identically as the workpiece, and executing the pressing process on the component to be attached to the measuring tool after the positioning.

Abstract translation: 一种部件压接装置控制方法，其使得测量工具能够直接测量由按压头按压的部件的温度。 将部件压接装置控制方法应用于将部件压接到板状工件上的部件压接装置，并且使得形成为相同的工件的测量工具在压制过程中测量压制部件的温度或压力 使用加热的压头将部件压在工件上。 该方法包括获取指示测量工具是否保持在部件压接装置中的信息，并且在获取表示测量工具被保持的信息的情况下，将测量工具相同地定位为工件，并执行 定位后要附着在测量工具上的部件按压过程。

公开(公告)号：US20110253782A1

公开(公告)日：2011-10-20

申请号：US13087603

申请日：2011-04-15

Applicant: Andrew Campbell ,  Brian Docherty ,  James Churchman ,  Kevin Maidment ,  Nick McGarvey

Inventor： Andrew Campbell ,  Brian Docherty ,  James Churchman ,  Kevin Maidment ,  Nick McGarvey

IPC: G06K7/00

CPC classification number: G06K7/0013 ,  G06K7/0008 ,  H05K1/0219 ,  H05K1/0275 ,  H05K2201/09263 ,  H05K2201/10204

Abstract: Dummy data wires or PCB tracks are employed that run close to and parallel with the wires or tracks that carry the actual data between the card and the microprocessor. These dummy data tracks or wires are driven with dummy random data at a similar data rate to that used on the real data track(s) or wire(s). As the dummy tracks or wires are close to the “real” data tracks or wires and the dummy data is random, attempts to capacitively sense the actual data will be disrupted. To counter this method of detection the dummy data track may be connected to loads (resistive, capacitive or both) to ensure that current flows when dummy data is applied to the tracks. The loads may be selected such that the current flows are similar to those in the real data track. This is achieved by determining the terminating impedances on the real data track and using similar values on the dummy data tracks. Or, the strategy may be to ensure that the current flow in the dummy data tracks are much higher than the real data track current, in which case the total magnetic field will be dominated by the dummy data and the “real” signal will be “drowned out” by the dummy data signals.

Abstract translation: 采用虚拟数据线或PCB轨迹，其接近并与导线或跟踪平行，这些导线或轨道承载卡和微处理器之间的实际数据。 这些虚拟数据轨道或导线以与实际数据轨道或线路上使用的相似数据速率的虚拟随机数据驱动。 由于虚拟轨道或导线靠近“实际”数据轨道或导线，并且虚拟数据是随机的，所以试图电容性地感测实际数据将被破坏。 为了对这种检测方法，虚拟数据磁道可以连接到负载（电阻，电容或两者），以确保当虚拟数据被应用于磁道时电流流动。 可以选择负载，使得电流与实际数据轨道中的相似。 这是通过确定实际数据轨道上的端接阻抗并在虚拟数据轨道上使用相似的值来实现的。 或者，策略可能是确保虚拟数据磁道中的当前流量远高于实际数据磁道电流，在这种情况下，总磁场将由虚拟数据支配，“真实”信号将为“ 淹没“的虚拟数据信号。

公开(公告)号：US07984546B2

公开(公告)日：2011-07-26

申请号：US12166373

申请日：2008-07-02

Applicant: Mark J. LaPlante ,  Thomas Weiss

Inventor： Mark J. LaPlante ,  Thomas Weiss

IPC: B23P19/00

CPC classification number: H05K3/4061 ,  H05K3/225 ,  H05K2201/10204 ,  H05K2203/0108 ,  H05K2203/0195 ,  H05K2203/0338 ,  H05K2203/163 ,  Y10T29/49144 ,  Y10T29/5313 ,  Y10T29/53174 ,  Y10T29/53178 ,  Y10T29/53191 ,  Y10T83/04 ,  Y10T156/1052 ,  Y10T156/1056 ,  Y10T156/107 ,  Y10T156/137

Abstract: An apparatus tool for filling vias in a product greensheet and/or repairing vias in a product greensheet. The apparatus tool utilizes a transfer greensheet having filled vias in a fixed array, which vias are punched into the product greensheet to either repair or fill the via of the product greensheet. The apparatus tool employs position determining means such as a camera, a punch head and a corresponding punch die and an activating means to activate the punch head to punch the transfer greensheet via to fill the product greensheet via. The transfer greensheet has a fixed array of filled vias and a transfer greensheet station employs a fixed plate having a plurality of vacuum ports positioned in the non-via areas of the transfer greensheet which secures the transfer greensheet during the repair or fill method. The product greensheet is held by a vacuum plate.

Abstract translation: 一种用于在产品毛坯中填充通孔和/或修理产品毛坯中的通孔的装置工具。 该设备工具使用具有固定阵列中的填充通孔的转移毛坯，该通孔冲入产品毛坯中以修复或填充产品毛坯的通孔。 设备工具采用位置确定装置，例如照相机，打孔头和相应的冲头模具以及激活装置，以激活打孔头以冲压传送毛坯通过以填充产品毛坯通孔。 转移毛坯具有固定的填充通孔阵列，并且转移毛坯站采用固定板，其具有定位在转移毛坯的非通孔区域中的多个真空端口，其在修复或填充方法期间固定转移毛坯。 产品毛坯由真空板保持。

公开(公告)号：US20110133753A1

公开(公告)日：2011-06-09

申请号：US12959049

申请日：2010-12-02

Applicant: Swen Weitemeier ,  Christian Oldendorf

Inventor： Swen Weitemeier ,  Christian Oldendorf

IPC: G01R27/28

CPC classification number: G01R31/2815 ,  G01R31/2839 ,  G06F21/86 ,  H05K1/0275 ,  H05K2201/10151 ,  H05K2201/10204

Abstract: An electronic device, and associated method, provided with a circuit board (10), with a set of input contacts (IN/COM), a set of output contacts (OUT/COM) and an electrical circuit (18) connected between the input contacts (IN/COM) and the output contacts (OUT/COM) and a controller. The controller carries out a real-time test of the circuit board using a test signal introduced into the electrical circuit, the electrical circuit (18) being designed as a passive network having a characteristic transfer function and provided with at least two separate partial circuits (18′, 18″) wherein the separate partial circuits are electrically connected in the assembled state by cooperation with at least one of: at least one device components and/or assembly components (181).

Abstract translation: 一种具有电路板（10）的电子设备和相关方法，具有一组输入触点（IN / COM），一组输出触点（OUT / COM）和连接在输入端之间的电路（18） 触点（IN / COM）和输出触点（OUT / COM）和控制器。 控制器使用引入电路的测试信号对电路板进行实时测试，电路（18）被设计为具有特征传递功能的无源网络，并且具有至少两个分开的部分电路（ 18'，18“），其中所述分开的部分电路通过与至少一个器件部件和/或组件部件（181）中的至少一个协作而以组装状态电连接。

公开(公告)号：US20110043095A1

公开(公告)日：2011-02-24

申请号：US12837354

申请日：2010-07-15

Applicant: Jae-Yong Lee ,  Won-Kyu Kwak ,  Jae-Jung Kim ,  Tae-Jin Park ,  Dong-Young Sung

Inventor： Jae-Yong Lee ,  Won-Kyu Kwak ,  Jae-Jung Kim ,  Tae-Jin Park ,  Dong-Young Sung

IPC: F21K2/08 ,  H05K1/00 ,  H05K1/11

CPC classification number: H05K1/0259 ,  H01L27/3223 ,  H01L51/56 ,  H05K1/0269 ,  H05K2201/0108 ,  H05K2201/10204 ,  H05K2203/173

Abstract: There is provided a master glass having a structure capable of preventing damage caused by static electricity. The master glass is a substrate on which a deposition process is experimentally performed by being experimentally loaded loading the master glass into a deposition apparatus before starting the deposition process of the substrate for electronic devices. In one embodiment, a master glass includes first conductive patterns and a second conductive pattern. The first conductive patterns are formed to correspond to a deposition pattern required in a substrate for electronic devices. The second conductive pattern electrically connects all the first conductive patterns to one another.

Abstract translation: 提供了具有能够防止由静电引起的损坏的结构的主玻璃。 主玻璃是通过在开始用于电子设备的基板的沉积工艺之前通过实验负载将主玻璃加载到沉积设备中而实验沉积过程的基板。 在一个实施例中，主玻璃包括第一导电图案和第二导电图案。 形成第一导电图案以对应于用于电子设备的基板中所需的沉积图案。 第二导电图案将所有第一导电图案彼此电连接。