公开(公告)号：US20100055408A1

公开(公告)日：2010-03-04

申请号：US12321091

申请日：2009-01-15

Applicant: Jong-Don Lee ,  Jun-Ho Lee ,  Shin-Hyo Bae ,  Seung-Hee Hong ,  Seung-Duk Cho

Inventor： Jong-Don Lee ,  Jun-Ho Lee ,  Shin-Hyo Bae ,  Seung-Hee Hong ,  Seung-Duk Cho

IPC: B32B3/10 ,  C07C69/76 ,  C08K5/12 ,  C08K5/41 ,  C08K5/36 ,  H01L21/306

CPC classification number: C07C69/76 ,  C07C69/753 ,  C07C69/92 ,  C07C317/44 ,  C07C323/62 ,  C07C2602/44 ,  G03F7/091 ,  Y10T428/24612

Abstract: A light absorbent for forming an organic anti-reflective layer, represented by the following formula 1 or formula 2, is provided: wherein A represents a substituted or unsubstituted, linear or branched, saturated tetravalent hydrocarbon group, a substituted or unsubstituted, linear or branched, saturated hydrocarbon group and containing one or more heteroatoms, a substituted or unsubstituted aromatic group, a substituted or unsubstituted heteroaromatic group, a substituted or unsubstituted alicyclic group, a substituted or unsubstituted heteroalicyclic group, a substituted or unsubstituted diaryl ether, a substituted or unsubstituted diaryl sulfide, a substituted or unsubstituted diaryl sulfoxide, a substituted or unsubstituted diaryl ketone, or a substituted or unsubstituted diaryl bisphenol A; R1, R2, and R3 each independently represent a hydrogen atom, a halogen atom, a substituted or unsubstituted alkyl group a substituted or unsubstituted aryl group, a substituted or unsubstituted acetal group, or a substituted or unsubstituted hydroxyl group; and n is an integer from 2 to 500.

Abstract translation: 提供用于形成由下式1或式2表示的有机抗反射层的光吸收剂：其中A表示取代或未取代的直链或支链饱和四价烃基，取代或未取代的直链或支链 饱和烃基，含有一个或多个杂原子，取代或未取代的芳族基团，取代或未取代的杂芳族基团，取代或未取代的脂环族基团，取代或未取代的杂脂族基团，取代或未取代的二芳基醚，取代或未取代的 二芳基硫醚，取代或未取代的二芳基亚砜，取代或未取代的二芳基酮，或取代或未取代的二芳基双酚A; R 1，R 2和R 3各自独立地表示氢原子，卤素原子，取代或未取代的烷基，取代或未取代的芳基，取代或未取代的缩醛基或取代或未取代的羟基; n为2〜500的整数。

公开(公告)号：US20080210922A1

公开(公告)日：2008-09-04

申请号：US12000829

申请日：2007-12-18

Applicant: Jun-ho Lee ,  Sung-kwan Kang ,  Hion-suck Baik ,  Jong-wook Lee

Inventor： Jun-ho Lee ,  Sung-kwan Kang ,  Hion-suck Baik ,  Jong-wook Lee

IPC: H01L47/00 ,  H01L21/28 ,  G11C11/00

CPC classification number: H01L45/144 ,  G11C13/0004 ,  G11C2213/72 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1666

Abstract: In various embodiments, the present disclosure may provide a storage node. In various implementations, the storage node may include a bottom electrode having a non-planar bottom surface that conforms with and is connected to a non-planar top surface of a diode electrode of a memory device. The storage node may further include a phase change layer on top of a bottom diode and a top electrode on a top surface of a phase change layer.

Abstract translation: 在各种实施例中，本公开可以提供存储节点。 在各种实施方式中，存储节点可以包括底部电极，其具有与存储器件的二极管电极的非平面顶表面一致并连接到非平面底表面的底部电极。 存储节点还可以在底二极管的顶部和相变层的顶表面上的顶电极之间包括相变层。

公开(公告)号：US07396761B2

公开(公告)日：2008-07-08

申请号：US11605092

申请日：2006-11-28

Applicant: Sung-Kwan Kang ,  Jong-Wook Lee ,  Yong-Hoon Son ,  Yu-Gyun Shin ,  Jun-Ho Lee

Inventor： Sung-Kwan Kang ,  Jong-Wook Lee ,  Yong-Hoon Son ,  Yu-Gyun Shin ,  Jun-Ho Lee

IPC: H01L21/336 ,  H01L21/4763 ,  H01L21/44

CPC classification number: H01L29/66795 ,  H01L29/7851

Abstract: In a semiconductor device and a method of manufacturing the semiconductor device, a plug and a channel structure are formed. The plug fills an opening and the channel structure extends upwardly from the plug. The channel structure has a substantially vertical sidewall. The opening is formed through an insulation structure located on a substrate. The plug and the channel structure comprise a material in a single crystalline state that is changed from an amorphous state by an irradiation of a laser beam. The channel structure is doped with impurities such as boron, phosphorus or arsenic.

Abstract translation: 在半导体器件和半导体器件的制造方法中，形成插头和沟道结构。 塞子填充开口并且通道结构从插头向上延伸。 通道结构具有基本垂直的侧壁。 开口通过位于基板上的绝缘结构形成。 塞子和通道结构包括通过激光束的照射从非晶状态改变的单晶状态的材料。 通道结构掺杂有杂质如硼，磷或砷。

公开(公告)号：US20080158940A1

公开(公告)日：2008-07-03

申请号：US11980357

申请日：2007-10-31

Applicant: Dong-seok Suh ,  Jun-ho Lee

Inventor： Dong-seok Suh ,  Jun-ho Lee

IPC: G11C11/00 ,  H01L45/00

CPC classification number: G11C13/0069 ,  G11C13/0004 ,  G11C13/02 ,  G11C2013/0073 ,  G11C2213/56 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2436 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/144 ,  Y10S977/754

Abstract: Provided are a non-volatile memory device and a method of operating the non-volatile memory device. The non-volatile memory device includes a switching device and a storage node connected to the switching device, wherein the storage node comprises: a first electrode connected to the switching device; a chalcogenide material layer formed on the first electrode; and a second electrode formed on the chalcogenide material layer, and one of the first and second electrodes comprises an electrode contact layer formed adjacent to a limited region of the chalcogenide material layer, and a property of the electrode region adjacent to the chalcogenide material layer is changed reversibly according to the direction in which a current is applied, thereby changing between a high resistance state and a low resistance state.

Abstract translation: 提供了非易失性存储器件和操作非易失性存储器件的方法。 所述非易失性存储器件包括连接到所述开关器件的开关器件和存储节点，其中所述存储节点包括：连接到所述开关器件的第一电极; 形成在第一电极上的硫族化物材料层; 和形成在硫族化物材料层上的第二电极，第一和第二电极中的一个电极包括与硫族化物材料层的有限区域相邻形成的电极接触层，与硫族化物材料层相邻的电极区域的性质是 根据施加电流的方向可逆地改变，从而在高电阻状态和低电阻状态之间变化。

公开(公告)号：US20080110809A1

公开(公告)日：2008-05-15

申请号：US11983635

申请日：2007-11-09

Applicant: Seong-goo Kang ,  Jun-ho Lee ,  Ki-sang Kang ,  Hyun-seop Shim ,  Do-young Kam ,  Jae-il Lee ,  Ju-il Kang

Inventor： Seong-goo Kang ,  Jun-ho Lee ,  Ki-sang Kang ,  Hyun-seop Shim ,  Do-young Kam ,  Jae-il Lee ,  Ju-il Kang

IPC: G01R31/28 ,  B07C5/344 ,  G01R31/319 ,  B65G65/02

CPC classification number: H01L21/67282 ,  G01R31/2867 ,  G01R31/2893 ,  H01L21/67271 ,  Y10S414/135

Abstract: A multifunctional handler system for electrical testing of semiconductor devices is provided. The multifunctional handler system comprises: (1) a semiconductor device processing section comprising a loading unit including a buffer, a sorting unit including a separate marking machine, and a unloading unit; (2) a semiconductor device testing section, separate from the semiconductor device processing section, comprises a test chamber, the test chamber is separated into two or more test spaces, and the test spaces of the test chamber include a second chamber positioned at a lower position, a first chamber positioned above the second chamber, and pipelines for connecting the first and second chambers to each other; and (3) a host computer which is independently connected to the semiconductor device processing section and the semiconductor device testing section and controls tray information, test results, marking information, and test program information.

Abstract translation: 提供了一种用于半导体器件的电测试的多功能处理器系统。 多功能处理器系统包括：（1）半导体器件处理部分，包括包括缓冲器的加载单元，包括单独的标记机的分拣单元和卸载单元; （2）与半导体器件处理部分分离的半导体器件测试部分包括测试室，测试室被分离成两个或更多个测试空间，并且测试室的测试空间包括位于下部的第二室 位置，位于第二室上方的第一室以及用于将第一和第二室彼此连接的管道; 和（3）独立地连接到半导体器件处理部分和半导体器件测试部分并且控制托盘信息，测试结果，标记信息和测试程序信息的主计算机。

公开(公告)号：US20080105899A1

公开(公告)日：2008-05-08

申请号：US11858288

申请日：2007-09-20

Applicant: Young-pil KIM ,  Jin-bum KIM ,  Jun-ho LEE ,  Jung-yun WON ,  In-sun JUNG

Inventor： Young-pil KIM ,  Jin-bum KIM ,  Jun-ho LEE ,  Jung-yun WON ,  In-sun JUNG

IPC: H01L29/778 ,  H01L21/336

CPC classification number: H01L21/26513 ,  H01L29/66575 ,  H01L29/66628 ,  H01L29/78

Abstract: A fabrication method and a related semiconductor device are disclosed. The method includes; forming a gate structure on a semiconductor substrate, the gate structure comprising a stacked combination a gate dielectric pattern, a gate, a capping layer pattern and an epitaxial blocking layer pattern, forming sidewall spacers on the gate structure covering at least sidewall portions of the gate dielectric pattern, the gate, and the capping layer pattern, wherein the epitaxial blocking layer pattern is exposed on a top surface of the gate structure, forming an elevated epitaxial layer on the semiconductor substrate outside the gate structure using a selective epitaxial growth process, and forming elevated source/drain regions by applying an ion implantation process to the semiconductor substrate following formation of the elevated epitaxial layer, wherein the epitaxial blocking layer is a nitrogen enhanced layer relative to the capping layer pattern.

Abstract translation: 公开了一种制造方法和相关的半导体器件。 该方法包括： 在半导体衬底上形成栅极结构，所述栅极结构包括层叠组合栅极电介质图案，栅极，覆盖层图案和外延阻挡层图案，在所述栅极结构上形成至少覆盖所述栅极的侧壁部分的侧壁间隔物 电介质图案，栅极和覆盖层图案，其中外延阻挡层图案暴露在栅极结构的顶表面上，使用选择性外延生长工艺在栅极结构外部的半导体衬底上形成升高的外延层，以及 通过在形成升高的外延层之后对半导体衬底施加离子注入工艺来形成升高的源/漏区，其中外延阻挡层相对于覆盖层图案是氮增强层。

公开(公告)号：US07286787B2

公开(公告)日：2007-10-23

申请号：US11132307

申请日：2005-05-19

Applicant: Chung-guk Baek ,  Jun-ho Lee

Inventor： Chung-guk Baek ,  Jun-ho Lee

IPC: G03G21/18 ,  G03G21/16

CPC classification number: G03G21/1832 ,  G03G2215/0119 ,  G03G2221/1609

Abstract: A developing unit and an electro-photographic image forming apparatus having the same are provid. The developing unit includes a housing and a photosensitive medium, which has an end exposed to the outer side of the housing and that is rotatably mounted on the housing. A photosensitive medium shutter shields the exposed part of the photosensitive medium when a door is opened and exposes the exposed part of the photosensitive medium to the outside when the door is closed. The photosensitive medium shutter includes a first shielding plate that is moved between a first location where the exposed part is shielded and a second location where the exposed part is exposed to the outside of the housing. A second shielding plate is spread at the first location with respect to the first shielding plate and is overlapped with the first shielding plate at the second location.

Abstract translation: 提供了具有该显影单元的电子照相图像形成装置。 显影单元包括壳体和感光介质，其具有暴露于壳体的外侧并且可旋转地安装在壳体上的端部。 当门打开时，感光介质快门屏蔽感光介质的暴露部分，并且当门关闭时将感光介质的暴露部分暴露于外部。 感光介质快门包括第一屏蔽板，其在暴露部分被屏蔽的第一位置和暴露部分暴露于壳体外部的第二位置之间移动。 第二屏蔽板相对于第一屏蔽板在第一位置处扩展，并且在第二位置处与第一屏蔽板重叠。

公开(公告)号：US07283931B2

公开(公告)日：2007-10-16

申请号：US10820747

申请日：2004-04-09

Applicant: Je-hyoung Ryu ,  Sung-jin Lee ,  Jun-ho Lee ,  Tae-gyu Kim

Inventor： Je-hyoung Ryu ,  Sung-jin Lee ,  Jun-ho Lee ,  Tae-gyu Kim

IPC: G06F11/30 ,  G21C17/00 ,  G01R31/00 ,  G01R31/14

CPC classification number: G01R31/2877

Abstract: An inspecting apparatus for a semiconductor device having a match plate; a contact module combined with the match plate, including a radiation unit contacting a semiconductor device, and a test unit pressing leads of the semiconductor device; and a thermally conductive pad installed on a contacting face of the radiation unit of the contact module, to transfer heat from the semiconductor device to the radiation unit of the contact module. The present invention provides an inspecting apparatus for semiconductor devices that improves reliability of testing for durability of semiconductor devices against heat, and minimizes damage to the semiconductor devices during testing.

Abstract translation: 一种具有匹配板的半导体器件的检查装置; 与所述匹配板组合的接触模块，包括接触半导体器件的辐射单元和所述半导体器件的压接引线的测试单元; 以及安装在接触模块的辐射单元的接触面上的导热焊盘，以将热量从半导体器件传递到接触模块的辐射单元。 本发明提供一种用于半导体器件的检查装置，其提高半导体器件耐热耐久性的测试的可靠性，并且在测试期间最小化对半导体器件的损坏。

公开(公告)号：US20070165690A1

公开(公告)日：2007-07-19

申请号：US11500919

申请日：2006-08-09

Applicant: Jae-ryung Yoo ,  Gi-bum Kim ,  Jun-ho Lee

Inventor： Jae-ryung Yoo ,  Gi-bum Kim ,  Jun-ho Lee

IPC: H01S3/10 ,  H01S3/04 ,  H01S3/08

CPC classification number: H01S5/141 ,  H01S3/0804 ,  H01S3/109 ,  H01S5/0207 ,  H01S5/041 ,  H01S5/183 ,  H01S5/18305

Abstract: Provided is a VECSEL capable of achieving an excellent efficiency of a SHG crystal and being manufactured in a compact size. The VECSEL includes a laser chip, an external mirror, an SHG crystal, a lens element, and a wavelength selective mirror. The laser chip generates a first wavelength light, and the external mirror is spaced from the laser chip to face the front side of the laser chip. The SHG crystal is located between the external mirror and the laser chip to double the frequency of the first wavelength light to make a second wavelength light. The lens element is located between the SHG crystal and the laser chip to allow the first wavelength light generated from the laser chip to converge at the SHG crystal, and the wavelength selective mirror is located between the SHG crystal and the lens element to transmit the first wavelength light and reflect the second wavelength light to the external mirror.

Abstract translation: 提供了能够实现SHG晶体的优异效率并且被制造成紧凑尺寸的VECSEL。 VECSEL包括激光芯片，外部反射镜，SHG晶体，透镜元件和波长选择镜。 激光芯片产生第一波长光，并且外部反射镜与激光芯片间隔开以面对激光芯片的前侧。 SHG晶体位于外部反射镜和激光芯片之间，使第一波长光的频率加倍以产生第二波长的光。 透镜元件位于SHG晶体和激光芯片之间，以使激光芯片产生的第一波长光在SHG晶体上会聚，并且波长选择镜位于SHG晶体和透镜元件之间，以传输第一个 将第二波长的光反射到外部反射镜。

公开(公告)号：US07245867B2

公开(公告)日：2007-07-17

申请号：US11128287

申请日：2005-05-13

Applicant: Chung-guk Baek ,  Dong-hoon Park ,  Jun-ho Lee

Inventor： Chung-guk Baek ,  Dong-hoon Park ,  Jun-ho Lee

IPC: G03G21/10

CPC classification number: G03G21/12 ,  G03G21/105

Abstract: A waste toner collecting apparatus separates waste toner remaining on an outer circumferential surface of a photosensitive medium when a visible image is transferred thereon and stores the separated waste toner. An electrophotographic image forming device includes the waste toner collecting apparatus. The waste toner collecting apparatus includes a cleaning blade that separates the waste toner from a photosensitive medium by scratching the outer circumferential surface of the photosensitive medium. A waste toner container stores the waste toner. The waste toner separated from the photosensitive medium is transported to the waste toner container through a waste toner passage. An agitating plate reciprocates inside the waste toner passage to prevent accumulation of the waste toner.

Abstract translation: 废弃调色剂收集装置将可见图像转印到感光介质的外周表面上残留的废调色剂分离并存储分离的废调色剂。 电子照相图像形成装置包括废调色剂收集装置。 废粉收集装置包括清洁刮板，其通过刮擦感光介质的外圆周表面而将废调色剂与感光介质分离。 废调色剂容器存储废调色剂。 从感光介质分离的废调色剂通过废调色剂通道输送到废调色剂容器。 搅拌板在废调色剂通道内往复运动，以防止废调色剂的积聚。