公开(公告)号：US06635498B2

公开(公告)日：2003-10-21

申请号：US10222718

申请日：2002-08-16

申请人： Scott R. Summerfelt ,  Guoqiang Xing ,  Luigi Colombo ,  Sanjeev Aggarwal ,  Theodore S. Moise, IV

发明人： Scott R. Summerfelt ,  Guoqiang Xing ,  Luigi Colombo ,  Sanjeev Aggarwal ,  Theodore S. Moise, IV

IPC分类号： H01L2100

CPC分类号： H01L27/11502 ,  H01L21/31122 ,  H01L21/32136 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/60

摘要： A method of fabricating a ferroelectric capacitor is disclosed. The method comprises the patterning of a top electrode layer and a dielectric layer to form a capacitor stack structure having sidewalls associated therewith. Prior to patterning the bottom electrode layer, a protective film is formed on the sidewalls of the capacitor stack structure in order to protect the dielectric material from conductive contaminants associated with a subsequent patterning of the bottom electrode layer.

摘要翻译： 公开了一种制造铁电电容器的方法。 该方法包括图案化顶部电极层和电介质层以形成具有与其相关联的侧壁的电容器堆叠结构。 在图形化底部电极层之前，在电容器堆叠结构的侧壁上形成保护膜，以保护电介质材料免受与随后的底部电极层的图案化有关的导电污染物的影响。

公开(公告)号：US06548343B1

公开(公告)日：2003-04-15

申请号：US09702985

申请日：2000-10-31

申请人： Scott R. Summerfelt ,  Theodore S. Moise ,  Guoqiang Xing ,  Luigi Colombo ,  Tomoyuki Sakoda ,  Stephen R. Gilbert ,  Alvin L. S. Loke ,  Shawming Ma ,  Rahim Kavari ,  Laura Wills-Mirkarimi ,  Jun Amano

发明人： Scott R. Summerfelt ,  Theodore S. Moise ,  Guoqiang Xing ,  Luigi Colombo ,  Tomoyuki Sakoda ,  Stephen R. Gilbert ,  Alvin L. S. Loke ,  Shawming Ma ,  Rahim Kavari ,  Laura Wills-Mirkarimi ,  Jun Amano

IPC分类号： H01L218242

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/57

摘要： An embodiment of the instant invention is a method of fabricating a ferroelectric capacitor which is situated over a structure, the method comprising the steps of: forming a bottom electrode on the structure (124 of FIG. 1), the bottom electrode having a top surface and sides; forming a capacitor dielectric (126 of FIG. 1) comprised of a ferroelectric material on the bottom electrode, the capacitor dielectric having a top surface and sides; forming a top electrode (128 and 130 of FIG. 1) on the capacitor dielectric, the top electrode having a top surface and sides, the ferroelectric capacitor is comprised of the bottom electrode, the capacitor dielectric, and the top electrode; forming a barrier layer (118 and 120 of FIG. 1) on the side of the bottom electrode, the side of the capacitor dielectric, and the side of the top electrode; forming a dielectric layer on the barrier layer and the structure, the dielectric having a top surface and a bottom surface; and performing a thermal step for a duration at a temperature between 400 and 900 C. in an ambient comprised of a gas selected from the group consisting of: argon, nitrogen, and a combination thereof, the step of performing a thermal step being performed after the step of forming the barrier layer.

摘要翻译： 本发明的一个实施例是制造位于结构上方的铁电电容器的方法，所述方法包括以下步骤：在所述结构（图1的124）上形成底电极，所述底电极具有顶表面 和边; 在底部电极上形成由铁电材料构成的电容器电介质（图1的126），电容器电介质具有顶表面和侧面; 在电容器电介质上形成顶电极（图1的128和130），顶电极具有顶表面和侧面，铁电电容器由底电极，电容器电介质和顶电极组成; 在底电极侧，电容器电介质侧和顶电极侧形成阻挡层（图1的118和120）; 在所述阻挡层和所述结构上形成电介质层，所述电介质具有顶表面和底表面; 并且在由选自氩，氮及其组合的气体组成的环境中在400-900℃的温度下进行热步骤，所述环境包括：在步骤 形成阻挡层的步骤。

公开(公告)号：US06444542B2

公开(公告)日：2002-09-03

申请号：US09826283

申请日：2001-04-03

申请人： Theodore S. Moise ,  Guoqiang Xing ,  Mark Visokay ,  Justin F. Gaynor ,  Stephen R. Gilbert ,  Francis Celii ,  Scott R. Summerfelt ,  Luigi Colombo

发明人： Theodore S. Moise ,  Guoqiang Xing ,  Mark Visokay ,  Justin F. Gaynor ,  Stephen R. Gilbert ,  Francis Celii ,  Scott R. Summerfelt ,  Luigi Colombo

IPC分类号： H01L2176

CPC分类号： H01L27/11502 ,  H01L21/0332 ,  H01L21/31116 ,  H01L21/31144 ,  H01L27/10852 ,  H01L27/11507 ,  H01L28/55

摘要： A via etch to contact a capacitor with ferroelectric between electrodes together with dielectric on an insulating diffusion barrier includes two-step etch with F-based dielectric etch and Cl- and F-based barrier etch.

摘要翻译： 在电极之间与电介质之间的电介质与绝缘扩散阻挡层之间的电介质接触电容器的通孔蚀刻包括基于F的电介质蚀刻和基于Cl和F的势垒蚀刻的两步蚀刻。

公开(公告)号：US06291282B1

公开(公告)日：2001-09-18

申请号：US09500330

申请日：2000-02-08

申请人： Glen D. Wilk ,  Scott R. Summerfelt

发明人： Glen D. Wilk ,  Scott R. Summerfelt

IPC分类号： H01L218283

CPC分类号： H01L29/4966 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/823842 ,  H01L29/42376 ,  H01L29/495 ,  H01L29/66545 ,  H01L29/6659

摘要： An embodiment of the instant invention is a method of forming a first transistor having a first gate electrode and a second transistor having a second gate electrode on a semiconductor substrate, the method comprising the steps of: forming a conductive material (step 216 of FIG. 2) insulatively disposed over the semiconductor substrate, the conductive material having a work function; and altering a portion of the conductive material (step 218 of FIG. 2) so as to change the work function of the altered conductive material, the conductive material to form the first gate electrode and the altered conductive material to form the second gate electrode. Preferably, the first transistor is an NMOS device, the second transistor is a PMOS device, and the first transistor and the second transistor form a CMOS device. The conductive material is, preferably, comprised of a conductor selected from the group consisting of: Ta, Mo, Ti and any combination thereof. Preferably, the step of altering a portion of the conductive material is comprised of: subjecting the portion of the conductive material to a plasma which incorporates a nitrogen-containing gas.

摘要翻译： 本发明的一个实施例是一种在半导体衬底上形成具有第一栅电极和第二晶体管的第一晶体管的方法，所述第一晶体管具有第二栅电极，所述方法包括以下步骤：形成导电材料（图1的步骤216）。 2）绝缘地设置在半导体衬底上，导电材料具有功函数; 并改变导电材料的一部分（图2的步骤218），以改变改变的导电材料的功函数，导电材料形成第一栅电极和改变的导电材料以形成第二栅电极。 优选地，第一晶体管是NMOS器件，第二晶体管是PMOS器件，并且第一晶体管和第二晶体管形成CMOS器件。 导电材料优选由选自Ta，Mo，Ti及其任何组合的导体组成。 优选地，改变导电材料的一部分的步骤包括：使导电材料的该部分经受含有含氮气体的等离子体。

公开(公告)号：US06275370B1

公开(公告)日：2001-08-14

申请号：US09778641

申请日：2001-02-07

申请人： Bruce E. Gnade ,  Scott R. Summerfelt

发明人： Bruce E. Gnade ,  Scott R. Summerfelt

IPC分类号： H01G406

摘要： A preferred embodiment of this invention comprises an oxidizable layer (e.g. tantalum 48), an oxygen gettering layer (e.g. platinum/tantalum mixture 34) overlaying the oxidizable layer, a noble metal layer (e.g. platinum 36) overlaying the oxygen gettering layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlaying the noble metal layer. The novel structures presented provide electrical connection to high-dielectric-constant materials without the disadvantages of current structures. The oxygen gettering layer controls oxygen diffusion, minimizing the formation of a resistive layer either in the lower electrode or at the lower electrode/substrate interface. The oxygen gettering layer acts as a gettering site for oxygen, where the oxygen oxidizes the reactive metal portion of the layer, leaving the noble metal portion of the layer intact. While the oxides/suboxides (e.g. tantalum pentoxide 40) that are formed are resistive, they are dispersed within the noble metal matrix, leaving a conductive path from the top of the layer to the bottom. This invention provides a stable and electrically conductive electrode for high-dielectric-constant materials while using standard integrated circuit materials to facilitate and economize the manufacturing process.

公开(公告)号：US06215650B1

公开(公告)日：2001-04-10

申请号：US09521504

申请日：2000-03-09

申请人： Bruce E. Gnade ,  Scott R. Summerfelt

发明人： Bruce E. Gnade ,  Scott R. Summerfelt

IPC分类号： H01G406

CPC分类号： H01L28/75 ,  H01L21/32051 ,  H01L28/55 ,  H01L28/56 ,  H01L28/60 ,  Y10S505/818 ,  Y10T29/435 ,  Y10T29/49128

摘要： A preferred embodiment of this invention includes an oxidizable layer (e.g. tantalum 48), an oxygen gettering layer (e.g. platinum/tantalum mixture 34) overlaying the oxidizable layer, a noble metal layer (e.g. platinum 36) overlaying the oxygen gettering layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlaying the noble metal layer. The novel structures presented provide electrical connection to high-dielectric-constant materials without the disadvantages of current structures. The oxygen gettering layer controls oxygen diffusion, minimizing the formation of a resistive layer either in the lower electrode or at the lower electrode/substrate interface. The oxygen gettering layer acts as a gettering site for oxygen, where the oxygen oxidizes the reactive metal portion of the layer, leaving the noble metal portion of the layer intact. While the oxides/suboxides (e.g. tantalum pentoxide 40) that are formed are resistive, they are dispersed within the noble metal matrix, leaving a conductive path from the top of the layer to the bottom. This invention provides a stable and electrically conductive electrode for high-dielectric-constant materials while using standard integrated circuit materials to facilitate and economize the manufacturing process.

摘要翻译： 本发明的优选实施方案包括可氧化层（例如钽48），覆盖可氧化层的氧吸气层（例如铂/钽混合物34），覆盖氧吸气层的贵金属层（例如铂36）和 高介电常数材料层（例如钛酸钡锶38）覆盖贵金属层。 所提出的新颖结构提供与高介电常数材料的电连接，而不存在电流结构的缺点。 氧吸气层控制氧气扩散，使下电极或下电极/衬底界面处的电阻层的形成最小化。 吸氧层用作氧的吸除位置，其中氧氧化层的反应性金属部分，使层的贵金属部分保持完整。 虽然形成的氧化物/低氧化物（例如五氧化二钽40）是电阻的，但是它们分散在贵金属基质内，留下从层的顶部到底部的导电路径。 本发明提供一种用于高介电常数材料的稳定且导电的电极，同时使用标准集成电路材料来促进和节约制造工艺。

公开(公告)号：US5656852A

公开(公告)日：1997-08-12

申请号：US486565

申请日：1995-06-07

申请人： Yasushiro Nishioka ,  Scott R. Summerfelt ,  Kyung-ho Park ,  Pijush Bhattacharya

发明人： Yasushiro Nishioka ,  Scott R. Summerfelt ,  Kyung-ho Park ,  Pijush Bhattacharya

IPC分类号： H01L21/02 ,  H01L29/51 ,  H01L29/92 ,  H01L23/58

CPC分类号： H01L29/516 ,  H01L28/60 ,  H01L28/55

摘要： Generally, the present invention utilizes a lower electrode comprising a sidewall spacer to fore a top surface with rounded comers on which HDC material can be deposited without substantial cracking. An important aspect of the present invention is that the sidewall spacer does not reduce the electrical contact surface area between the lower electrode and the HDC material layer as compared to a similar structure containing a lower electrode without a sidewall spacer. One embodiment of the present invention is a microelectronic structure comprising a supporting layer (e.g. Si substrate 30) having a principal surface, a lower electrode overlying the principal surface of the supporting layer, and a high-dielectric-constant material layer (e.g. BST 44) overlying the top surface of the lower electrode. The lower electrode comprises an adhesion layer (e.g TiN 36), an unreactive layer (e.g. Pt 42), a sidewall spacer (e.g. SiO.sub.2 40) and a top surface, with the sidewall spacer causing the top surface to have a rounded corner. The rounded corner of the top surface minimizes crack formation in the high-dielectric-constant material, layer.

摘要翻译： 通常，本发明使用包括侧壁间隔件的下电极，在顶表面之前具有可以沉积HDC材料而没有实质裂纹的圆角。 本发明的一个重要方面是，与不含侧壁间隔物的下电极相似的结构相比，侧壁间隔物不会减小下电极和HDC材料层之间的电接触表面积。 本发明的一个实施例是一种微电子结构，其包括具有主表面的支撑层（例如Si衬底30），覆盖在支撑层的主表面上的下电极和高介电常数材料层（例如BST 44 ）覆盖下电极的顶表面。 下电极包括粘合层（例如TiN 36），非反应层（例如Pt 42），侧壁间隔物（例如SiO 2 40）和顶表面，侧壁间隔物使顶表面具有圆角。 顶表面的圆角最小化高介电常数材料层中的裂纹形成。

公开(公告)号：US5585300A

公开(公告)日：1996-12-17

申请号：US283441

申请日：1994-08-01

申请人： Scott R. Summerfelt

发明人： Scott R. Summerfelt

IPC分类号： H01G4/12 ,  H01G4/012 ,  H01G4/33 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/04 ,  H01L27/105 ,  H01L27/108 ,  H01L29/788 ,  H01L29/792 ,  H01L21/70

CPC分类号： H01L28/55 ,  H01L28/60

摘要： A preferred embodiment of this invention comprises an oxidizable layer (e.g. TiN 50), an amorphous nitride barrier layer (e.g. Ti-Si-N 34) overlying the oxidizable layer, an oxygen stable layer (e.g. platinum 36) overlying the amorphous nitride layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlying the oxygen stable layer. The amorphous nitride barrier layer substantially inhibits diffusion of oxygen to the oxidizable layer, thus minimizing deleterious oxidation of the oxidizable layer.

摘要翻译： 本发明的优选实施方案包括可氧化层（例如TiN 50），覆盖在可氧化层上的无定形氮化物阻挡层（例如Ti-Si-N 34），覆盖在非晶氮化物层上的氧稳定层（例如铂36） 以及覆盖氧稳定层的高介电常数材料层（例如钛酸钡锶38）。 无定形氮化物阻挡层基本上抑制氧扩散到可氧化层，从而最小化可氧化层的有害氧化。

公开(公告)号：US5554564A

公开(公告)日：1996-09-10

申请号：US283467

申请日：1994-08-01

申请人： Yasushiro Nishioka ,  Scott R. Summerfelt ,  Kyung-ho Park ,  Pijush Bhattacharya

发明人： Yasushiro Nishioka ,  Scott R. Summerfelt ,  Kyung-ho Park ,  Pijush Bhattacharya

IPC分类号： H01L21/02 ,  H01L21/28

CPC分类号： H01L28/60 ,  H01L28/55 ,  H01L28/75 ,  Y10S257/915

摘要： An improved method of forming a capacitor electrode for a microelectronic structure such as a dynamic read only memory is disclosed which has a high dielectric constant (HDC) material as a capacitor dielectric. According to an embodiment of the present invention, the sidewall of the adhesion layer (e.g. TiN 36) in a lower electrode is pre-oxidized after deposition of an unreactive noble metal layer (e.g. Pt 38) but before deposition of an HDC material (e.g. BST 42). An important aspect of the present invention is that the pre-oxidation of the sidewall generally causes a substantial amount of the potential sidewall expansion (and consequent noble metal layer deformation) to occur before deposition of the HDC material.

摘要翻译： 公开了一种形成用于诸如动态只读存储器的微电子结构的电容器电极的改进方法，其具有作为电容器电介质的高介电常数（HDC）材料。 根据本发明的实施例，下层电极中的粘附层（例如TiN 36）的侧壁在沉积非反应性贵金属层（例如Pt 38）之后但在沉积HDC材料之前被预氧化（例如， BST 42）。 本发明的一个重要方面是，侧壁的预氧化通常会在沉积HDC材料之前引起大量潜在的侧壁膨胀（并导致贵金属层变形）。

公开(公告)号：US5528102A

公开(公告)日：1996-06-18

申请号：US491747

申请日：1995-06-19

申请人： Bruce E. Gnade ,  Daron G. Evans ,  Scott R. Summerfelt ,  Jules D. Levine

发明人： Bruce E. Gnade ,  Daron G. Evans ,  Scott R. Summerfelt ,  Jules D. Levine

IPC分类号： H01J9/14 ,  H01J9/227 ,  H01J29/08 ,  H01J29/32 ,  H01J29/46 ,  H01J31/12 ,  H01J31/15 ,  H01J1/62

CPC分类号： H01J29/327 ,  H01J29/085 ,  H01J31/127 ,  H01J9/2278 ,  H01J2329/00

摘要： An anode plate 50 for use in a field emission flat panel display device comprises a transparent planar substrate 58 having a plurality of electrically conductive, parallel stripes 52 comprising the anode electrode of the device, which are covered by phosphors 54.sub.R, 54.sub.G and 54.sub.B. A substantially opaque, electrically insulating material 56 is affixed to substrate 58 in the spaces between conductors 52, acting as a barrier to the passage of ambient light into and out of the device. The electrical insulating quality of opaque material 56 increases the electrical isolation of conductive stripes 52 from one another, reducing the risk of breakdown due to increased leakage current. Opaque material 56 preferably comprises glass having impurities dispersed therein, wherein the impurities may include one or more organic dyes, selected to provide relatively uniform opacity over the visible range of the electromagnetic spectrum. Alternatively, the impurities may include the black oxide of a transition metal such as cobalt. Opaque material 56 is formed by mixing a TEOS solution with a dye or a source of metallic ions, spinning or spreading the mixture on glass substrate 58, and curing the mixture to drive out the organics and solvents. Two methods of fabricating anode plate 50 are disclosed.

摘要翻译： 用于场发射平板显示装置的阳极板50包括透明平面基板58，透明平面基板58具有多个导电的平行条52，该平行条52包括被荧光体54R，54G和54B覆盖的该装置的阳极。 基本上不透明的电绝缘材料56被固定到导体52之间的空间中的基底58上，作为环境光通入和流出设备的障碍。 不透明材料56的电绝缘质量增加了导电条52彼此的电隔离，从而降低了由于增加的漏电流而导致的击穿风险。 不透明材料56优选地包括其中分散有杂质的玻璃，其中杂质可以包括一种或多种有机染料，其被选择以在电磁光谱的可见范围内提供相对均匀的不透明度。 或者，杂质可以包括过渡金属如钴的黑色氧化物。 通过将TEOS溶液与染料或金属离子源混合，将混合物旋转或铺展在玻璃基底58上并固化混合物以驱出有机物和溶剂而形成不透明材料56。 公开了制造阳极板50的两种方法。