Strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels
    101.
    发明授权
    Strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels 有权
    应变硅直接绝缘体上的衬底,具有杂化晶体取向和不同的应力水平

    公开(公告)号:US07423303B2

    公开(公告)日:2008-09-09

    申请号:US11830464

    申请日:2007-07-30

    IPC分类号: H01L29/786

    摘要: The present invention provides a strained Si directly on insulator (SSDOI) substrate having multiple crystallographic orientations and a method of forming thereof. Broadly, but in specific terms, the inventive SSDOI substrate includes a substrate; an insulating layer atop the substrate; and a semiconducting layer positioned atop and in direct contact with the insulating layer, the semiconducting layer comprising a first strained Si region and a second strained Si region; wherein the first strained Si region has a crystallographic orientation different from the second strained Si region and the first strained Si region has a crystallographic orientation the same or different from the second strained Si region. The strained level of the first strained Si region is different from that of the second strained Si region.

    摘要翻译: 本发明提供了具有多个结晶取向的应变Si直接绝缘体(SSDOI)基板及其形成方法。 广义上,但是具体来说,本发明的SSDOI基板包括基板; 衬底顶部的绝缘层; 以及位于顶部并与绝缘层直接接触的半导体层,所述半导体层包括第一应变Si区和第二应变Si区; 其中所述第一应变Si区具有不同于所述第二应变Si区的晶体取向,并且所述第一应变Si区具有与所述第二应变Si区相同或不同的晶体取向。 第一应变Si区域的应变水平与第二应变Si区域的应变水平不同。

    Metal oxide field effect transistor with a sharp halo and a method of forming the transistor
    102.
    发明授权
    Metal oxide field effect transistor with a sharp halo and a method of forming the transistor 有权
    具有尖锐光晕的金属氧化物场效应晶体管和形成晶体管的方法

    公开(公告)号:US07384835B2

    公开(公告)日:2008-06-10

    申请号:US11420318

    申请日:2006-05-25

    IPC分类号: H01L21/335

    摘要: Disclosed are embodiments of a MOSFET with defined halos that are bound to defined source/drain extensions and a method of forming the MOSFET. A semiconductor layer is etched to form recesses that undercut a gate dielectric layer. A low energy implant forms halos. Then, a COR pre-clean is performed and the recesses are filled by epitaxial deposition. The epi can be in-situ doped or subsequently implanted to form source/drain extensions. Alternatively, the etch is immediately followed by the COR pre-clean, which is followed by epitaxial deposition to fill the recesses. During the epitaxial deposition process, the deposited material is doped to form in-situ doped halos and, then, the dopant is switched to form in-situ doped source/drain extensions adjacent to the halos. Alternatively, after the in-situ doped halos are formed the deposition process is performed without dopants and an implant is used to form source/drain extensions.

    摘要翻译: 公开了具有限定的限定的卤素的MOSFET的实施例,其限定的源极/漏极扩展部分以及形成MOSFET的方法。 蚀刻半导体层以形成切割栅极介电层的凹部。 低能量植入物形成晕轮。 然后,执行COR预清洁,并且通过外延沉积填充凹部。 外延可以被原位掺杂或随后植入以形成源/漏扩展。 或者,蚀刻之后紧接着是COR预清洁,随后进行外延沉积以填充凹部。 在外延沉积工艺期间,沉积的材料被掺杂以形成原位掺杂的光晕,然后切换掺杂剂以形成邻近光晕的原位掺杂的源极/漏极延伸。 或者,在形成原位掺杂的光晕之后,进行沉积工艺而没有掺杂剂,并且使用注入来形成源极/漏极延伸部。

    Method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels
    104.
    发明授权
    Method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels 失效
    用于制造具有混合晶体取向和不同应力水平的应变硅绝缘体上基板的方法

    公开(公告)号:US07271043B2

    公开(公告)日:2007-09-18

    申请号:US11037622

    申请日:2005-01-18

    IPC分类号: H01L21/8238

    摘要: The present invention provides a strained Si directly on insulator (SSDOI) substrate having multiple crystallographic orientations and a method of forming thereof. Broadly, but in specific terms, the inventive SSDOI substrate includes a substrate; an insulating layer atop the substrate; and a semiconducting layer positioned atop and in direct contact with the insulating layer, the semiconducting layer comprising a first strained Si region and a second strained Si region; wherein the first strained Si region has a crystallographic orientation different from the second strained Si region and the first strained Si region has a crystallographic orientation the same or different from the second strained Si region. The strained level of the first strained Si region is different from that of the second strained Si region.

    摘要翻译: 本发明提供了具有多个结晶取向的应变Si直接绝缘体(SSDOI)基板及其形成方法。 广义上,但是具体来说,本发明的SSDOI基板包括基板; 衬底顶部的绝缘层; 以及位于顶部并与绝缘层直接接触的半导体层,所述半导体层包括第一应变Si区和第二应变Si区; 其中所述第一应变Si区具有不同于所述第二应变Si区的晶体取向,并且所述第一应变Si区具有与所述第二应变Si区相同或不同的晶体取向。 第一应变Si区域的应变水平与第二应变Si区域的应变水平不同。

    STRUCTURE AND METHOD FOR MANUFACTURING PLANAR STRAINED Si/SiGe SUBSTRATE WITH MULTIPLE ORIENTATIONS AND DIFFERENT STRESS LEVELS
    105.
    发明申请
    STRUCTURE AND METHOD FOR MANUFACTURING PLANAR STRAINED Si/SiGe SUBSTRATE WITH MULTIPLE ORIENTATIONS AND DIFFERENT STRESS LEVELS 审中-公开
    用于制造具有多个方位和不同应力水平的平面应变Si / SiGe衬底的结构和方法

    公开(公告)号:US20070170507A1

    公开(公告)日:2007-07-26

    申请号:US11693377

    申请日:2007-03-29

    摘要: The present invention provides a method of forming a semiconducting substrate including the steps of providing an initial structure having first device region comprising a first orientation material and a second device region having a second orientation material; forming a first concentration of lattice modifying material atop the first orientation material; forming a second concentration of the lattice modifying material atop the second orientation material; intermixing the first concentration of lattice modifying material with the first orientation material to produce a first lattice dimension surface and the second concentration of lattice modifying material the second orientation material to produce a second lattice dimension surface; and forming a first strained semiconducting layer atop the first lattice dimension surface and a second strained semiconducting layer atop the second lattice dimension surface.

    摘要翻译: 本发明提供一种形成半导体衬底的方法,包括以下步骤:提供具有包括第一取向材料的第一器件区域和具有第二取向材料的第二器件区域的初始结构; 在所述第一取向材料的顶部上形成晶格改性材料的第一浓度; 在所述第二取向材料的顶部上形成所述晶格改性材料的第二浓度; 将所述晶格修饰材料的第一浓度与所述第一取向材料混合以产生第一晶格尺寸表面,并且所述第二浓度的晶格修饰材料形成所述第二取向材料以产生第二晶格尺寸表面; 以及在所述第一晶格尺寸表面上方形成第一应变半导体层和在所述第二晶格尺寸表面顶部形成第二应变半导体层。

    STRUCTURE AND METHOD FOR MANUFACTURING PLANAR STRAINED Si/SiGe SUBSTRATE WITH MULTIPLE ORIENTATIONS AND DIFFERENT STRESS LEVELS
    106.
    发明申请
    STRUCTURE AND METHOD FOR MANUFACTURING PLANAR STRAINED Si/SiGe SUBSTRATE WITH MULTIPLE ORIENTATIONS AND DIFFERENT STRESS LEVELS 失效
    用于制造具有多个方位和不同应力水平的平面应变Si / SiGe衬底的结构和方法

    公开(公告)号:US20060172495A1

    公开(公告)日:2006-08-03

    申请号:US10905978

    申请日:2005-01-28

    IPC分类号: H01L21/8234

    摘要: The present invention provides a method of forming a semiconducting substrate including the steps of providing an initial structure having first device region comprising a first orientation material and a second device region having a second orientation material; forming a first concentration of lattice modifying material atop the first orientation material; forming a second concentration of the lattice modifying material atop the second orientation material; intermixing the first concentration of lattice modifying material with the first orientation material to produce a first lattice dimension surface and the second concentration of lattice modifying material the second orientation material to produce a second lattice dimension surface; and forming a first strained semiconducting layer atop the first lattice dimension surface and a second strained semiconducting layer atop the second lattice dimension surface.

    摘要翻译: 本发明提供一种形成半导体衬底的方法,包括以下步骤:提供具有包括第一取向材料的第一器件区域和具有第二取向材料的第二器件区域的初始结构; 在所述第一取向材料的顶部上形成晶格改性材料的第一浓度; 在所述第二取向材料的顶部上形成所述晶格改性材料的第二浓度; 将所述晶格修饰材料的第一浓度与所述第一取向材料混合以产生第一晶格尺寸表面,并且所述第二浓度的晶格修饰材料形成所述第二取向材料以产生第二晶格尺寸表面; 以及在所述第一晶格尺寸表面上方形成第一应变半导体层和在所述第二晶格尺寸表面顶部形成第二应变半导体层。

    Structure and method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels
    107.
    发明申请
    Structure and method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels 失效
    用于制造具有杂化晶体取向和不同应力水平的应变硅绝缘体上基板的结构和方法

    公开(公告)号:US20060157706A1

    公开(公告)日:2006-07-20

    申请号:US11037622

    申请日:2005-01-18

    IPC分类号: H01L29/76

    摘要: The present invention provides a strained Si directly on insulator (SSDOI) substrate having multiple crystallographic orientations and a method of forming thereof. Broadly, but in specific terms, the inventive SSDOI substrate includes a substrate; an insulating layer atop the substrate; and a semiconducting layer positioned atop and in direct contact with the insulating layer, the semiconducting layer comprising a first strained Si region and a second strained Si region; wherein the first strained Si region has a crystallographic orientation different from the second strained Si region and the first strained Si region has a crystallographic orientation the same or different from the second strained Si region. The strained level of the first strained Si region is different from that of the second strained Si region.

    摘要翻译: 本发明提供了具有多个结晶取向的应变Si直接绝缘体(SSDOI)基板及其形成方法。 广义上,但是具体来说,本发明的SSDOI基板包括基板; 衬底顶部的绝缘层; 以及位于顶部并与绝缘层直接接触的半导体层,所述半导体层包括第一应变Si区和第二应变Si区; 其中所述第一应变Si区具有不同于所述第二应变Si区的晶体取向,并且所述第一应变Si区具有与所述第二应变Si区相同或不同的晶体取向。 第一应变Si区域的应变水平与第二应变Si区域的应变水平不同。

    Use of thin SOI to inhibit relaxation of SiGe layers
    108.
    发明授权
    Use of thin SOI to inhibit relaxation of SiGe layers 有权
    使用薄SOI抑制SiGe层的弛豫

    公开(公告)号:US06989058B2

    公开(公告)日:2006-01-24

    申请号:US10654232

    申请日:2003-09-03

    IPC分类号: C30B25/02

    摘要: High-quality, metastable SiGe alloys are formed on SOI substrates having an SOI layer of about 500 Å or less, the SiGe layers can remain substantially fully strained compared to identical SiGe layers formed on thicker SOI substrates and subsequently annealed and/or oxidized at high temperatures. The present invention thus provides a method of ‘frustrating’ metastable strained SiGe layers by growing them on thin, clean and high-quality SOI substrates.

    摘要翻译: 在具有大约等于或小于等于或等于SOI层的SOI层的SOI衬底上形成高质量的亚稳态SiGe合金,与形成在较厚SOI衬底上的相同SiGe层相比,SiGe层可以保持基本上完全变形,并随后在高温下退火和/或氧化 温度。 因此,本发明提供了一种通过在薄的,清洁的和高质量的SOI衬底上生长它们来“挫败”亚稳应变的SiGe层的方法。

    Method of preventing surface roughening during hydrogen prebake of SiGe substrates

    公开(公告)号:US06958286B2

    公开(公告)日:2005-10-25

    申请号:US10751208

    申请日:2004-01-02

    摘要: The invention forms an epitaxial silicon-containing layer on a silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface and avoids creating a rough surface upon which the epitaxial silicon-containing layer is grown. In order to avoid creating the rough surface, the invention first performs a hydrofluoric acid etching process on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. This etching process removes most of oxide from the surface, and leaves a first amount of oxygen (typically 1×1013−1×1015/cm2 of oxygen) on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. The invention then performs a hydrogen pre-bake process which heats the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface sufficiently to remove additional oxygen from the surface and leave a second amount of oxygen, less than the first amount, on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. The heating process leaves an amount of at least 5×1012/cm2 of oxygen (typically, between approximately 1×1013/cm2 and approximately 5×1013/cm2 of oxygen) on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. By leaving a small amount of oxygen on the silicon germanium, patterned strained silicon, or patterned silicon-on-insulator surface, the heating processes avoid changing the roughness of the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. Then the process of epitaxially growing the epitaxial silicon-containing layer on the silicon germanium, patterned strained silicon, or patterned silicon-on-insulator surface is performed.

    Method of preventing surface roughening during hydrogen pre-bake of SiGe substrates using chlorine containing gases
    110.
    发明申请
    Method of preventing surface roughening during hydrogen pre-bake of SiGe substrates using chlorine containing gases 审中-公开
    在使用含氯气体的SiGe衬底的氢预烘烤期间防止表面粗糙化的方法

    公开(公告)号:US20050148162A1

    公开(公告)日:2005-07-07

    申请号:US10751207

    申请日:2004-01-02

    摘要: The invention forms an epitaxial silicon-containing layer on a silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface and avoids creating a rough surface upon which the epitaxial silicon-containing layer is grown. In order to avoid creating the rough surface, the invention first performs a hydrofluoric acid etching process on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. This etching process removes most of oxide from the surface, and leaves only a sub-monolayer of oxygen (typically 1×1013-1×1015/cm2 of oxygen) at the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. The invention then performs a hydrogen pre-bake process in a chlorine containing environment which heats the silicon germanium, strained silicon, or thin silicon-on-insulator surface sufficiently to remove the remaining oxygen from the surface. By introducing a small amount of chlorine containing gases, the heating processes avoid changing the roughness of the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. Then the process of epitaxially growing the epitaxial silicon-containing layer on the silicon germanium, patterned strained silicon, or patterned silicon-on-insulator surface is performed.

    摘要翻译: 本发明在硅​​锗,图案化的应变硅或图案化的绝缘体上硅表面上形成外延含硅层,并避免产生外延含硅层生长的粗糙表面。 为了避免产生粗糙表面,本发明首先对硅锗,图案化应变硅或图案化的绝缘体上硅表面进行氢氟酸蚀刻工艺。 该蚀刻工艺从表面除去大部分氧化物,并且仅留下氧气的亚单层(通常为1×10 13/1×10 15 / cm 2以上) 的氧),图案化的应变硅或图案化的绝缘体上硅表面。 然后,本发明在含氯环境中进行氢预烘烤过程,其中充分加热硅锗,应变硅或薄的绝缘体上硅表面以从表面除去剩余的氧。 通过引入少量的含氯气体,加热过程避免改变硅锗,图案化的应变硅或图案化的绝缘体上硅表面的粗糙度。 然后进行外延生长硅锗,图案化应变硅或图案化硅绝缘体表面上的外延硅含量层的工艺。