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公开(公告)号:US10181287B2
公开(公告)日:2019-01-15
申请号:US15410094
申请日:2017-01-19
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake , Shunpei Yamazaki
IPC: H05B37/02 , G09G3/3233
Abstract: A light-emitting device in which variation in luminance among pixels is suppressed. The light-emitting device includes a pixel; a first circuit configured to generate a signal containing information on a value of current extracted from the pixel; and a second circuit configured to correct an image signal in accordance with the signal. The pixel includes a light-emitting element; a transistor for controlling supply of the current to the light-emitting element in accordance with the image signal; a first switch configured to control connection between a gate and a drain of the transistor or between the gate of the transistor and a wiring; and a second switch configured to control extraction of the current from the pixel.
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公开(公告)号:US20180308866A1
公开(公告)日:2018-10-25
申请号:US15959566
申请日:2018-04-23
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hideaki Shishido , Hiroyuki Miyake , Kouhei Toyotaka , Makoto Kaneyasu
IPC: H01L27/12 , H01L27/32 , G02F1/1343 , G02F1/1362 , G09G3/36 , G09G3/20 , H01L33/62
CPC classification number: H01L27/124 , G02F1/134309 , G02F1/134336 , G02F1/13624 , G02F1/136277 , G02F1/136286 , G02F2201/52 , G09G3/2085 , G09G3/3607 , G09G3/3611 , G09G3/3659 , G09G2300/0465 , G09G2300/08 , H01L27/1255 , H01L27/3211 , H01L27/3213 , H01L27/3216 , H01L27/3218 , H01L27/323 , H01L27/3244 , H01L27/3248 , H01L27/326 , H01L27/3262 , H01L27/3276 , H01L33/62
Abstract: Provided is a display device with high resolution, high display quality, or high aperture ratio. A pixel includes three subpixels and is electrically connected to two gate lines. One of the gate lines is electrically connected to a gate of a transistor included in each of the two subpixels, and the other gate line is electrically connected to a gate of a transistor included in the other subpixel. Display elements of the three subpixels are arranged in the same direction. Three pixel electrodes of the three subpixels are arranged in the same direction.
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公开(公告)号:US10079251B2
公开(公告)日:2018-09-18
申请号:US15592599
申请日:2017-05-11
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Jun Koyama , Hiroyuki Miyake
IPC: H01L27/12 , H01L29/786
CPC classification number: H01L27/1225 , H01L21/02603 , H01L27/0883 , H01L27/1251 , H01L27/127 , H01L27/1288 , H01L29/045 , H01L29/24 , H01L29/7869 , H01L29/78693 , H01L29/78696
Abstract: An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined.
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104.
公开(公告)号:US10043427B2
公开(公告)日:2018-08-07
申请号:US14844390
申请日:2015-09-03
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake
IPC: G09G3/32 , G09G3/00 , G01R19/00 , G01R19/10 , G09G3/3233
Abstract: To provide a measurement method of characteristics of an electrical element which causes variation in the luminance of pixels. In a device which includes components (pixels) arranged in a matrix and a wiring and where each component is can supply current to the wiring through an electrical element included in each component, the directions of current in N components capable of supplying current to the wiring are individually set and the current flowing through the wiring is measured N times. Here, the directions of the current flowing through the electrical elements can be changed. In the respective N measurements, combinations of the directions of current in the N components differ from one another. The amount of current flowing through each electrical element is calculated based on current obtained by the N measurements and the combinations of the directions of the current in the N measurements.
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公开(公告)号:US10032428B2
公开(公告)日:2018-07-24
申请号:US15223659
申请日:2016-07-29
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Hiroyuki Miyake , Daisuke Matsubayashi
Abstract: To prevent an influence of normally-on characteristics of the transistor which a clock signal is input to a terminal of, a wiring to which a first low power supply potential is applied and a wiring to which a second low power supply potential lower than the first low power supply potential is applied are electrically connected to a gate electrode of the transistor. A semiconductor device including the transistor can operate stably.
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公开(公告)号:US10009020B2
公开(公告)日:2018-06-26
申请号:US13716885
申请日:2012-12-17
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Kazunori Watanabe , Hiroyuki Miyake
CPC classification number: H03K17/04 , G09G3/3648 , G09G3/3688 , G09G3/3696 , G09G5/001
Abstract: To suppress an adverse effect of change in held data in a sample-and-hold circuit as a result of increase in operation speed on a generated parallel data signal. A signal converter circuit includes a first sample-and-hold circuit and a second sample-and-hold circuit each of which has a function of extracting and holding part of a serial data signal as a data in accordance with a sampling control signal and has a function of generating a data signal which is one of data signals of a parallel data signal by using the held data and outputting the data signal. The second sample-and-hold circuit includes a switch which has a function of selecting whether the potential of the data of the second sample-and-hold circuit is set to a reference potential or not in accordance with the sampling control signal of the first sample-and-hold circuit.
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107.
公开(公告)号:US09989796B2
公开(公告)日:2018-06-05
申请号:US14467174
申请日:2014-08-25
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Ryo Hatsumi , Daisuke Kubota , Hiroyuki Miyake
IPC: G02F1/1333 , G02F1/1337 , G02F1/1343 , G02F1/136
CPC classification number: G02F1/133345 , G02F1/133707 , G02F1/134363 , G02F2001/134318 , G02F2001/134372 , G02F2001/13606
Abstract: A display device with less light leakage and excellent contrast is provided. A display device having a high aperture ratio and including a large-capacitance capacitor is provided. A display device in which wiring delay due to parasitic capacitance is reduced is provided. A display device includes a transistor over a substrate, a pixel electrode connected to the transistor, a signal line electrically connected to the transistor, a scan line electrically connected to the transistor and intersecting with the signal line, and a common electrode overlapping with the pixel electrode and the signal line with an insulating film provided therebetween. The common electrode includes stripe regions extending in a direction intersecting with the signal line.
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公开(公告)号:US20180097040A1
公开(公告)日:2018-04-05
申请号:US15819017
申请日:2017-11-21
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Yoshiharu Hirakata , Hiroyuki Miyake
Abstract: A flexible touch panel is provided. Both reduction in thickness and high sensitivity of a touch panel are achieved. The touch panel includes a first flexible substrate, a first insulating layer over the first substrate, a transistor and a light-emitting element over the first insulating layer, a color filter over the light-emitting element, a pair of sensor electrodes over the color filter, a second insulating layer over the sensor electrodes, a second flexible substrate over the second insulating layer, and a protective layer over the second substrate. A first bonding layer is between the light-emitting element and the color filter. The thickness of the first substrate and the second substrate is each 1 μm to 200 μm inclusive. The first bonding layer includes a region with a thickness of 50 nm to 10 μm inclusive.
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公开(公告)号:US09933903B2
公开(公告)日:2018-04-03
申请号:US14868792
申请日:2015-09-29
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake
IPC: G06F3/044 , B60K35/00 , G06F1/16 , G06F3/0354 , G01R27/26 , G02F1/1333 , G06F3/041 , H03K17/955
CPC classification number: G06F3/044 , B60K35/00 , B60K37/06 , B60K2350/1024 , B60K2350/925 , G01R27/2605 , G02F1/13338 , G06F1/1626 , G06F1/163 , G06F1/1641 , G06F1/1652 , G06F3/03547 , G06F3/0412 , G06F3/0416 , G06F2203/04102 , G06F2203/04103 , G06F2203/04112 , G09G2320/0209 , H03K17/955
Abstract: An input device or an input/output device that is suitable for increasing in size is provided. An input device or an input/output device that can be driven at high frequencies is provided. An input device includes a plurality of row wirings and a plurality of column wirings. To each of the plurality of row wirings, periodic rectangular waves are applied. When attention is paid to one row wiring Xi (i is greater than or equal to 1 and less than or equal to m−1), a signal that has a phase opposite to that of a signal applied to the row wiring Xi and that is delayed for a given period is applied to a row wiring Xi+1, which is the row wiring next to the row wiring Xi. The width of each of the rectangular waves applied to the row wirings corresponds to a frame period.
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公开(公告)号:US09899423B2
公开(公告)日:2018-02-20
申请号:US15335510
申请日:2016-10-27
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Hiroyuki Miyake , Takahiro Sato , Masami Jintyou
IPC: H01L27/12 , H01L29/04 , H01L29/786 , G06F3/041 , H01L29/417 , H01L29/423 , H01L29/49 , G02F1/133 , G02F1/1333 , G02F1/1343 , G02F1/1362 , G02F1/1368
CPC classification number: H01L27/1225 , G02F1/13306 , G02F1/133345 , G02F1/13338 , G02F1/134336 , G02F1/136286 , G02F1/1368 , G02F2201/123 , G06F3/041 , G06F2203/04103 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/42384 , H01L29/4908 , H01L29/7869
Abstract: A semiconductor device including a transistor and a connection portion is provided. The transistor includes a gate electrode, a first insulating film over the gate electrode, an oxide semiconductor film over the first insulating film and at a position overlapping with the gate electrode, and source and drain electrodes electrically connected to the oxide semiconductor film; and the connection portion includes a first wiring on the same surface as a surface on which the gate electrode is formed, a second wiring on the same surface as a surface on which the source and drain electrodes are formed, and a third wiring connecting the first wiring and the second wiring. The distance between an upper end portion and a lower end portion of the second wiring is longer than the distance between an upper end portion and a lower end portion of each of the source and drain electrodes.
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