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    Reduction of forming voltage in semiconductor devices
    111.
    发明申请
    Reduction of forming voltage in semiconductor devices 有权
    降低半导体器件中的形成电压

    公开(公告)号：US20140001431A1

    公开(公告)日：2014-01-02

    申请号：US14018719

    申请日：2013-09-05

    Applicant: Intermolecular Inc.

    Inventor： Pragati KUMAR ,  Tony P. Chiang ,  Prashant B. Phatak ,  Yun Wang

    IPC: H01L45/00

    CPC classification number: H01L45/146 ,  G11C13/0002 ,  G11C2013/0083 ,  G11C2213/51 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/1625 ,  H01L45/1641

    Abstract: This disclosure provides a nonvolatile memory device and related methods of manufacture and operation. The device may include one or more resistive random access memory (ReRAM) approaches to provide a memory device with more predictable operation. In particular, the forming voltage required by particular designs may be reduced through the use of a barrier layer, a reverse polarity forming voltage pulse, a forming voltage pulse where electrons are injected from a lower work function electrode, or an anneal in a reducing environment. One or more of these techniques may be applied, depending on the desired application and results.

    Abstract translation: 本公开提供了一种非易失性存储器件及相关的制造和操作方法。 该装置可以包括一个或多个电阻随机存取存储器（ReRAM）方法来为存储器装置提供更可预测的操作。 特别地，可以通过使用阻挡层，反极性形成电压脉冲，从下功函电极注入电子的形成电压脉冲或还原环境中的退火来降低特定设计所需的形成电压 。 可以根据期望的应用和结果应用这些技术中的一种或多种。

    High throughput current-voltage combinatorial characterization tool and method for combinatorial solar test substrates
    112.
    发明授权
    High throughput current-voltage combinatorial characterization tool and method for combinatorial solar test substrates 失效

    公开(公告)号：US08552755B2

    公开(公告)日：2013-10-08

    申请号：US13849749

    申请日：2013-03-25

    Applicant: Intermolecular, Inc.

    Inventor： Yun Wang ,  Tony P. Chiang ,  Chi-I Lang

    IPC: G01R31/26

    CPC classification number: G01R31/26 ,  G01N21/55 ,  G01R31/2607 ,  H02S50/10

    Abstract: Measuring current-voltage (I-V) characteristics of a solar cell using a lamp that emits light, a substrate that includes a plurality of solar cells, a positive electrode attached to the solar cells, and a negative electrode peripherally deposited around each of the solar cells and connected to a common ground, an articulation platform coupled to the substrate, a multi-probe switching matrix or a Z-stage device, a programmable switch box coupled to the multi-probe switching matrix or Z-stage device and selectively articulating the probes by raising the probes until in contact with at least one of the positive electrode and the negative electrode and lowering the probes until contact is lost with at least one of the positive electrode and the negative electrode, a source meter coupled to the programmable switch box and measuring the I-V characteristics of the substrate.

    Method and System of Improved Uniformity Testing
    113.
    发明申请
    Method and System of Improved Uniformity Testing 审中-公开
    改进均匀性测试方法与系统

    公开(公告)号：US20130122614A1

    公开(公告)日：2013-05-16

    申请号：US13713421

    申请日：2012-12-13

    Applicant: Intermolecular, Inc.

    Inventor： Charlene Chen ,  Tony P. Chiang ,  Chi-I Lang ,  Yun Wang

    IPC: H01L21/66 ,  G01N21/59

    CPC classification number: H01L22/20 ,  G01N21/59 ,  H01L21/02491 ,  H01L21/02527 ,  H01L21/0262 ,  H01L22/12 ,  H01L29/1606

    Abstract: A method and system includes a first substrate and a second substrate, each substrate comprising a predetermined baseline transmittance value at a predetermine wavelength of light, processing regions on the first substrate by combinatorially varying at least one of materials, process conditions, unit processes, and process sequences associated with the graphene production, performing a first characterization test on the processed regions on the first substrate to generate first results, processing regions on a second substrate in a combinatorial manner by varying at least one of materials, process conditions, unit processes, and process sequences associated with the graphene production based on the first results of the first characterization test, performing a second characterization test on the processed regions on the second substrate to generate second results, and determining whether at least one of the first substrate and the second substrate meet a predetermined quality threshold based on the second results.

    Abstract translation: 一种方法和系统包括第一衬底和第二衬底，每个衬底在光的预定波长处包括预定的基线透射率值，第一衬底上的处理区域通过组合地改变材料，工艺条件，单元工艺中的至少一个和 与所述石墨烯生产相关联的工艺序列，对所述第一衬底上的所述经处理区域执行第一表征测试以产生第一结果，通过改变材料，工艺条件，单位过程中的至少一种以组合方式处理第二衬底上的区域， 以及基于第一表征测试的第一结果与石墨烯生产相关联的处理顺序，对第二衬底上的经处理区域执行第二表征测试以产生第二结果，以及确定第一衬底和第二衬底中的至少一个 基板满足预定的质量阈值 基于第二个结果。

    Bipolar Resistive-Switching Memory with a Single Diode Per Memory Cell
    114.
    发明申请
    Bipolar Resistive-Switching Memory with a Single Diode Per Memory Cell 有权
    具有每个存储单元的单个二极管的双极电阻开关存储器

    公开(公告)号：US20130107607A1

    公开(公告)日：2013-05-02

    申请号：US13720448

    申请日：2012-12-19

    Applicant: INTERMOLECULAR, INC.

    Inventor： Yun Wang ,  Tony P. Chiang ,  Prashant B. Phatak

    IPC: G11C11/36

    CPC classification number: G11C13/02 ,  G11C7/00 ,  G11C11/36 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0021 ,  G11C13/0069 ,  G11C13/04 ,  G11C2013/0073 ,  G11C2013/0092 ,  G11C2213/72

    Abstract: According to various embodiments, a resistive-switching memory element and memory element array that uses a bipolar switching includes a select element comprising only a single diode that is not a Zener diode. The resistive-switching memory elements described herein can switch even when a switching voltage less than the breakdown voltage of the diode is applied in the reverse-bias direction of the diode. The memory elements are able to switch during the very brief period when a transient pulse voltage is visible to the memory element, and therefore can use a single diode per memory cell.

    Abstract translation: 根据各种实施例，使用双极开关的电阻式开关存储器元件和存储元件阵列包括仅包括不是齐纳二极管的单个二极管的选择元件。 即使当在二极管的反向偏置方向上施加小于二极管的击穿电压的开关电压时，本文所述的电阻式开关存储元件也可以切换。 存储器元件能够在瞬态脉冲电压对存储元件可见时的非常短的时间内进行切换，因此每个存储器单元可以使用单个二极管。

    Transparent Resistive Random Access Memory Cells
    117.
    发明申请
    Transparent Resistive Random Access Memory Cells 有权
    透明电阻随机存取存储单元

    公开(公告)号：US20160097945A1

    公开(公告)日：2016-04-07

    申请号：US14504980

    申请日：2014-10-02

    Applicant: Intermolecular, Inc.

    Inventor： Yun Wang

    IPC: G02F1/1365 ,  G02F1/1343 ,  H01L45/00

    CPC classification number: G02F1/1365 ,  G02F2203/01 ,  H01L27/24 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146

    Abstract: Provided are resistive switching cells and methods of using such cells for controlling operation of liquid crystal display (LCD) cells in LCD devices. A resistive switching cell has two electrodes formed from transparent conductive oxides, such as indium oxide, indium tin oxide, or zinc oxide. One electrode may be connected to a LCD cell thereby forming an in series connection between the resistive switching cell and LCD cell. The other electrode may be used to power the LCD cell through the resistive switching cell. The resistive switching cell also includes a resistive switching layer disposed between the two electrodes. When the resistive switching layer is in its low resistive state, the LCD cell is subjected to an operating potential and produces light. However, when the resistive switching layer is in its high resistive state, the LCD cell is not subjected to the operating potential and does not produce light.

    Abstract translation: 提供了电阻式开关单元以及使用这种单元来控制LCD装置中的液晶显示（LCD）单元的操作的方法。 电阻开关单元具有由诸如氧化铟，氧化铟锡或氧化锌的透明导电氧化物形成的两个电极。 一个电极可以连接到LCD单元，从而在电阻开关单元和LCD单元之间形成串联连接。 另一个电极可以用于通过电阻式开关电池为LCD单元供电。 电阻开关单元还包括设置在两个电极之间的电阻开关层。 当电阻式开关层处于低电阻状态时，LCD单元受到工作电位的影响，产生光。 然而，当电阻式开关层处于高电阻状态时，LCD单元不会受到工作电位的影响，不产生光。

    Electron barrier height controlled interfaces of resistive switching layers in resistive random access memory cells
    119.
    发明授权
    Electron barrier height controlled interfaces of resistive switching layers in resistive random access memory cells 有权
    电阻式随机存取存储单元中电阻开关层的电子势垒高度控制接口

    公开(公告)号：US09246087B1

    公开(公告)日：2016-01-26

    申请号：US14551878

    申请日：2014-11-24

    Applicant: Intermolecular Inc.

    Inventor： Yun Wang ,  Federico Nardi

    IPC: H01L45/00

    CPC classification number: H01L45/12 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/148 ,  H01L45/1608 ,  H01L45/1625

    Abstract: Provided are resistive switching memory cells and method of forming such cells. A memory cell includes a resistive switching layer disposed between two buffer layers. The electron barrier height of the material used for each buffer layer is less than the electron barrier height of the material used for the resistive switching layer. Furthermore, the thickness of each buffer layer may be less than the thickness of the resistive switching layer. The buffer layers reduce diffusion between the resistive switching layer and electrodes. Furthermore, the buffer layers improve data retention and prevent unintentional resistive switching when a reading signal is applied to the memory cell. The reading signal uses a low voltage and most of the electron tunneling is blocked by the buffer layers during this operation. On the other hand, the buffer layers allow electrode tunneling at higher voltages used for forming and switching signals.

    Abstract translation: 提供了电阻式开关存储单元和形成这种单元的方法。 存储单元包括设置在两个缓冲层之间的电阻式开关层。 用于每个缓冲层的材料的电子势垒高度小于用于电阻式开关层的材料的电子势垒高度。 此外，每个缓冲层的厚度可以小于电阻式开关层的厚度。 缓冲层减少电阻式开关层和电极之间的扩散。 此外，当读取信号被施加到存储器单元时，缓冲层改善数据保持并防止无意的电阻性切换。 读取信号使用低电压，并且在该操作期间大部分电子隧道被缓冲层阻挡。 另一方面，缓冲层允许用于形成和切换信号的较高电压下的电极隧穿。

    CURRENT-LIMITING ELECTRODES
    120.
    发明申请
    CURRENT-LIMITING ELECTRODES 有权
    电流限制电极

    公开(公告)号：US20160020392A1

    公开(公告)日：2016-01-21

    申请号：US14336652

    申请日：2014-07-21

    Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    Inventor： Yun Wang ,  Federico Nardi ,  Milind Weling

    IPC: H01L45/00

    CPC classification number: H01L45/145 ,  H01L27/24 ,  H01L27/2409 ,  H01L45/04 ,  H01L45/08 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/1608 ,  H01L45/1625 ,  H01L45/1641

    Abstract: A resistive-switching memory (ReRAM cell) has a current-limiting electrode layer that combines the functions of an embedded resistor, an outer electrode, and an intermediate electrode, reducing the thickness of the ReRAM stack and simplifying the fabrication process. The materials include compound nitrides of a transition metal and one of aluminum, boron, or silicon. In experiments with tantalum silicon nitride, peak yield in the desired resistivity range corresponded to ˜24 at % silicon and ˜32 at % nitrogen, believed to optimize the trade-off between inhibiting TaSi2 formation and minimizing nitrogen diffusion. A binary metal nitride may be formed at one or more of the interfaces between the current-limiting electrode and neighboring layers such as metal-oxide switching layers.

    Abstract translation: 电阻式开关存储器（ReRAM单元）具有限流电极层，其结合了嵌入式电阻器，外部电极和中间电极的功能，减小了ReRAM堆叠的厚度并简化了制造工艺。 这些材料包括过渡金属和铝，硼或硅之一的化合物氮化物。 在使用钽氮化硅的实验中，所需电阻率范围内的峰值产率对应于〜24at％的硅和〜32at％的氮，据信可以优化抑制TaSi2形成和最小化氮扩散之间的折衷。 二元金属氮化物可以形成在限流电极和相邻层之间的界面中的一个或多个处，例如金属氧化物开关层。

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