公开(公告)号：US5180588A

公开(公告)日：1993-01-19

申请号：US555586

申请日：1990-07-20

申请人： Yoshifumi Shinmen ,  Kengo Akimoto ,  Sumio Asami ,  Yoshihide Suwa ,  Yoshinori Kitagawa ,  Michihiro Sugano ,  Hideaki Yamada ,  Sakayu Shimizu

发明人： Yoshifumi Shinmen ,  Kengo Akimoto ,  Sumio Asami ,  Yoshihide Suwa ,  Yoshinori Kitagawa ,  Michihiro Sugano ,  Hideaki Yamada ,  Sakayu Shimizu

IPC分类号： A23D7/005 ,  A23L1/015 ,  A23L1/24 ,  A23L1/30 ,  A61K31/335 ,  A61K31/34 ,  A61P3/06

CPC分类号： A61K31/34 ,  A23D7/0056 ,  A23L27/60 ,  A23L33/10 ,  A61K31/335 ,  A23V2002/00

摘要： A liver function improver, food, or drink comprising, as an effective ingredient, a dioxabicyclo[3.3.0]octane derivative, such as sesamin, sesaminol episesamin, episesaminol, sesamolin, 2-(3,4-methylene dioxyphenyl)-6-(3-methoxy-4-hydroxyphenyl)-3,7-dioxabicyclo[3.3.0]octane, 2,6-bis-(3-methoxy-4-hydroxyphenyl)-3,7-dioxabicyclo[3.3.0]octane or 2- (3,4-methylenedioxyphenyl)-6-(3-methoxy-4-hydroxyphenoxy)-3,7-dioxabicyclo[3.3.0]octane.

公开(公告)号：US09478597B2

公开(公告)日：2016-10-25

申请号：US12556593

申请日：2009-09-10

申请人： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi ,  Rihito Wada ,  Yoko Chiba

发明人： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi ,  Rihito Wada ,  Yoko Chiba

IPC分类号： H01L29/786 ,  H01L27/32 ,  H01L27/12 ,  H01L51/52

CPC分类号： H01L27/3276 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/7869 ,  H01L51/5221

摘要： A display device includes a pixel portion in which a pixel is arranged in a matrix, the pixel including an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen and having a channel protective layer over a semiconductor layer to be a channel formation region overlapping a gate electrode layer and a pixel electrode layer electrically connected to the inverted staggered thin film transistor. In the periphery of the pixel portion in this display device, a pad portion including a conductive layer made of the same material as the pixel electrode layer is provided. In addition, the conductive layer is electrically connected to a common electrode layer formed on a counter substrate.

摘要翻译： 显示装置包括其中像素以矩阵形式布置的像素部分，该像素包括具有不同量的氧并且具有通道保护层的至少两种氧化物半导体层的组合的反交错薄膜晶体管 半导体层作为与栅电极层重叠的沟道形成区域和与反交错薄膜晶体管电连接的像素电极层。 在该显示装置的像素部的周围，设置由与像素电极层相同的材料构成的导电层的焊盘部。 另外，导电层与形成在对置基板上的公共电极层电连接。

公开(公告)号：US09087745B2

公开(公告)日：2015-07-21

申请号：US13346118

申请日：2012-01-09

申请人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

发明人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

IPC分类号： H01L21/00 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L29/66969 ,  H01L21/46 ,  H01L27/1225 ,  H01L29/7869

摘要： It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

摘要翻译： 本发明的目的是提供一种包括具有良好的电性能和高可靠性的薄膜晶体管的半导体器件，以及一种以高生产率制造半导体器件的方法。 在倒置交错（底栅极）薄膜晶体管中，使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且在半导体层和源之间设置使用金属氧化物层形成的缓冲层， 漏电极层。 有意地提供金属氧化物层作为半导体层与源极和漏极电极层之间的缓冲层，从而获得欧姆接触。

公开(公告)号：US09087744B2

公开(公告)日：2015-07-21

申请号：US13282505

申请日：2011-10-27

申请人： Masashi Tsubuku ,  Kengo Akimoto

发明人： Masashi Tsubuku ,  Kengo Akimoto

IPC分类号： G06F3/038 ,  H01L27/12 ,  G09F9/30 ,  G02F1/1368 ,  G09G3/36

CPC分类号： H01L27/1225 ,  G02F1/1368 ,  G06F3/038 ,  G09F9/30 ,  G09G3/3648 ,  G09G2360/142

摘要： When a positive bias voltage is applied to a gate electrode of a transistor including an oxide semiconductor for longer than or equal to 10 msec, electric characteristics of the transistor, which have varied due to the light irradiation, can be brought to the state which is substantially the same as the state before the light irradiation. Note that a positive bias voltage is applied to the gate electrode of the transistor at an appropriate timing with reference to the amount of incident light received by the transistor. Accordingly, a display device in which a reduction in display quality is suppressed even when light irradiation is performed can be realized.

摘要翻译： 当正偏压被施加到包括氧化物半导体的晶体管的栅电极长于或等于10毫秒时，由于光照射而变化的晶体管的电特性可以变为 基本上与光照射前的状态相同。 注意，在相应于由晶体管接收的入射光量的适当时刻，正偏置电压施加到晶体管的栅电极。 因此，即使在进行光照射时也能够抑制显示品质的降低的显示装置。

公开(公告)号：US08951849B2

公开(公告)日：2015-02-10

申请号：US13050002

申请日：2011-03-17

申请人： Toru Takayama ,  Kengo Akimoto

发明人： Toru Takayama ,  Kengo Akimoto

IPC分类号： H01L35/24 ,  H01L21/3105 ,  H01L21/316 ,  H01L21/3205 ,  H01L29/49 ,  H01L29/66 ,  H01L29/786 ,  H01L29/417

CPC分类号： H01L21/3105 ,  H01L21/31604 ,  H01L21/32055 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78696

摘要： An object is to provide a semiconductor device including a microcrystalline semiconductor film with favorable quality and a method for manufacturing the semiconductor device. In a thin film transistor formed using a microcrystalline semiconductor film, yttria-stabilized zirconia having a fluorite structure is formed in the uppermost layer of a gate insulating film in order to improve quality of a microcrystalline semiconductor film to be formed in the initial stage of deposition. The microcrystalline semiconductor film is deposited on the yttria-stabilized zirconia, so that the microcrystalline semiconductor film around an interface with a base particularly has favorable crystallinity while by crystallinity of the base.

摘要翻译： 目的在于提供一种具有质量好的微晶半导体膜的半导体装置及其制造方法。 在使用微晶半导体膜形成的薄膜晶体管中，在栅极绝缘膜的最上层形成具有萤石结构的氧化钇稳定的氧化锆，以提高在初始沉积时形成的微晶半导体膜的质量 。 微晶半导体膜沉积在氧化钇稳定的氧化锆上，使得与碱的界面周围的微晶半导体膜特别具有良好的结晶度，同时通过碱的结晶度。

公开(公告)号：US08946700B2

公开(公告)日：2015-02-03

申请号：US13552805

申请日：2012-07-19

申请人： Kengo Akimoto ,  Junichiro Sakata ,  Shunpei Yamazaki

发明人： Kengo Akimoto ,  Junichiro Sakata ,  Shunpei Yamazaki

IPC分类号： H01L29/786 ,  H01L27/12

CPC分类号： H01L29/78618 ,  H01L27/1225 ,  H01L29/7869

摘要： An object is to provide a method for manufacturing a highly reliable semiconductor device including thin film transistors which have stable electric characteristics and are formed using an oxide semiconductor. A method for manufacturing a semiconductor device includes the steps of: forming an oxide semiconductor film over a gate electrode with a gate insulating film interposed between the oxide semiconductor film and the gate electrode, over an insulating surface; forming a first conductive film including at least one of titanium, molybdenum, and tungsten, over the oxide semiconductor film; forming a second conductive film including a metal having lower electronegativity than hydrogen, over the first conductive film; forming a source electrode and a drain electrode by etching of the first conductive film and the second conductive film; and forming an insulating film in contact with the oxide semiconductor film, over the oxide semiconductor film, the source electrode, and the drain electrode.

摘要翻译： 本发明的目的是提供一种用于制造具有稳定电特性并使用氧化物半导体形成的薄膜晶体管的高可靠性半导体器件的方法。 一种制造半导体器件的方法包括以下步骤：在绝缘表面上，在栅极上形成氧化物半导体膜，其中栅极绝缘膜置于氧化物半导体膜和栅电极之间; 在所述氧化物半导体膜上形成包括钛，钼和钨中的至少一种的第一导电膜; 在所述第一导电膜上形成包含具有比氢更低的电负性的金属的第二导电膜; 通过蚀刻第一导电膜和第二导电膜形成源电极和漏电极; 以及在所述氧化物半导体膜，所述源电极和所述漏极上形成与所述氧化物半导体膜接触的绝缘膜。

公开(公告)号：US08927981B2

公开(公告)日：2015-01-06

申请号：US12725478

申请日：2010-03-17

申请人： Kengo Akimoto ,  Hiromichi Godo ,  Akiharu Miyanaga

发明人： Kengo Akimoto ,  Hiromichi Godo ,  Akiharu Miyanaga

IPC分类号： H01L29/12 ,  H01L29/786 ,  H01L27/12 ,  H01L29/417 ,  H01L29/45

CPC分类号： H01L29/7869 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/45

摘要： The drain voltage of a transistor is determined depending on the driving voltage of an element connected to the transistor. With downsizing of a transistor, intensity of the electric field concentrated in the drain region is increased, and hot carriers are easily generated. An object is to provide a transistor in which the electric field hardly concentrates in the drain region. Another object is to provide a display device including such a transistor. End portions of first and second wiring layers having high electrical conductivity do not overlap with a gate electrode layer, whereby concentration of an electric field in the vicinity of a first electrode layer and a second electrode layer is reduced; thus, generation of hot carriers is suppressed. In addition, one of the first and second electrode layers having higher resistivity than the first and second wiring layers is used as a drain electrode layer.

摘要翻译： 晶体管的漏极电压取决于连接到晶体管的元件的驱动电压。 通过晶体管的小型化，集中在漏极区域的电场强度增加，容易产生热载流子。 目的在于提供一种晶体管，其中电场几乎不集中在漏极区域中。 另一个目的是提供一种包括这种晶体管的显示装置。 具有高导电性的第一和第二布线层的端部与栅电极层不重叠，从而减小了第一电极层和第二电极层附近的电场浓度; 因此，抑制了热载流子的产生。 此外，具有比第一和第二布线层更高的电阻率的第一和第二电极层之一被用作漏电极层。

公开(公告)号：US08871565B2

公开(公告)日：2014-10-28

申请号：US13222513

申请日：2011-08-31

申请人： Shunpei Yamazaki ,  Yusuke Nonaka ,  Takayuki Inoue ,  Masashi Tsubuku ,  Kengo Akimoto ,  Akiharu Miyanaga

发明人： Shunpei Yamazaki ,  Yusuke Nonaka ,  Takayuki Inoue ,  Masashi Tsubuku ,  Kengo Akimoto ,  Akiharu Miyanaga

IPC分类号： H01L21/44 ,  H01L29/786

CPC分类号： H01L29/78606 ,  H01L23/552 ,  H01L23/564 ,  H01L29/04 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

摘要： An object is to manufacture a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. A crystalline oxide semiconductor film is formed, without performing a plurality of steps, as follows: by utilizing a difference in atomic weight of plural kinds of atoms included in an oxide semiconductor target, zinc with low atomic weight is preferentially deposited on an oxide insulating film to form a seed crystal including zinc; and tin, indium, or the like with high atomic weight is deposited on the seed crystal while causing crystal growth. Further, a crystalline oxide semiconductor film is formed by causing crystal growth using a seed crystal with a hexagonal crystal structure including zinc as a nucleus, whereby a single crystal oxide semiconductor film or a substantially single crystal oxide semiconductor film is formed.

摘要翻译： 本发明的目的是制造具有稳定的电特性和高可靠性的氧化物半导体膜的半导体装置。 通过利用包含在氧化物半导体靶中的多种原子的原子量的差异，形成结晶氧化物半导体膜，而不进行多个步骤，优选将低原子量的锌沉积在氧化物绝缘膜上 形成包含锌的晶种; 并且具有高原子量的锡，铟等沉积在晶种上同时引起晶体生长。 此外，通过使用具有包含锌作为核的六方晶系结构的晶种进行晶体生长来形成结晶氧化物半导体膜，从而形成单晶氧化物半导体膜或大致单晶氧化物半导体膜。

公开(公告)号：US08841710B2

公开(公告)日：2014-09-23

申请号：US13546345

申请日：2012-07-11

申请人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

发明人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

IPC分类号： H01L29/76 ,  H01L29/49 ,  H01L29/786 ,  H01L29/45 ,  H01L21/02 ,  H01L27/12

CPC分类号： H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/016 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/15 ,  H01L27/3225 ,  H01L27/3241 ,  H01L27/3248 ,  H01L27/3258 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/786 ,  H01L29/78618

摘要： In an active matrix display device, electric characteristics of thin film transistors included in a circuit are important, and performance of the display device depends on the electric characteristics. Thus, by using an oxide semiconductor film including In, Ga, and Zn for an inverted staggered thin film transistor, variation in electric characteristics of the thin film transistor can be reduced. Three layers of a gate insulating film, an oxide semiconductor layer and a channel protective layer are successively formed by a sputtering method without being exposed to air. Further, in the oxide semiconductor layer, the thickness of a region overlapping with the channel protective film is larger than that of a region in contact with a conductive film.

摘要翻译： 在有源矩阵显示装置中，包括在电路中的薄膜晶体管的电特性是重要的，显示装置的性能取决于电特性。 因此，通过使用包括In，Ga和Zn的氧化物半导体膜用于反向交错薄膜晶体管，可以降低薄膜晶体管的电特性的变化。 通过溅射法连续地形成三层栅极绝缘膜，氧化物半导体层和沟道保护层，而不暴露于空气。 此外，在氧化物半导体层中，与沟道保护膜重叠的区域的厚度大于与导电膜接触的区域的厚度。

公开(公告)号：US08841661B2

公开(公告)日：2014-09-23

申请号：US12700758

申请日：2010-02-05

申请人： Kengo Akimoto ,  Masashi Tsubuku

发明人： Kengo Akimoto ,  Masashi Tsubuku

IPC分类号： H01L29/786 ,  H01L27/12 ,  H01L21/02

CPC分类号： H01L27/1214 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248

摘要： A method for forming a thin film transistor includes steps of forming a first wiring layer over a first electrode layer and forming a second wiring layer over a second electrode layer, wherein the first electrode layer extends beyond an end portion of the first wiring layer, the second electrode layer extends beyond an end portion of the second wiring layer, and a semiconductor layer is formed so as to be electrically connected to a side face and a top face of the first electrode layer and a side face and a top face of the second electrode layer.

摘要翻译： 一种形成薄膜晶体管的方法包括以下步骤：在第一电极层之上形成第一布线层，并在第二电极层上形成第二布线层，其中第一电极层延伸超出第一布线层的端部， 第二电极层延伸超过第二布线层的端部，并且形成半导体层以与第一电极层的侧面和顶面电连接，第二电极层的侧面和第二面的顶面 电极层。