公开(公告)号：US06925016B2

公开(公告)日：2005-08-02

申请号：US10467031

申请日：2002-01-30

申请人： Hiroyuki Takahashi ,  Takato Shimoyama ,  Takashi Kusakari

发明人： Hiroyuki Takahashi ,  Takato Shimoyama ,  Takashi Kusakari

IPC分类号： G11C11/401 ,  G11C7/10 ,  G11C11/403 ,  G11C11/406 ,  G11C7/00

CPC分类号： G11C7/1045

摘要： There is provided a method of entry of an operation mode of a semiconductor memory during operations without need of any specific timing specification and with effective suppression to any erroneous entry. If read cycles for plural addresses are continued, then, a request for entry of operation mode is accepted. In write cycles following to those read cycles, an operation mode to be entered is decided based on data externally designated, wherein in the first write cycle, the kind of the operation mode is set, and then in the next write cycle, conditions for the operation mode are set for the entry of the operation mode of the semiconductor memory.

摘要翻译： 提供了一种在操作期间输入半导体存储器的操作模式的方法，而不需要任何特定的时序指定并有效抑制任何错误的输入。 如果持续多个地址的读取周期，则接受进入操作模式的请求。 在这些读取周期之后的写入周期中，基于外部指定的数据来决定要输入的操作模式，其中在第一写入周期中，设置操作模式的种类，然后在下一个写入周期中， 操作模式被设置用于输入半导体存储器的操作模式。

公开(公告)号：US06919734B2

公开(公告)日：2005-07-19

申请号：US10716613

申请日：2003-11-20

申请人： Noboru Saito ,  Hiroyuki Takahashi ,  Noriyuki Igarashi ,  Keiichi Fukumoto ,  Hiroto Nakamura ,  Yutaka Watanabe ,  Kenichi Shimada

发明人： Noboru Saito ,  Hiroyuki Takahashi ,  Noriyuki Igarashi ,  Keiichi Fukumoto ,  Hiroto Nakamura ,  Yutaka Watanabe ,  Kenichi Shimada

IPC分类号： G01R31/26 ,  G01R1/04 ,  G01R31/00 ,  G01R31/01 ,  G01R31/02 ,  G01R31/28 ,  G01R31/303

CPC分类号： G01R31/01 ,  G01R1/0458 ,  G01R31/2806 ,  G01R31/2862 ,  G01R31/2863 ,  G01R31/2868 ,  G01R31/2877

摘要： A device testing apparatus including a connection terminal to which an electronic device under test is detachably attached, a pusher for pushing the electronic device in the direction of the connection terminal so as to connect the electronic device to the connection terminal, and a cooling unit for cooling the electronic device. As the cooling unit, an element cooling the device using electricity is for example used. The cooling unit includes a cooling medium blower for blowing a cooling medium around the electronic device and heat exchange projections or depressions for raising the cooling efficiency by blowing a cooling medium. In the device testing apparatus, even if the electronic device generates heat on its own during testing, the electronic device is cooled through the pusher, connection terminals, or socket, so the effect of the heat generated by the electronic device is canceled out and the electronic device can be tested at the predetermined temperature as prescribed in the specification.

公开(公告)号：US06903717B2

公开(公告)日：2005-06-07

申请号：US10243210

申请日：2002-09-13

申请人： Hiroyuki Takahashi ,  Katsuhiko Yarita

发明人： Hiroyuki Takahashi ,  Katsuhiko Yarita

IPC分类号： G02F1/1345 ,  G09F9/00 ,  G09F9/30 ,  G09G3/20 ,  G09G3/36 ,  G09G5/00

CPC分类号： G02F1/1345 ,  G02F2001/13456 ,  G09G3/3648

摘要： A display device of the present invention has a drain driver mounted to a display substrate and having a gate driver and a controller therein, and also has a power source mounted to a flexible printed board and supplying a power voltage to the gate driver. The wiring of a common control signal outputted from the controller and commonly used in control of the gate driver and the power source is formed on the display substrate so that the number of pads for connecting the display substrate and the flexible printed board is reduced. Thus, the construction of the flexible printed board is simplified, and the entire display device can be made compact.

摘要翻译： 本发明的显示装置具有安装在显示基板上并具有栅极驱动器和控制器的漏极驱动器，并且还具有安装到柔性印刷电路板的电源并向栅极驱动器提供电源电压。 在显示基板上形成从控制器输出的通用控制信号的布线，并且通常用于栅极驱动器和电源的控制，使得用于连接显示基板和柔性印刷电路板的焊盘的数量减少。 因此，简化了柔性印刷电路板的结构，并且可以使整个显示装置紧凑。

公开(公告)号：US06898142B2

公开(公告)日：2005-05-24

申请号：US10415604

申请日：2001-10-23

申请人： Hiroyuki Takahashi

发明人： Hiroyuki Takahashi

IPC分类号： G11C11/401 ,  G11C11/403 ,  G11C11/406 ,  G11C7/00

CPC分类号： G11C11/40618 ,  G11C11/406 ,  G11C11/40622 ,  G11C2211/4061 ,  G11C2211/4067

摘要： In accordance with the present invention, in order to reduce an averaged consumption current in a stand-by state, there is provided a semiconductor memory device including a memory cell array area which is divided into a plurality of areas, wherein the semiconductor memory device includes: at least one specific area setting unit being electrically coupled to said memory cell array area and adopted to set at least one area defined in said plurality of areas in accordance with an optional criterion; and at least one refresh operation control unit being electrically coupled to said memory cell array area and adopted to perform a refresh operation to the specific area based on at least one kind of specific refresh control signal, which is longer in cycle than a basic refresh control signal at least in a predetermined state of the semiconductor memory device.

摘要翻译： 根据本发明，为了降低待机状态下的平均消耗电流，提供了一种半导体存储器件，其包括被划分为多个区域的存储单元阵列区域，其中半导体存储器件包括 至少一个特定区域设定单元电耦合到所述存储单元阵列区域，并被采用以根据可选标准设置在所述多个区域中定义的至少一个区域; 以及至少一个刷新操作控制单元，其电耦合到所述存储单元阵列区域，并且被采用以基于与基本刷新控制相比周期长的至少一种特定刷新控制信号来对所述特定区域执行刷新操作 信号至少在半导体存储器件的预定状态。

公开(公告)号：US20050105380A1

公开(公告)日：2005-05-19

申请号：US10985876

申请日：2004-11-12

申请人： Hiroyuki Takahashi ,  Takato Shimoyama ,  Takuya Hirota

发明人： Hiroyuki Takahashi ,  Takato Shimoyama ,  Takuya Hirota

IPC分类号： G11C11/407 ,  G11C5/06 ,  G11C8/00

CPC分类号： G11C5/066

摘要： A semiconductor memory device has common terminals shared between a part or all of address terminals for receiving n bits of an address signal and data terminals for outputting a data signal with its bit width of n bits or less and dedicated address terminals for receiving m bits of the address signal, wherein at the time of a read, after the n bits of the address signal have been input, a plurality of data signals within a selected page are consecutively read out through the common terminals using the m bits of the address signal input from the dedicated address terminals.

摘要翻译： 半导体存储器件具有用于接收地址信号的n位的一部分或所有地址端之间的公共端子，以及用于输出其位宽为n位或更少的数据信号的数据端，以及用于接收m位的专用地址端 地址信号，其中在读取时，在输入了地址信号的n位之后，通过地址信号输入的m位，通过公共端连续地读出选定页内的多个数据信号 从专用地址终端。

公开(公告)号：US06879537B2

公开(公告)日：2005-04-12

申请号：US10492765

申请日：2002-10-16

申请人： Hiroyuki Takahashi ,  Atsushi Nakagawa

发明人： Hiroyuki Takahashi ,  Atsushi Nakagawa

IPC分类号： G11C11/403 ,  G11C7/20 ,  G11C11/406 ,  G11C11/407 ,  G11C11/4072 ,  G11C11/4074 ,  G11C11/4076 ,  G11C11/408 ,  G11C7/00

CPC分类号： G11C11/40615 ,  G11C7/20 ,  G11C11/406 ,  G11C11/4072 ,  G11C11/4074 ,  G11C11/4076 ,  G11C2207/2227 ,  G11C2211/4067 ,  G11C2211/4068

摘要： An operation control circuit is provided for shortening a transition time from a deep stand-by mode to a stand-by mode in a pseudo-SRAM having the deep stand-by mode and the stand-by mode. The transition from the deep stand-by mode to the stand-by mode starts first and second timer circuits which respectively output a timer output TN of a constant cycle needed for self-refresh and a timing signal TR of a shorter cycle than a self-refresh cycle. A counter circuit counts the output TR from the second timer circuit immediately after the deep stand-by mode has been transitioned to the stand-by mode. If the counted value corresponds to a value as set, then the counter circuit outputs an operation mode switching signal. A selector circuit comprising a multiplexer is switched and controlled by the output from the counter circuit. The selector circuit remains selecting TR until the counted value of the counter circuit corresponds to the set value, and in the subsequent stand-by mode, the selector circuit selects and outputs TN.

摘要翻译： 提供一种操作控制电路，用于在具有深度待机模式和待机模式的伪SRAM中缩短从深度备用模式到待机模式的转换时间。 从深度待机模式到待机模式的转变开始分别输出自刷新所需的恒定周期的定时器输出TN和比自动刷新短的周期的定时信号TR的第一和第二定时器电路， 刷新周期。 在深度待机模式已经转换到待机模式之后，计数器电路立即对来自第二定时器电路的输出TR进行计数。 如果计数值对应于设定的值，则计数器电路输出操作模式切换信号。 包括多路复用器的选择器电路由计数器电路的输出转换和控制。 选择器电路保持选择TR，直到计数器电路的计数值对应于设定值，并且在随后的待机模式中，选择器电路选择和输出TN。

公开(公告)号：US06864991B1

公开(公告)日：2005-03-08

申请号：US09498627

申请日：2000-02-07

申请人： Hiroyuki Takahashi

发明人： Hiroyuki Takahashi

IPC分类号： G06F3/12 ,  G06F15/00 ,  G06F3/00

CPC分类号： G06F3/1229 ,  G06F3/1204 ,  G06F3/1232 ,  G06F3/1259 ,  G06F3/1285

摘要： According to the present invention, data for all or a part of the MFP devices connected to a network are obtained, and are rearranged as a list or are limited based on a variety of data obtained for each device, such as equipment data, apparatus data, network setup data, job states and employment statuses. As a result, data desired by a user can be provided in real time.

摘要翻译： 根据本发明，获得了连接到网络的MFP设备的全部或一部分的数据，并且被重新排列成列表，或者基于为每个设备获得的各种数据（例如设备数据，设备数据 ，网络设置数据，工作状态和就业状况。 结果，可以实时地提供用户期望的数据。

公开(公告)号：US20050047239A1

公开(公告)日：2005-03-03

申请号：US10500400

申请日：2002-12-25

申请人： Hiroyuki Takahashi ,  Takuya Hirota ,  Noriaki Komatsu ,  Atsushi Nakagawa ,  Susumu Takano ,  Masahiro Yoshida ,  Yuuji Torige ,  Hideo Inaba

发明人： Hiroyuki Takahashi ,  Takuya Hirota ,  Noriaki Komatsu ,  Atsushi Nakagawa ,  Susumu Takano ,  Masahiro Yoshida ,  Yuuji Torige ,  Hideo Inaba

IPC分类号： G11C11/403 ,  G11C11/406 ,  G11C7/00

CPC分类号： G11C11/40603 ,  G11C11/406

摘要： Refresh of memory cells is performed periodically by a refresh timer, and collision between memory access and memory refresh is avoided. When memory access occurs, an F/F 163 is set by a one shot pulse from an OS circuit 161, a memory access request is inputted to a memory accessing pulse generator circuit 171 through a NOR gate 167, and a latch control signal LC and an enable signal REN are outputted. When a refresh request from the refresh timer is inputted to an AND gate 168 during the memory access, the output of the NOR gate 167 is at the “L” level, and the refresh request is blocked by the AND gate 168. Thereafter, at the time when the latch control signal LC is turned into the “L” level, F/Fs 163, 164 and 165 are reset, the output of the NOR gate 167 is turned into the “H” level, the refresh request is inputted to a refreshing pulse generator circuit 170, and a refresh enable signal RERF is outputted.

摘要翻译： 通过刷新定时器周期性地执行存储器单元的刷新，并避免存储器访问和存储器刷新之间的冲突。 当存储器访问发生时，通过来自OS电路161的单触发脉冲设置F / F 163，通过NOR门167将存储器访问请求输入到存储器访问脉冲发生器电路171，以及锁存控制信号LC和 输出使能信号REN。 当在存储器访问期间来自刷新定时器的刷新请求被输入到与门168时，或非门167的输出处于“L”电平，刷新请求由与门168阻止。此后， 当锁存控制信号LC变为“L”电平时，F / F 163,164和165被复位，或非门167的输出变成“H”电平，刷新请求被输入到 输出刷新脉冲发生器电路170和刷新使能信号RERF。

公开(公告)号：US20050040816A1

公开(公告)日：2005-02-24

申请号：US10891231

申请日：2004-07-15

申请人： Katsuaki Ando ,  Hiroyuki Takahashi

发明人： Katsuaki Ando ,  Hiroyuki Takahashi

IPC分类号： G01D5/245 ,  G01B7/30 ,  G01D5/20 ,  H02K24/00

CPC分类号： G01D5/2046

摘要： The present invention intends to provide a variable reluctance-type resolver which does not deteriorate detecting accuracy, and which can fix the rotor to the rotate shaft cheaply. For such purpose, the resolver 1 is comprised of a stator 5 on which coils 6 are wound, a rotor provided with protrude poles 4a, an annular stopper 10 made of magnetic material. An outer diameter DS of the stopper 10 is selected to be smaller than a valley diameter DR of the rotor 4. Leakage of the magnetic flux from the stator to the stopper is prevented, and stopper made of the magnetic material can fix the rotor in cheaper way.

摘要翻译： 本发明旨在提供一种不会降低检测精度的可变磁阻型旋转变压器，并且能够将转子固定在转轴上。 为此，旋转变压器1由卷绕有线圈6的定子5，具有突出极4a的转子，由磁性材料制成的环形止动件10构成。 止动件10的外径DS被选择为小于转子4的谷径DR。防止从定子到止动件的磁通量的泄漏，并且由磁性材料制成的止动件可以将转子固定在更便宜的位置 办法。

公开(公告)号：US20050012698A1

公开(公告)日：2005-01-20

申请号：US10873210

申请日：2004-06-23

申请人： Hiroyuki Takahashi

发明人： Hiroyuki Takahashi

IPC分类号： H01L51/50 ,  G09G3/20 ,  G09G3/30 ,  G09G3/32 ,  H04N5/70

CPC分类号： G09G3/3216 ,  G09G3/2014 ,  G09G3/3266 ,  G09G3/3275 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0256 ,  G09G2310/061 ,  G09G2320/0209 ,  G09G2320/0214 ,  G09G2320/041 ,  G09G2320/043 ,  G09G2330/028

摘要： The present invention is to provide a drive device which can prolong the lifetime of light emitting elements constituting a display panel in an environment of a high temperature. A thermistor TH1 is provided in a voltage boosting circuit 4 which drive and light the light emitting elements E11 to Enm in a light emitting display panel 1, and by this thermistor first light emission control means is constituted which drive and light the light emitting elements at an approximately constant light emission intensity value regardless of the level of the environmental temperature. Meanwhile, a current mirror circuit is arranged in an anode line drive circuit 2 which supplies a constant current to the respective light emitting elements E11 to Enm, and second light emission control means in which a current value is controlled by a control voltage Va from a temperature detection means 11A provided with a thermistor TH2 is constructed. The second light emission control means drives and lights the light emitting elements so that the intensity value becomes smaller than the constant light emission intensity value controlled by the first light emission control means in the case where a state in which the environmental temperature exceeds a predetermined value (for example, 50° C.) is detected.

摘要翻译： 本发明是提供一种能够在高温环境下延长构成显示面板的发光元件的寿命的驱动装置。 热敏电阻TH1设置在升压电路4中，升压电路4驱动并点亮发光显示面板1中的发光元件E11至Enm，并且通过该热敏电阻构成第一发光控制装置，其将发光元件驱动并点亮 大约恒定的发光强度值，而与环境温度的水平无关。 同时，在阳极线驱动电路2中设置电流镜电路，该阳极线驱动电路2向各个发光元件E11至Enm提供恒定电流;以及第二发光控制装置，其中电流值由控制电压Va 构成设有热敏电阻TH2的温度检测装置11A。 第二发光控制装置驱动并点亮发光元件，使得在环境温度超过预定值的情况下，强度值变得小于由第一发光控制装置控制的恒定发光强度值 （例如50℃）。