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公开(公告)号:US12211808B2
公开(公告)日:2025-01-28
申请号:US18343606
申请日:2023-06-28
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: HunTeak Lee , Choon Heung Lee , JunHo Ye
IPC: H01L23/66 , H01L21/48 , H01L21/56 , H01L23/31 , H01L23/538 , H01L23/552 , H01Q1/22
Abstract: A semiconductor device has an electrical component assembly, and a plurality of discrete antenna modules disposed over the electrical component assembly. Each discrete antenna module is capable of providing RF communication for the electrical component assembly. RF communication can be enabled for a first one of the discrete antenna modules, while RF communication is disabled for a second one of the discrete antenna modules. Alternatively, RF communication is enabled for the second one of the discrete antenna modules, while RF communication is disabled for the first one of the discrete antenna modules. A bump is formed over the discrete antenna modules. An encapsulant is deposited around the discrete antenna modules. A shielding layer is formed over the electrical components assembly. A stud or core ball can be formed internal to a bump connecting the discrete antenna modules to the electrical component assembly.
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公开(公告)号:US12211804B2
公开(公告)日:2025-01-28
申请号:US18429080
申请日:2024-01-31
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: ChangOh Kim , KyoWang Koo , SungWon Cho , BongWoo Choi , JiWon Lee
Abstract: A semiconductor device has a substrate. A first component and second component are disposed over the substrate. The first component includes an antenna. A lid is disposed over the substrate between the first component and second component. An encapsulant is deposited over the substrate and lid. A conductive layer is formed over the encapsulant and in contact with the lid. A first portion of the conductive layer over the first component is removed using laser ablation.
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公开(公告)号:US20250023227A1
公开(公告)日:2025-01-16
申请号:US18902287
申请日:2024-09-30
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: HunTeak Lee , KyoungHee Park , KyungHwan Kim , SeungHyun Lee , SangJun Park
IPC: H01Q1/22 , H01L21/56 , H01L23/31 , H01L23/36 , H01L23/498 , H01L23/552 , H01L25/16 , H01R12/71 , H05K1/18 , H05K3/34
Abstract: A semiconductor device has a PCB with an antenna and a semiconductor package mounted onto the PCB. An epoxy molding compound bump is formed or disposed over the PCB opposite the semiconductor package. A first shielding layer is formed over the PCB. A second shielding layer is formed over the semiconductor package. A board-to-board (B2B) connector is disposed on the PCB or as part of the semiconductor package. A conductive bump is disposed between the semiconductor package and PCB.
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公开(公告)号:US20250006682A1
公开(公告)日:2025-01-02
申请号:US18740608
申请日:2024-06-12
Applicant: JCET Management Co., Ltd. , STATS ChipPAC Pte. Ltd.
Inventor: Zhan YING , Kai LIU , Yaqin WANG
IPC: H01L23/00 , H01L23/31 , H01L23/373 , H01L23/498 , H01L25/065
Abstract: A semiconductor package comprise: a package substrate having a front surface and a rear surface, wherein the package substrate comprises: a set of front conductive patterns formed on the front surface; a set of rear conductive patterns formed on the rear surface; and a set of interconnects electrically coupling the set of front conductive patterns with the set of rear conductive patterns, respectively; at least one electronic component mounted on the front surface of the package substrate and electrically coupled to the set of front conductive patterns via a set of front solder balls; a set of rear solder balls electrically connected to the set of rear conductive patterns, respectively; wherein the set of front solder balls comprises one or more first-type solder balls and one or more second-type solder balls, and the set of rear solder balls comprises one or more first-type solder balls and one or more second-type solder balls; and wherein the first-type solder balls of the set of front solder balls are electrically coupled to the first-type solder balls of the set of rear solder balls.
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公开(公告)号:US20250006585A1
公开(公告)日:2025-01-02
申请号:US18740630
申请日:2024-06-12
Applicant: JCET Management Co., Ltd. , STATS ChipPAC Pte. Ltd.
Inventor: Zhan YING , Kai LIU , Yaqin WANG
IPC: H01L23/373 , H01L23/00 , H01L25/18 , H10B80/00
Abstract: A semiconductor package comprises: a package substrate having a front surface and a rear surface, wherein the package substrate comprises: a plurality sets of front conductive patterns; a plurality sets of rear conductive patterns; and a plurality sets of interconnects electrically coupling the set of front conductive patterns with the set of rear conductive patterns, respectively; wherein the package substrate at least comprises a first thermal performance region and a second thermal performance region, wherein the first thermal performance region and the second thermal performance region have different thermal performances; a plurality sets of conductive components attached to the front surface and the rear surface of the package substrate and connected to the plurality sets of front conductive patterns and the plurality sets of rear conductive patterns, wherein the plurality sets of conductive components comprise: a set of first-type conductive components mounted to the first thermal performance region of the package substrate; and a set of second-type conductive components mounted to the second thermal performance region of the package substrate.
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公开(公告)号:US20240387400A1
公开(公告)日:2024-11-21
申请号:US18646903
申请日:2024-04-26
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: JiSeon LEE , BumRyul MAENG , HyunKyu LEE
IPC: H01L23/552 , H01L21/56 , H01L23/14 , H01L23/31 , H01L23/528
Abstract: A semiconductor device and a method for making the same are provided. The method includes: providing a package including: a substrate having a front substrate surface and a back substrate surface, wherein the substrate includes a plurality of singulation areas separating the substrate into a plurality substrate units; a plurality of first electronic components mounted on the front substrate surface and within the plurality substrate units, respectively; and an encapsulant formed on the front substrate surface and encapsulating the plurality of first electronic components; forming a plurality of trenches at the plurality of singulation areas, respectively, wherein each of the plurality of trenches has a first portion extending through the encapsulant and a second portion extending through the encapsulant and the substrate; and forming an EMI shield to cover the encapsulant and lateral surfaces of the plurality of substrate units exposed by the second portions of the plurality of trenches.
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公开(公告)号:US20240347373A1
公开(公告)日:2024-10-17
申请号:US18636304
申请日:2024-04-16
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: JongChan PARK , YoungMin KIM , GilHo LEE , HyeongKwan KIM , TaeKeun LEE
IPC: H01L21/687 , H01L21/68
CPC classification number: H01L21/68785 , H01L21/68
Abstract: A device for holding a package substrate is provided. The device comprises: a lower jig comprising a base material, and magnets embedded within the base material; and an upper jig comprising a frame and a grid pattern inside the frame, wherein the frame has a skirt portion that defines a gap between the lower jig and the grid pattern to accommodate the package substrate, and wherein the grid pattern is attractable by the magnets such that when the upper jig is placed on the lower jig to accommodate the package substrate the grid pattern is in contact with the package substrate to apply a pressure to the package substrate due to a magnetic interaction between the magnets and the grid pattern.
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公开(公告)号:US20240343055A1
公开(公告)日:2024-10-17
申请号:US18619148
申请日:2024-03-27
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: HyunSeok PARK , KyoWang KOO , SeongKuk KIM , SeokBeom HEO
IPC: B41N1/24 , B23K1/00 , B23K1/20 , B23K101/40 , B41C1/14 , B41M1/12 , B41M1/26 , G03F7/00 , H01L23/00
CPC classification number: B41N1/248 , B23K1/0016 , B23K1/203 , B41C1/148 , B41M1/12 , B41M1/26 , G03F7/0035 , H01L24/11 , H01L24/81 , B23K2101/40 , H01L2224/1147 , H01L2224/81815
Abstract: A selective stencil mask and a stencil printing method are provided. The stencil mask is for printing a fluid material onto a substrate, and comprises: a stencil member comprising: at least one printing region each having an array of apertures that allow the fluid material to flow therethrough and deposit onto the substrate; and a blocking region configured to prevent the fluid material from flowing therethrough; and a supporting member attached to the stencil member and configured to, when the stencil mask is placed on the substrate, contact the substrate and create a gap between the stencil member and the substrate.
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公开(公告)号:US20240332209A1
公开(公告)日:2024-10-03
申请号:US18603185
申请日:2024-03-12
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: JiSik MOON , KyoWang KOO , HyunSeok PARK
IPC: H01L23/552 , H01L21/683 , H01L21/78 , H01L23/31 , H01L23/498 , H01L25/16
CPC classification number: H01L23/552 , H01L21/6836 , H01L21/78 , H01L23/3107 , H01L23/49816 , H01L25/16
Abstract: A method for forming a shielding layer to a semiconductor device, wherein the semiconductor device comprises a substrate, one or more electronic components on a front surface of the substrate, an encapsulant layer on the front surface of the substrate that covers the one or more electronic components and one or more connectors on a back surface of the substrate, the method comprising: applying a coating layer onto the back surface of the substrate to cover the one or more connectors; attaching the coating layer onto a tape to load the semiconductor device to the tape, wherein the attachment between the coating layer and the tape is stronger than the attachment between the coating layer and the back surface of the substrate as well as the one or more connectors; forming the shielding layer onto the encapsulant layer to cover the one or more electronic components; and unloading the semiconductor device from the tape, wherein the coating layer is left on the tape.
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130.
公开(公告)号:US20240332207A1
公开(公告)日:2024-10-03
申请号:US18193894
申请日:2023-03-31
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: ChangOh Kim , JinHee Jung
IPC: H01L23/552 , H01L21/48 , H01L21/56 , H01L23/31 , H01L23/498
CPC classification number: H01L23/552 , H01L21/4853 , H01L21/4857 , H01L21/565 , H01L23/3128 , H01L23/49822
Abstract: A semiconductor device has a substrate and an electrical component disposed over the substrate. An encapsulant is deposited over the electrical component and substrate. A magnetic film material is formed over the encapsulant. The magnetic film material may extend down a side surface of the semiconductor device. The magnetic film material is subject to laser spike annealing in a magnetic field. A shielding layer is formed over the magnetic film material. The laser spike annealing of the magnetic film material in the magnetic field can be done after forming the shielding layer. The shielding layer may extend down a side surface of the semiconductor device. A first magnet is disposed on a first side of the semiconductor device. A second magnet is disposed on a second side of the semiconductor device opposite the first side of the semiconductor device.
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