公开(公告)号：US20230420557A1

公开(公告)日：2023-12-28

申请号：US18335916

申请日：2023-06-15

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Angelo MAGRI' ,  Stefania FORTUNA

IPC: H01L29/78 ,  H01L21/265 ,  H01L21/765 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/7813 ,  H01L21/26513 ,  H01L21/765 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/66734

Abstract: A power MOSFET device includes an active area accommodating a first body region and a second body region having a first and, respectively, a second conductivity value. The second value is higher than the first value. A first channel region is disposed in the first body region between a first source region and a drain region, and the first channel region has and having a first channel length. A second channel region is disposed in the second body region between a second source region and the drain region, and the second channel region has and having a second channel length smaller than the first channel length. A first device portion, having a first threshold voltage, includes the first channel region, and a second device portion, having a second threshold voltage higher than the first threshold voltage, includes the second channel region.

公开(公告)号：US20230418559A1

公开(公告)日：2023-12-28

申请号：US17847817

申请日：2022-06-23

Applicant: STMICROELECTRONICS S.r.l. ,  STMicroelectronics International N.V.

Inventor： Michele ROSSI ,  Thomas BOESCH ,  Giuseppe DESOLI

IPC: G06F7/523 ,  G06F7/50

CPC classification number: G06F7/523 ,  G06F7/50

Abstract: A convolutional accelerator includes a feature line buffer, a kernel buffer, a multiply-accumulate cluster, and mode control circuitry. In a first mode of operation, the mode control circuitry stores feature data in a feature line buffer and stores kernel data in a kernel buffer. The data stored in the buffers is transferred to the MAC cluster of the convolutional accelerator for processing. In a second mode of operation the mode control circuitry stores feature data in the kernel buffer and stores kernel data in the feature line buffer. The data stored in the buffers is transferred to the MAC cluster of the convolutional accelerator for processing. The second mode of operation may be employed to efficiently process 1×N kernels, where N is an integer greater than or equal to 1.

公开(公告)号：US20230418548A1

公开(公告)日：2023-12-28

申请号：US17846586

申请日：2022-06-22

Applicant: STMicroelectronics S.r.l.

Inventor： Francesco STILGENBAUER

IPC: G06F3/16

CPC classification number: G06F3/165

Abstract: An audio device includes a gain step selection circuit that receives a different requested gain value and an associated requested step size from each of a plurality of sources, compares each requested gain value to a same feedback gain value and generates a polarity based thereupon, performs step polarization on each requested step size as a function of the generated polarity therefor to thereby generate a plurality of step values, and outputs a least of the plurality of step values as an output step value. An accumulator circuit generates a current input gain value based upon the output step value and the feedback gain value, and then updates the feedback gain value to be equal to the current input gain value. A normalizing circuit multiplies an input data value by the current input gain value and applies a truncation function to a result thereof to produce an output data value.

公开(公告)号：US11855604B2

公开(公告)日：2023-12-26

申请号：US17031181

申请日：2020-09-24

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Federico Vercesi ,  Lorenzo Corso ,  Giorgio Allegato ,  Gabriele Gattere

IPC: H03H9/10 ,  B81B7/00 ,  B81C1/00 ,  H03H3/02 ,  H03H9/17 ,  H03H9/15

CPC classification number: H03H9/1021 ,  B81B7/0038 ,  B81C1/00285 ,  H03H3/02 ,  H03H9/17 ,  B81B2201/0271 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2203/04 ,  B81B2207/07 ,  B81C2201/0105 ,  B81C2203/0118 ,  H03H2003/022 ,  H03H2003/027 ,  H03H2009/155

Abstract: A microelectromechanical resonator device has: a main body, with a first surface and a second surface, opposite to one another along a vertical axis, and made of a first layer and a second layer, arranged on the first layer; a cap, having a respective first surface and a respective second surface, opposite to one another along the vertical axis, and coupled to the main body by bonding elements; and a piezoelectric resonator structure formed by: a mobile element, constituted by a resonator portion of the first layer, suspended in cantilever fashion with respect to an internal cavity provided in the second layer and moreover, on the opposite side, with respect to a housing cavity provided in the cap; a region of piezoelectric material, arranged on the mobile element on the first surface of the main body; and a top electrode, arranged on the region of piezoelectric material, the mobile element constituting a bottom electrode of the piezoelectric resonator structure.

公开(公告)号：US11855554B2

公开(公告)日：2023-12-26

申请号：US17819504

申请日：2022-08-12

Applicant: STMicroelectronics S.r.l.

Inventor： Michele Boscolo Berto ,  Ezio Galbiati

IPC: H02M7/537 ,  H02M1/32 ,  H02P6/16

CPC classification number: H02M7/537 ,  H02M1/32 ,  H02P6/16

Abstract: A method of driving an electrical load includes coupling a power supply source to a power supply pin of a driver circuit, and coupling an electrical load to at least one output pin of the driver circuit. A driver sub-circuit of the driver circuit produces at least one driving signal for driving the electrical load. The at least one driving signal is provided to the electrical load via the at least one output pin. The at least one driving signal is modulated to supply the electrical load with a load current and to subsequently interrupt the load current. A compensation current pulse is sunk from the power supply pin, at a compensation circuit of the driver circuit, in response to the load current being interrupted.

公开(公告)号：US20230409320A1

公开(公告)日：2023-12-21

申请号：US18325519

申请日：2023-05-30

Applicant: STMicroelectronics S.r.l.

Inventor： Antonino Giuseppe Fontana ,  Giuseppe Guarnaccia ,  Stefano Catalano

IPC: G06F9/30

CPC classification number: G06F9/3004 ,  G06F9/30116 ,  G06F9/30189

Abstract: In an embodiment a One-Time Programmable (OTP) memory controller includes a data register, a given number K of shadow-registers, wherein the number K is smaller than a given number N of memory slots of an OTP memory area, a communication interface configured to receive a read request requesting the data of a given memory slot and a control circuit configured to receive a preload start signal and a shadow-register preload enable signal, wherein the control circuit is configured to manage a preload phase and a data-read phase.

公开(公告)号：US11846654B2

公开(公告)日：2023-12-19

申请号：US17209662

申请日：2021-03-23

Applicant: STMicroelectronics S.r.l.

Inventor： Romeo Letor

IPC: G01R31/58 ,  G01R19/00 ,  H02H1/00 ,  H02H9/02 ,  G01R19/17

CPC classification number: G01R31/58 ,  G01R19/003 ,  G01R19/17 ,  H02H1/0007 ,  H02H9/025

Abstract: Described herein is a method including measuring a current in a wire, normalizing the measured current, and comparing the normalized measured current to a control curve. The control curve is a function of a series of normalized current magnitudes and reaction times for corresponding ones of that series of normalized current magnitudes. The method further includes limiting the current in the wire based upon the comparison. The reaction times for ones of the series of normalized current magnitudes are times at which current limitation would occur if the normalized current remained at an associated normalized current magnitude.

公开(公告)号：US20230402980A1

公开(公告)日：2023-12-14

申请号：US17827293

申请日：2022-05-27

Applicant: STMicroelectronics S.r.l.

Inventor： Gaetano Cosentino

IPC: H03F3/45 ,  H04B1/16 ,  H03F3/72

CPC classification number: H03F3/45179 ,  H04B1/16 ,  H03F2200/69 ,  H03F3/72 ,  H03F2203/45 ,  H03F3/4508

Abstract: In an embodiment, a differential buffer includes: first and second input terminals configured to receive a differential input voltage; first and second output terminals configured to provide a differential output voltage; a differential source follower amplifier having first and second inputs respectively coupled to the first and second input terminals, and first and second outputs respectively coupled to the first and second output terminals; and a differential common source amplifier having first and second inputs respectively coupled to the second and first output terminals via a first pair of capacitors, and first and second outputs respectively coupled to the first and second output terminals.

公开(公告)号：US11843369B2

公开(公告)日：2023-12-12

申请号：US17388920

申请日：2021-07-29

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Giuseppe Patti

IPC: H01L27/06 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H03K17/30

CPC classification number: H03K17/302 ,  H01L27/0629 ,  H01L29/0696 ,  H01L29/66734 ,  H01L29/7808 ,  H01L29/7813

Abstract: An integrated device includes at least one MOS transistor having a plurality of cells. In each of one or more of the cells a disabling structure is provided. The disabling structure is configured to be in a non-conductive condition when the MOS transistor is switched on in response to a control voltage comprised between a threshold voltage of the MOS transistor and an intervention voltage of the disabling structure, or to be in a conductive condition otherwise. A system comprising at least one integrated device as above is also proposed. Moreover, a corresponding process for manufacturing this integrated device is proposed.

公开(公告)号：US11842954B2

公开(公告)日：2023-12-12

申请号：US17887838

申请日：2022-08-15

Applicant: STMicroelectronics S.r.l.

Inventor： Federico Giovanni Ziglioli ,  Alberto Pintus ,  Pierangelo Magni

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/49586 ,  H01L21/481 ,  H01L21/4825 ,  H01L21/565 ,  H01L23/49506

Abstract: A plastic material substrate has a die mounting location for a semiconductor die. Metallic traces are formed on selected areas of the plastic material substrate, wherein the metallic traces provide electrically-conductive paths for coupling to the semiconductor die. The semiconductor die is attached onto the die mounting location. The semiconductor die attached onto the die mounting location is electrically bonded to selected ones of the metallic traces formed on the plastic material substrate. A package material is molded onto the semiconductor die attached onto the die mounting location.