公开(公告)号：US07125593B2

公开(公告)日：2006-10-24

申请号：US10854249

申请日：2004-05-27

申请人： Tsuyoshi Komaki ,  Kenji Yamaga ,  Takashi Yamada

发明人： Tsuyoshi Komaki ,  Kenji Yamaga ,  Takashi Yamada

IPC分类号： B32B3/02

CPC分类号： G11B7/24056 ,  Y10T428/21

摘要： An optical recording medium including a substrate and a light transmitting layer provided on the substrate so as to have a smaller thickness than that of the substrate, which is hardly warped and excellent in electrical characteristics and productivity, is provided. An optical recording medium includes: a substrate; and a light transmitting layer having a smaller thickness than that of the substrate. In this medium, a material of the substrate is a polyether imide resin.

摘要翻译： 提供了一种光记录介质，其包括基板和设置在基板上的透光层，以便具有比基板的厚度更小的厚度，其几乎不翘曲并且具有优异的电特性和生产率。 光记录媒体包括：基板; 以及具有比基板小的厚度的透光层。 在该介质中，基材的材料是聚醚酰亚胺树脂。

公开(公告)号：US07116859B2

公开(公告)日：2006-10-03

申请号：US11258806

申请日：2005-10-26

申请人： Shinji Mino ,  Takeshi Kitagawa ,  Motohaya Ishii ,  Takashi Yamada ,  Akira Himeno ,  Masayuki Okuno ,  Shunichi Souma ,  Takashi Goh

发明人： Shinji Mino ,  Takeshi Kitagawa ,  Motohaya Ishii ,  Takashi Yamada ,  Akira Himeno ,  Masayuki Okuno ,  Shunichi Souma ,  Takashi Goh

IPC分类号： G02B6/35

CPC分类号： G02F1/3132 ,  G02B6/29355 ,  G02F1/31 ,  G02F1/3136 ,  G02F2201/16 ,  H04Q11/0005 ,  H04Q2011/0013 ,  H04Q2011/0015 ,  H04Q2011/0039 ,  H04Q2011/0052

摘要： An optical module controls its output characteristics electrically and an optical switch constitutes an optical module. An optical waveguide circuit (PLC) and an electronic circuit (IC) for driving the PLC are mounted on the same substrate. The IC is composed of a bare chip to be molded afterward. Wiring of the IC is grouped and integrated on the PLC substrate to achieve higher density and miniaturization of the optical module.

摘要翻译： 光学模块电气控制其输出特性，并且光学开关构成光学模块。 用于驱动PLC的光波导电路（PLC）和电子电路（IC）安装在同一基板上。 IC由以后成型的裸芯片组成。 将IC的布线分组并集成在PLC基板上，以实现更高密度和光学模块的小型化。

公开(公告)号：US07095040B2

公开(公告)日：2006-08-22

申请号：US09753722

申请日：2001-01-04

申请人： Shingo Iwasaki ,  Takashi Yamada ,  Takuya Hata ,  Takashi Chuman ,  Nobuyasu Negishi ,  Kazuto Sakemura ,  Atsushi Yoshizawa ,  Hideo Satoh ,  Takamasa Yoshikawa ,  Kiyohide Ogasawara

发明人： Shingo Iwasaki ,  Takashi Yamada ,  Takuya Hata ,  Takashi Chuman ,  Nobuyasu Negishi ,  Kazuto Sakemura ,  Atsushi Yoshizawa ,  Hideo Satoh ,  Takamasa Yoshikawa ,  Kiyohide Ogasawara

IPC分类号： H01L29/43

CPC分类号： B82Y10/00 ,  H01J1/312 ,  H01J9/022

摘要： An electron-emitting device includes an electron source layer made of a metal, a metal alloy or a semiconductor, an insulating layer formed on the electron source layer and a metal thin film electrode formed on the insulating layer. Electrons are emitted upon application of an electric field between the electron source layer and the metal thin film electrode. The insulating layer has at least one island region which constitutes an electron-emitting section in which the film thickness of the insulating layer is gradually reduced. The electron-emitting device further includes a carbon region made of carbon or a carbon compound on at least one of a top, bottom and inside of the island region.

摘要翻译： 电子发射器件包括由金属，金属合金或半导体制成的电子源层，形成在电子源层上的绝缘层和形成在绝缘层上的金属薄膜电极。 在电子源层和金属薄膜电极之间施加电场时发射电子。 绝缘层具有构成电绝缘层的膜厚逐渐降低的电子发射部的至少一个岛状区域。 电子发射器件还包括在岛区域的顶部，底部和内部中的至少一个上由碳或碳化合物制成的碳区域。

公开(公告)号：US20060092305A1

公开(公告)日：2006-05-04

申请号：US11264513

申请日：2005-10-31

申请人： Ichiro Baba ,  Takashi Yamada

发明人： Ichiro Baba ,  Takashi Yamada

IPC分类号： H04N5/335 ,  H04N3/14

CPC分类号： H04N5/3765 ,  H04N5/37213

摘要： The solid-state image pickup device comprises: light-receiving pixels which convert incident light into charges; a vertical-transfer section which has a plurality of transfer gates for transferring charges read from the light-receiving pixels in the column direction; a horizontal-transfer section which is coupled with the vertical-transfer section and outputs charges transferred from the vertical-transfer section in a horizontal period cycle; a timing pulse producing section which produces timing pulses for producing driving signals for driving the transfer gates; and a driving signal producing section for producing driving signals for driving the transfer gates based on outputs from the timing pulse producing section. The timing pulse producing section produces the timing pulses in such a manner that distributions of timing pulse switching periods of driving signals for driving at least two of the transfer gates in the same column have the same distribution ratio, to each other, as the distribution of reference switching periods obtained from frequency dependence of charge transfer efficiencies such that the charge transfer efficiencies of the transfer gates are not less than a predetermined value.

摘要翻译： 固态图像拾取装置包括：将入射光转换成电荷的受光像素; 垂直传送部分，其具有用于传送从列方向上的受光像素读取的电荷的多个传送门; 水平传送部分，其与垂直传送部分耦合并且在水平周期周期中输出从垂直传送部分传送的电荷; 定时脉冲产生部分，产生用于产生用于驱动传输门的驱动信号的定时脉冲; 以及驱动信号产生部分，用于根据来自定时脉冲产生部分的输出产生用于驱动传输门的驱动信号。 定时脉冲产生部分以这样的方式产生定时脉冲，使得用于驱动同一列中的至少两个传输门的驱动信号的定时脉冲切换周期的分布彼此具有相同的分配比，作为 从电荷转移效率的频率依赖性获得的参考开关周期，使得转移门的电荷转移效率不小于预定值。

公开(公告)号：US20060034564A1

公开(公告)日：2006-02-16

申请号：US11258806

申请日：2005-10-26

申请人： Shinji Mino ,  Takeshi Kitagawa ,  Motohaya Ishii ,  Takashi Yamada ,  Akira Himeno ,  Masayuki Okuno ,  Shunichi Souma ,  Takashi Goh

发明人： Shinji Mino ,  Takeshi Kitagawa ,  Motohaya Ishii ,  Takashi Yamada ,  Akira Himeno ,  Masayuki Okuno ,  Shunichi Souma ,  Takashi Goh

IPC分类号： G02B6/42 ,  G02B6/26

CPC分类号： G02F1/3132 ,  G02B6/29355 ,  G02F1/31 ,  G02F1/3136 ,  G02F2201/16 ,  H04Q11/0005 ,  H04Q2011/0013 ,  H04Q2011/0015 ,  H04Q2011/0039 ,  H04Q2011/0052

摘要： An optical module controls its output characteristics electrically and an optical switch constitutes the optical module. An optical waveguide circuit (PLC) and an electronic circuit (IC) for driving the PLC are mounted on the same substrate. The IC is composed of a bare chip to be molded afterward. Wiring of the IC is grouped and integrated on the PLC substrate to achieve higher density and miniaturization of the optical module.

公开(公告)号：US06989228B2

公开(公告)日：2006-01-24

申请号：US09917912

申请日：2001-07-31

申请人： Masayuki Kojima ,  Yoshimi Torii ,  Michimasa Hunabashi ,  Kazuyuki Suko ,  Takashi Yamada ,  Keizo Kuroiwa ,  Kazuo Nojiri ,  Yoshinao Kawasaki ,  Yoshiaki Sato ,  Ryooji Fukuyama ,  Hironobu Kawahara

发明人： Masayuki Kojima ,  Yoshimi Torii ,  Michimasa Hunabashi ,  Kazuyuki Suko ,  Takashi Yamada ,  Keizo Kuroiwa ,  Kazuo Nojiri ,  Yoshinao Kawasaki ,  Yoshiaki Sato ,  Ryooji Fukuyama ,  Hironobu Kawahara

IPC分类号： H01L21/461

CPC分类号： H01L21/67069 ,  H01L21/02071 ,  H01L21/31138 ,  H01L21/67028 ,  H01L21/67173 ,  H01L21/67745 ,  Y10S438/963 ,  Y10T436/11 ,  Y10T436/25 ,  Y10T436/2575

摘要： Disclosed is apparatus for treating samples, and a method of using the apparatus. The apparatus includes processing apparatus (a) for treating the samples (e.g., plasma etching apparatus), (b) for removing residual corrosive compounds formed by the sample treatment, (c) for wet-processing of the samples and (d) for dry-processing the samples. A plurality of wet-processing treatments of a sample can be performed. The wet-processing apparatus can include a plurality of wet-processing stations. The samples can either be passed in series through the plurality of wet-processing stations, or can be passed in parallel through the wet-processing stations.

公开(公告)号：US20050285530A1

公开(公告)日：2005-12-29

申请号：US11148182

申请日：2005-06-09

申请人： Takashi Yamada ,  Masaki Yoshinari ,  Yoichi Okumura ,  Tausuku Ishibashi

发明人： Takashi Yamada ,  Masaki Yoshinari ,  Yoichi Okumura ,  Tausuku Ishibashi

IPC分类号： H01J11/14 ,  H01J11/22 ,  H01J11/24 ,  H01J11/26 ,  H01J11/32 ,  H01J11/34 ,  H01J11/38 ,  H01J11/02

CPC分类号： H01J11/32 ,  H01J11/14 ,  H01J11/38 ,  H01J2211/323

摘要： Row electrode pairs each extending in the row direction and column electrodes each extending in the column direction are provided on the front glass substrate placed opposite the back glass substrate with the discharge space in between. The row electrode pairs and the column electrodes are covered by a first dielectric layer and a second dielectric layer so as to be separated from each other. Each of the recessed trenches is formed in a portion of the first and second dielectric layers between a transparent electrode of the row electrode and the column electrode between which an address discharge is produced in the discharge cell.

摘要翻译： 每个沿行方向延伸的行电极对和各列沿列方向延伸的列电极设置在与后玻璃基板相对放置的前玻璃基板上，其间具有放电空间。 行电极对和列电极被第一电介质层和第二电介质层覆盖以便彼此分离。 每个凹槽形成在第一和第二电介质层的一部分之间，在行电极的透明电极和列电极之间，在放电单元中产生寻址放电。

公开(公告)号：US20050141262A1

公开(公告)日：2005-06-30

申请号：US10845403

申请日：2004-05-14

申请人： Takashi Yamada ,  Fumio Horiguchi ,  Takashi Ohsawa ,  Yoshihisa Iwata ,  Yoshiaki Asao

发明人： Takashi Yamada ,  Fumio Horiguchi ,  Takashi Ohsawa ,  Yoshihisa Iwata ,  Yoshiaki Asao

IPC分类号： H01L27/108 ,  G11C11/24 ,  G11C11/404 ,  H01L21/8239 ,  H01L21/8242 ,  H01L21/84 ,  H01L27/105 ,  H01L27/12

CPC分类号： H01L27/108 ,  H01L21/84 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/1203 ,  H01L29/7841 ,  H01L29/785

摘要： A semiconductor memory device includes a plurality of MIS transistors arranged at intersections of first word lines and bit lines formed on an SOI substrate and each configuring a memory cell. Each of the plurality of MIS transistors includes a channel body formed in a semiconductor layer on an insulating film and set in an electrically floating state, a first extension region formed in contact with the channel body in the semiconductor layer and arranged in a first word line direction, a gate insulating film formed on the channel body, a gate electrode formed on the gate insulating film and electrically connected to a corresponding one of the first word lines, and source and drain regions separately formed in a bit line direction in the semiconductor layer to sandwich the channel body.

摘要翻译： 半导体存储器件包括多个MIS晶体管，其布置在形成在SOI衬底上的第一字线和位线的交点处，并且每个配置存储器单元。 多个MIS晶体管中的每一个包括形成在绝缘膜上的半导体层中并设置为电浮置状态的沟道体，与半导体层中的沟道体接触形成并布置在第一字线中的第一延伸区域 形成在沟道体上的栅极绝缘膜，形成在栅极绝缘膜上并电连接到第一字线中的相应一个的栅极电极以及在半导体层中分别形成在位线方向上的源极和漏极区域 夹住通道体。

公开(公告)号：US06906384B2

公开(公告)日：2005-06-14

申请号：US10096655

申请日：2002-03-14

申请人： Takashi Yamada ,  Tsutomu Sato ,  Shinichi Nitta ,  Hajime Nagano ,  Ichiro Mizushima ,  Hisato Oyamatsu ,  Yoshihiro Minami ,  Shinji Miyano ,  Osamu Fujii

发明人： Takashi Yamada ,  Tsutomu Sato ,  Shinichi Nitta ,  Hajime Nagano ,  Ichiro Mizushima ,  Hisato Oyamatsu ,  Yoshihiro Minami ,  Shinji Miyano ,  Osamu Fujii

IPC分类号： H01L21/76 ,  H01L21/762 ,  H01L21/764 ,  H01L21/8234 ,  H01L21/8242 ,  H01L21/84 ,  H01L27/08 ,  H01L27/088 ,  H01L27/10 ,  H01L27/108 ,  H01L27/12 ,  H01L29/786 ,  H01L27/01

CPC分类号： H01L27/10861 ,  H01L21/76243 ,  H01L21/823481 ,  H01L21/84 ,  H01L27/10873 ,  H01L27/10894 ,  H01L27/1203 ,  H01L29/78639

摘要： A semiconductor device includes first and second semiconductor layers and first and second MOS transistors. The first semiconductor layer is provided on and electrically connected to the semiconductor substrate. The second semiconductor layer is provided near the first semiconductor layer and formed above the semiconductor substrate via one of an insulating film and a cavity. The first and second MOS transistors are respectively provided on the first and second semiconductor layers, and each has a gate electrode arranged parallel to a boundary between the first and second semiconductor layers.

摘要翻译： 半导体器件包括第一和第二半导体层以及第一和第二MOS晶体管。 第一半导体层设置在半导体衬底上并与之电连接。 第二半导体层设置在第一半导体层附近，并且经由绝缘膜和空腔中的一个形成在半导体基板的上方。 第一和第二MOS晶体管分别设置在第一和第二半导体层上，并且各自具有平行于第一和第二半导体层之间的边界排列的栅电极。

公开(公告)号：US06872331B2

公开(公告)日：2005-03-29

申请号：US10632824

申请日：2003-08-04

申请人： Kiyoshi Kuroda ,  Takashi Yamada ,  Yoshitaka Tamo ,  Kazunori Adachi

发明人： Kiyoshi Kuroda ,  Takashi Yamada ,  Yoshitaka Tamo ,  Kazunori Adachi

IPC分类号： G01N27/41 ,  B01D53/32 ,  C04B35/01 ,  C04B35/50 ,  C22C29/12 ,  G01N27/407 ,  G01N27/409 ,  G01N27/416 ,  H01B1/06 ,  H01B1/08 ,  H01M8/02 ,  H01M8/12 ,  B01J20/28 ,  G01N27/12

CPC分类号： B01D53/326 ,  C04B35/01 ,  C04B35/50 ,  G01N27/4073 ,  H01M8/1246 ,  Y02E60/525 ,  Y02P70/56

摘要： An oxide ion conductor is manufactured having a relatively high mechanical strength while the ionic conduction thereof is maintained at a satisfactory level. The oxide ion conductor is represented by the formula Ln11-xAxGa1-y-z-wB1yB2zB3wO3-d. In the oxide ion conductor, Ln1 is at least one element selected from the group consisting of La, Ce, Pr, Nd, and Sm, A is at least one element selected from the group consisting of Sr, Ca, and Ba, B1 is at least one element selected from the group consisting of Mg, Al, and In, B2 is at least one element selected from the group consisting of Co, Fe, Ni, and Cu, and B3 is at least one element selected from the group consisting of Al, Mg, Co, Ni, Fe, Cu, Zn, Mn, and Zr, wherein x is 0.05 to 0.3, y is 0.025 to 0.29, z is 0.01 to 0.15, w is 0.01 to 0.15, y+z+w is 0.035 to 0.3, and d is 0.04 to 0.3.

摘要翻译： 制造具有较高机械强度的氧化物离子导体，同时将其离子导电保持在令人满意的水平。 氧化物离子导体由式Ln11-xAxGa1-y-z-wB1yB2zB3wO3-d表示。 在氧化物离子导体中，Ln1是选自La，Ce，Pr，Nd和Sm中的至少一种元素，A是选自Sr，Ca和Ba中的至少一种元素，B1是 选自Mg，Al和In，B2中的至少一种元素是选自Co，Fe，Ni和Cu中的至少一种元素，B3是选自由以下组成的组中的至少一种元素： 的Al，Mg，Co，Ni，Fe，Cu，Zn，Mn和Zr，其中x为0.05至0.3，y为0.025至0.29，z为0.01至0.15，w为0.01至0.15，y + z + w 为0.035〜0.3，d为0.04〜0.3。