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    ISOLATION STRUCTURE FOR IMAGE SENSOR DEVICE
    121.
    发明申请
    ISOLATION STRUCTURE FOR IMAGE SENSOR DEVICE 审中-公开
    图像传感器设备的隔离结构

    公开(公告)号：US20080303932A1

    公开(公告)日：2008-12-11

    申请号：US12120019

    申请日：2008-05-13

    申请人： Wen-De Wang ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Chun-Chieh Chuang ,  Jyh-Ming Hung

    发明人： Wen-De Wang ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Chun-Chieh Chuang ,  Jyh-Ming Hung

    IPC分类号： H04N5/335

    CPC分类号： H01L27/14689 ,  H01L27/1463

    摘要： Provided is an image sensor device including a substrate with a pixel region and a peripheral region. A first isolation structure is formed on the substrate in the pixel region. The first isolation structure includes a trench having a first depth. A second isolation structure is formed on the substrate in the peripheral region. The second isolation structure includes a trench having a second depth. The first depth is greater than the second depth.

    摘要翻译： 提供了一种包括具有像素区域和周边区域的基板的图像传感器装置。 在像素区域中的衬底上形成第一隔离结构。 第一隔离结构包括具有第一深度的沟槽。 在周边区域的基板上形成第二隔离结构。 第二隔离结构包括具有第二深度的沟槽。 第一个深度大于第二个深度。

    Dual shallow trench isolation and related applications
    123.
    发明授权
    Dual shallow trench isolation and related applications 有权
    双浅沟槽隔离及相关应用

    公开(公告)号：US09196547B2

    公开(公告)日：2015-11-24

    申请号：US12751126

    申请日：2010-03-31

    申请人： Jeng-Shyan Lin ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang ,  Volume Chien

    发明人： Jeng-Shyan Lin ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang ,  Volume Chien

    IPC分类号： H01L27/146 ,  H01L21/8238 ,  H01L21/762

    CPC分类号： H01L27/1463 ,  H01L21/76229 ,  H01L21/823878 ,  H01L27/14621 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14683 ,  H01L27/14689

    摘要： Embodiments of the invention relate to dual shallow trench isolations (STI). In various embodiments related to CMOS Image Sensor (CIS) technologies, the dual STI refers to one STI structure in the pixel region and another STI structure in the periphery or logic region. The depth of each STI structure depends on the need and/or isolation tolerance of devices in each region. In an embodiment, the pixel region uses NMOS devices and the STI in this region is shallower than that of in the periphery region that includes both NMOS and PMOS device having different P- and N-wells and that desire more protective isolation (i.e., deeper STI). Depending on implementations, different numbers of masks (e.g., two, three) are used to generate the dual STI, and are disclosed in various method embodiments.

    摘要翻译： 本发明的实施例涉及双重浅沟槽隔离（STI）。 在涉及CMOS图像传感器（CIS）技术的各种实施例中，双STI是指像素区域中的一个STI结构和外围或逻辑区域中的另一个STI结构。 每个STI结构的深度取决于每个区域中器件的需要和/或隔离容差。 在一个实施例中，像素区域使用NMOS器件，并且该区域中的STI比包括具有不同P阱和N阱的NMOS和PMOS器件的外围区域中的STI浅，并且需要更多的保护隔离（即，更深的 STI）。 根据实施方案，使用不同数量的掩模（例如，两个，三个）来产生双STI，并且在各种方法实施例中公开。

    Back side illuminated image sensor having isolated bonding pads
    124.
    发明授权
    Back side illuminated image sensor having isolated bonding pads 有权
    具有隔离接合垫的背面照明图像传感器

    公开(公告)号：US09165970B2

    公开(公告)日：2015-10-20

    申请号：US13028471

    申请日：2011-02-16

    申请人： Shuang-Ji Tsai ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Wen-De Wang ,  Hsiao-Hui Tseng

    发明人： Shuang-Ji Tsai ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Wen-De Wang ,  Hsiao-Hui Tseng

    IPC分类号： H01L27/146

    CPC分类号： H01L27/14687 ,  H01L23/481 ,  H01L23/525 ,  H01L24/83 ,  H01L27/14623 ,  H01L27/14632 ,  H01L27/14636 ,  H01L27/14638 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14683 ,  H01L27/14689

    摘要： Provided is an image sensor device. The image sensor device includes having a front side, a back side, and a sidewall connecting the front and back sides. The image sensor device includes a plurality of radiation-sensing regions disposed in the substrate. Each of the radiation-sensing regions is operable to sense radiation projected toward the radiation-sensing region through the back side. The image sensor device includes an interconnect structure that is coupled to the front side of the substrate. The interconnect structure includes a plurality of interconnect layers and extends beyond the sidewall of the substrate. The image sensor device includes a bonding pad that is spaced apart from the sidewall of the substrate. The bonding pad is electrically coupled to one of the interconnect layers of the interconnect structure.

    摘要翻译： 提供了一种图像传感器装置。 图像传感器装置包括具有连接前侧和后侧的前侧，后侧和侧壁。 图像传感器装置包括设置在基板中的多个辐射感测区域。 每个辐射感测区域可操作以感测通过后侧朝向辐射感测区域投射的辐射。 图像传感器装置包括耦合到基板的前侧的互连结构。 互连结构包括多个互连层并且延伸超过衬底的侧壁。 图像传感器装置包括与衬底的侧壁间隔开的接合焊盘。 接合焊盘电连接到互连结构的互连层之一。

    Method of forming an image device
    126.
    发明授权
    Method of forming an image device 有权
    形成图像装置的方法

    公开(公告)号：US08883544B2

    公开(公告)日：2014-11-11

    申请号：US13595494

    申请日：2012-08-27

    申请人： Szu-Ying Chen ,  Min-Feng Kao ,  Jen-Cheng Liu ,  Feng-Chi Hung ,  Dun-Nian Yaung

    发明人： Szu-Ying Chen ,  Min-Feng Kao ,  Jen-Cheng Liu ,  Feng-Chi Hung ,  Dun-Nian Yaung

    IPC分类号： H01L21/00

    CPC分类号： H01L27/1463 ,  H01L27/14612 ,  H01L27/14614 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/14689

    摘要： A method of forming of an image sensor device includes an isolation well formed in a pixel region of a substrate. The isolation well has a first conductivity type. A gate stack is formed over the isolation well on the substrate. A mask layer is formed over the isolation well and covering at least a majority portion of the gate stack. A plurality of dopants is implanted in the pixel region, using the gate stack and the mask layer as masks, to form doped isolation features. The plurality of dopants has the first conductivity type. A source region and a drain region are formed on opposite sides of the gate stack in the substrate. The source region and the drain region have a second conductivity type opposite to the A conductivity.

    摘要翻译： 形成图像传感器装置的方法包括在衬底的像素区域中形成的隔离阱。 隔离阱具有第一导电类型。 栅极堆叠形成在衬底上的隔离阱上。 掩模层形成在隔离阱上并覆盖栅极堆叠的至少大部分部分。 使用栅极堆叠和掩模层作为掩模将多个掺杂剂注入到像素区域中，以形成掺杂的隔离特征。 多个掺杂剂具有第一导电类型。 源极区域和漏极区域形成在衬底中的栅极堆叠的相对侧上。 源极区域和漏极区域具有与A电导率相反的第二导电类型。

    Vertically integrated image sensor chips and methods for forming the same
    127.
    发明授权
    Vertically integrated image sensor chips and methods for forming the same 有权
    垂直集成的图像传感器芯片及其形成方法

    公开(公告)号：US08766387B2

    公开(公告)日：2014-07-01

    申请号：US13475301

    申请日：2012-05-18

    申请人： Jeng-Shyan Lin ,  Feng-Chi Hung ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Szu-Ying Chen ,  Wen-De Wang ,  Tzu-Hsuan Hsu

    发明人： Jeng-Shyan Lin ,  Feng-Chi Hung ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Szu-Ying Chen ,  Wen-De Wang ,  Tzu-Hsuan Hsu

    IPC分类号： H01L31/02

    CPC分类号： H01L27/14687 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14685 ,  H01L27/1469 ,  H01L2224/48463

    摘要： A device includes a Backside Illumination (BSI) image sensor chip, which includes an image sensor disposed on a front side of a first semiconductor substrate, and a first interconnect structure including a plurality of metal layers on the front side of the first semiconductor substrate. A device chip is bonded to the image sensor chip. The device chip includes an active device on a front side of a second semiconductor substrate, and a second interconnect structure including a plurality of metal layers on the front side of the second semiconductor substrate. A first via penetrates through the BSI image sensor chip to connect to a first metal pad in the second interconnect structure. A second via penetrates through a dielectric layer in the first interconnect structure to connect to a second metal pad in the first interconnect structure, wherein the first via and the second via are electrically connected.

    摘要翻译： 一种装置包括背面照明（BSI）图像传感器芯片，其包括设置在第一半导体衬底的前侧上的图像传感器，以及包括在第一半导体衬底的前侧上的多个金属层的第一互连结构。 器件芯片被结合到图像传感器芯片。 器件芯片包括在第二半导体衬底的正面上的有源器件和在第二半导体衬底的正面上包括多个金属层的第二互连结构。 第一通孔穿过BSI图像传感器芯片以连接到第二互连结构中的第一金属焊盘。 第二通孔穿过第一互连结构中的电介质层，以连接到第一互连结构中的第二金属焊盘，其中第一通孔和第二通孔电连接。

    System and Method for Fabricating a 3D Image Sensor Structure
    129.
    发明申请
    System and Method for Fabricating a 3D Image Sensor Structure 有权
    用于制作3D图像传感器结构的系统和方法

    公开(公告)号：US20140042445A1

    公开(公告)日：2014-02-13

    申请号：US13572436

    申请日：2012-08-10

    申请人： Min-Feng Kao ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang

    发明人： Min-Feng Kao ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang

    IPC分类号： H01L31/18 ,  H01L31/0368

    CPC分类号： H01L27/14634 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689 ,  H01L27/1469 ,  H01L27/14696

    摘要： A system and method for fabricating a 3D image sensor structure is disclosed. The method comprises providing an image sensor with a backside illuminated photosensitive region on a substrate, applying a first dielectric layer to the first side of the substrate opposite the substrate side where image data is gathered, and applying a semiconductor layer that is optionally polysilicon, to the first dielectric layer. A least one control transistor may be created on the first dielectric layer, within the semiconductor layer and may optionally be a row select, reset or source follower transistor. An intermetal dielectric may be applied over the first dielectric layer; and may have at least one metal interconnect disposed therein. A second interlevel dielectric layer may be disposed on the control transistors. The dielectric layers and semiconductor layer may be applied by bonding a wafer to the substrate or via deposition.

    摘要翻译： 公开了一种用于制造3D图像传感器结构的系统和方法。 该方法包括在基板上提供具有背面照射感光区域的图像传感器，将第一电介质层施加到与图像数据收集的基板侧相对的基板的第一侧，以及施加可选择的多晶硅的半导体层， 第一介电层。 可以在半导体层内的第一介电层上形成至少一个控制晶体管，并且可以可选地是行选择，复位或源极跟随器晶体管。 可以在第一介电层上施加金属间电介质; 并且可以具有布置在其中的至少一个金属互连。 第二层间电介质层可以设置在控制晶体管上。 电介质层和半导体层可以通过将晶片结合到衬底或通过沉积来施加。