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138 条记录 (耗时 0.043 秒)

    CHEMICAL TRIM OF PHOTORESIST LINES BY MEANS OF A TUNED OVERCOAT MATERIAL
    124.
    发明申请
    CHEMICAL TRIM OF PHOTORESIST LINES BY MEANS OF A TUNED OVERCOAT MATERIAL 有权
    通过调谐过滤材料的化学品线的化学研究

    公开(公告)号：US20090311490A1

    公开(公告)日：2009-12-17

    申请号：US12137743

    申请日：2008-06-12

    申请人： Sean David Burns ,  Matthew E. Colburn ,  Steven John Holmes ,  Wu-Song Huang

    发明人： Sean David Burns ,  Matthew E. Colburn ,  Steven John Holmes ,  Wu-Song Huang

    IPC分类号： B32B3/00 ,  G03F7/20

    CPC分类号： G03F7/40 ,  Y10T428/24802

    摘要： A new lithographic process comprises reducing the linewidth of an image while maintaining the lithographic process window, and using this process to fabricate pitch split structures comprising nm order (e.g., about 22 nm) node semiconductor devices. The process comprises applying a lithographic resist layer on a surface of a substrate and patterning and developing the lithographic resist layer to form a nm order node image having an initial line width. Overcoating the nm order node image with an acidic polymer produces an acidic polymer coated image. Heating the acidic polymer coated image gives a heat treated coating on the image, the heating being conducted at a temperature and for a time sufficient to reduce the initial linewidth to a subsequent narrowed linewidth. Developing the heated treated coating removes it from the image resulting in a free-standing trimmed lithographic feature on the substrate. Optionally repeating the foregoing steps further reduces the linewidth of the narrowed line. The invention also comprises a product produced by this process.

    摘要翻译： 新的光刻工艺包括在保持光刻工艺窗口的同时降低图像的线宽，并且使用该工艺来制造包括nm阶（例如约22nm）的节点半导体器件的间距分裂结构。 该方法包括在基片的表面上施加平版印刷抗蚀剂层，并对平版印刷抗蚀剂层进行图形化和显影，以形成具有初始线宽的nm阶节点图像。 用酸性聚合物覆盖nm阶节点图像产生酸性聚合物涂层图像。 加热酸性聚合物涂覆的图像给图像上的热处理涂层，加热在足以将初始线宽降低到随后变窄的线宽的温度和时间内进行。 显影加热处理的涂层将其从图像中去除，从而在基底上产生独立的修整光刻特征。 可选地，重复前述步骤进一步减小了变窄线的线宽。 本发明还包括通过该方法生产的产品。

    METHOD FOR FABRICATING SELF-ALIGNED NANOSTRUCTURE USING SELF-ASSEMBLY BLOCK COPOLYMERS, AND STRUCTURES FABRICATED THEREFROM
    125.
    发明申请
    METHOD FOR FABRICATING SELF-ALIGNED NANOSTRUCTURE USING SELF-ASSEMBLY BLOCK COPOLYMERS, AND STRUCTURES FABRICATED THEREFROM 有权
    使用自组装嵌段共聚物制备自对准纳米结构的方法及其制备的结构

    公开(公告)号：US20090233236A1

    公开(公告)日：2009-09-17

    申请号：US12049780

    申请日：2008-03-17

    申请人： Charles T. Black ,  Matthew E. Colburn ,  David L. Rath

    发明人： Charles T. Black ,  Matthew E. Colburn ,  David L. Rath

    IPC分类号： G03F7/00

    CPC分类号： G03F7/039 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002

    摘要： In one embodiment, the present invention provides a method for patterning a surface that includes forming a block copolymer atop a heterogeneous reflectivity surface, wherein the block copolymer is segregated into first and second units; applying a radiation to the first units and second units, wherein the heterogeneous reflectivity surface produces an exposed portion of the first units and the second units; and applying a development cycle to selectively remove at least one of the exposed first and second units of the segregated copolymer film to provide a pattern.

    摘要翻译： 在一个实施方案中，本发明提供了一种用于图案化表面的方法，其包括在异质反射表面之上形成嵌段共聚物，其中嵌段共聚物分离成第一和第二单元; 对所述第一单元和第二单元施加辐射，其中所述异质反射表面产生所述第一单元和所述第二单元的暴露部分; 并且施加开发周期以选择性地去除所述分离的共聚物膜的暴露的第一和第二单元中的至少一个以提供图案。

    Method for fabricating dual damascene structures
    126.
    发明授权
    Method for fabricating dual damascene structures 失效
    双镶嵌结构的制作方法

    公开(公告)号：US07579137B2

    公开(公告)日：2009-08-25

    申请号：US11317089

    申请日：2005-12-24

    申请人： Matthew E. Colburn ,  Dario L. Goldfarb

    发明人： Matthew E. Colburn ,  Dario L. Goldfarb

    IPC分类号： G03F7/26

    CPC分类号： G03F7/094 ,  G03F1/50

    摘要： A method for fabricating a dual damascene structure includes providing a multi-layer photoresist stack comprising a first photoresist layer and a second photoresist layer, wherein each photoresist layer has a distinct dose-to-clear value, exposing said photoresist stack to one or more predetermined patterns of light, and developing said photo-resist layers to form a multi-tiered structure in the photo-resist layers.

    摘要翻译： 一种用于制造双镶嵌结构的方法包括提供包括第一光致抗蚀剂层和第二光致抗蚀剂层的多层光致抗蚀剂层，其中每个光致抗蚀剂层具有不同的剂量至清除值，将所述光致抗蚀剂层暴露于一个或多个预定的 并且显影所述光致抗蚀剂层以在光致抗蚀剂层中形成多层结构。

    GATE PATTERNING SCHEME WITH SELF ALIGNED INDEPENDENT GATE ETCH
    127.
    发明申请
    GATE PATTERNING SCHEME WITH SELF ALIGNED INDEPENDENT GATE ETCH 失效
    具有自对准独立门控阀的门控方案

    公开(公告)号：US20090203200A1

    公开(公告)日：2009-08-13

    申请号：US12027444

    申请日：2008-02-07

    申请人： Scott D. Halle ,  Matthew E. Colburn ,  Bruce B. Doris ,  Thomas W. Dyer

    发明人： Scott D. Halle ,  Matthew E. Colburn ,  Bruce B. Doris ,  Thomas W. Dyer

    IPC分类号： H01L21/027

    CPC分类号： H01L21/32139 ,  H01L21/266 ,  H01L21/28123 ,  H01L21/823828

    摘要： A method for self-aligned gate patterning is disclosed. Two masks are used to process adjacent semiconductor components, such as an nFET and pFET that are separated by a shallow trench isolation region. The mask materials are chosen to facilitate selective etching. The second mask is applied while the first mask is still present, thereby causing the second mask to self align to the first mask. This avoids the undesirable formation of a stringer over the shallow trench isolation region, thereby improving the yield of a semiconductor manufacturing operation.

    摘要翻译： 公开了一种用于自对准栅极图案化的方法。 使用两个掩模来处理相邻的半导体部件，例如由浅沟槽隔离区分隔的nFET和pFET。 选择掩模材料以便于选择性蚀刻。 当第一掩模仍然存在时，施加第二掩模，从而使第二掩模与第一掩模自对准。 这避免了在浅沟槽隔离区域上不期望地形成纵梁，从而提高半导体制造操作的产量。

    Process of multiple exposures with spin castable film
    129.
    发明申请
    Process of multiple exposures with spin castable film 审中-公开
    可旋涂薄膜多次曝光的过程

    公开(公告)号：US20090104566A1

    公开(公告)日：2009-04-23

    申请号：US11875798

    申请日：2007-10-19

    申请人： Martin Burkhardt ,  Sean D. Burns ,  Matthew E. Colburn

    发明人： Martin Burkhardt ,  Sean D. Burns ,  Matthew E. Colburn

    IPC分类号： G03F7/20

    CPC分类号： H01L21/0274 ,  H01L21/0334 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76811 ,  H01L21/76816 ,  H01L2221/1021

    摘要： Methods of multiple exposure in the fields of deep ultraviolet photolithography, next generation lithography, and semiconductor fabrication comprise a spin-castable methodology for enabling multiple patterning by completing a standard lithography process for the first exposure, followed by spin casting an etch selective overcoat layer, applying a second photoresist, and subsequent lithography. Utilizing the etch selectivity of each layer, provides a cost-effective, high resolution patterning technique. The invention comprises a number of double or multiple patterning techniques, some aimed at achieving resolution benefits, as well as others that achieve cost savings, or both resolution and cost savings. These techniques include, but are not limited to, pitch splitting techniques, pattern decomposition techniques, and dual damascene structures.

    摘要翻译： 在深紫外光刻，下一代光刻和半导体制造领域中多次曝光的方法包括通过完成用于第一次曝光的标准光刻工艺，随后旋转铸造蚀刻选择性外涂层，实现多重图案化的可旋转铸造方法， 施加第二光刻胶和随后的光刻。 利用各层的蚀刻选择性，提供了经济有效的高分辨率图案化技术。 本发明包括一些双重或多重图案化技术，一些旨在实现分辨率优点的技术，以及其他实现成本节约或者分辨率和成本节省的技术。 这些技术包括但不限于音调分割技术，图案分解技术和双镶嵌结构。