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139 条记录 (耗时 0.034 秒)

    Semiconductor device and chip structure thereof
    132.
    发明申请
    Semiconductor device and chip structure thereof 审中-公开
    半导体器件及其芯片结构

    公开(公告)号：US20070262444A1

    公开(公告)日：2007-11-15

    申请号：US11800451

    申请日：2007-05-04

    申请人： Yung-Chang Chen ,  Yuan-Lin Tzeng ,  Ming-Tsung Wang ,  Jeng-Yuan Lai ,  Cheng-Hsu Hsiao

    发明人： Yung-Chang Chen ,  Yuan-Lin Tzeng ,  Ming-Tsung Wang ,  Jeng-Yuan Lai ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/34

    CPC分类号： H01L23/42 ,  H01L21/563 ,  H01L21/78 ,  H01L29/0657 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2224/05599

    摘要： A semiconductor device, a chip structure thereof, and a method for fabricating the same are proposed. The method involves cutting a wafer with an array of chips twice so as to separate the chips and to form a chip structure. The first cutting is wider than the second cutting, and both are performed on an inactive surface of each of the chips. The chip structure includes a protruding portion formed on the inactive surface. The chip structure is electrically connected to a substrate by conductive bumps in a flip-chip manner and mounted with a heat sink. A decrease in contact area between the chip and the heat sink reduces warpage caused to the semiconductor device by thermal stress, thus preventing delamination of the heat sink and cracking of the conductive bumps, and reducing the expense and time spent on finding suitable underfill materials.

    摘要翻译： 提出了一种半导体器件及其芯片结构及其制造方法。 该方法包括用芯片阵列切割晶片两次以分离芯片并形成芯片结构。 第一切割比第二切割宽，并且都在每个切屑的非活性表面上进行。 芯片结构包括形成在非活性表面上的突出部分。 芯片结构通过导电凸块以倒装芯片方式电连接到基板，并安装有散热片。 芯片和散热片之间的接触面积的减小减少了热应力对半导体器件产生的翘曲，从而防止了散热器的分层和导电凸块的破裂，并且降低了在寻找合适的底部填充材料上花费的花费和时间。

    Semiconductor package with heat sink
    134.
    发明申请
    Semiconductor package with heat sink 有权
    半导体封装带散热片

    公开(公告)号：US20050280132A1

    公开(公告)日：2005-12-22

    申请号：US11212290

    申请日：2005-08-26

    申请人： Chang-Fu Lin ,  Han-Ping Pu ,  Cheng-Hsu Hsiao ,  Chien Huang

    发明人： Chang-Fu Lin ,  Han-Ping Pu ,  Cheng-Hsu Hsiao ,  Chien Huang

    IPC分类号： H01L23/367 ,  H01L23/06

    CPC分类号： H01L23/36 ,  H01L23/3675 ,  H01L23/49816 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16315 ,  H01L2924/19105 ,  H01L2924/00014

    摘要： A semiconductor package with a heat sink is provided in which at least one chip is mounted on the substrate and covered by a heat sink. The heat sink is formed with a plurality of grooves or holes at positions in contact with the substrate, allowing an adhesive material to be applied between the heat sink and the substrate and filled into the grooves or holes for attaching the heat sink onto the substrate. The adhesive material filled into the grooves or holes provides an anchoring effect for firmly positioning the heat sink on the substrate. Therefore, it is not necessary to form predetermined holes on the substrate for being coupled to fixing members such as bolts, and incorporation of the heat sink would not affect trace routability and arrangement of input/output connections such as solder balls on the substrate and would not lead to cracks of the chip.

    摘要翻译： 提供了具有散热器的半导体封装，其中至少一个芯片安装在基板上并被散热器覆盖。 散热器在与基板接触的位置处形成有多个凹槽或孔，允许将粘合材料施加在散热器和基板之间并填充到用于将散热器附接到基板上的凹槽或孔中。 填充到槽或孔中的粘合剂材料提供了将散热器牢固地定位在基板上的锚固效果。 因此，不需要在基板上形成预定的孔，用于连接诸如螺栓的固定构件，并且散热器的结合不会影响迹线布线性以及诸如衬底上的焊球等输入/输出连接的布置 不会导致芯片的裂纹。

    Method for fabricating stack structure of semiconductor packages
    135.
    发明授权
    Method for fabricating stack structure of semiconductor packages 有权
    制造半导体封装的堆叠结构的方法

    公开(公告)号：US08420521B2

    公开(公告)日：2013-04-16

    申请号：US12955256

    申请日：2010-11-29

    申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

    发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

    IPC分类号： H01L21/44

    CPC分类号： H01L25/105 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/73 ,  H01L25/50 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01077 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

    摘要： A stack structure of semiconductor packages and a method for fabricating the stack structure are provided. A plurality of electrical connection pads and dummy pads are formed on a surface of a substrate of an upper semiconductor package and at positions corresponding to those around an encapsulant of a lower semiconductor package. Solder balls are implanted to the electrical connection pads and the dummy pads. The upper semiconductor package is mounted on the lower semiconductor package. The upper semiconductor package is electrically connected to the lower semiconductor package by the solder balls implanted to the electrical connection pads, and the encapsulant of the lower semiconductor package is surrounded and confined by the solder balls implanted to the dummy pads. Thereby, the upper semiconductor package is properly and securely positioned on the lower semiconductor package, without the occurrence of misalignment between the upper and lower semiconductor packages.

    摘要翻译： 提供半导体封装的堆叠结构以及制造叠层结构的方法。 在上半导体封装的衬底的表面上和与下半导体封装的密封剂周围的位置对应的位置处形成多个电连接焊盘和虚拟焊盘。 将焊球植入电连接焊盘和虚拟焊盘。 上半导体封装安装在下半导体封装上。 上半导体封装通过注入电连接焊盘的焊球电连接到下半导体封装，并且下半导体封装的密封剂被植入到虚拟焊盘中的焊球围绕并限制。 因此，上半导体封装被适当且牢固地定位在下半导体封装上，而不会发生上下半导体封装之间的未对准。

    Heat dissipating semiconductor package
    136.
    发明申请
    Heat dissipating semiconductor package 审中-公开
    散热半导体封装

    公开(公告)号：US20080164604A1

    公开(公告)日：2008-07-10

    申请号：US12008202

    申请日：2008-01-08

    申请人： Liang-Yi Hung ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

    发明人： Liang-Yi Hung ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/34

    CPC分类号： H01L23/3675 ,  H01L23/42 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2224/0401

    摘要： A heat dissipating semiconductor package is disclosed, including a chip carrier; at least a semiconductor chip mounted and electrically connected to the chip carrier; and a heat dissipating member mounted on the semiconductor chip with a thermal interface material (TIM) interposed therebetween, wherein the TIM is provided with a plurality of fillers for supporting the TIM at an appropriate height, thereby preventing the TIM from being wetted so as to avoid collapsing and overflow of the TIM as a result of wetting problem.

    摘要翻译： 公开了一种散热半导体封装，包括芯片载体; 至少安装并电连接到所述芯片载体的半导体芯片; 以及安装在半导体芯片上的散热构件，其间插入有热界面材料（TIM），其中所述TIM具有多个用于将TIM支撑在适当高度的填充物，从而防止TIM被润湿，从而 避免由于润湿问题导致TIM的崩溃和溢出。

    Stack structure of semiconductor packages and method for fabricating the stack structure
    138.
    发明申请
    Stack structure of semiconductor packages and method for fabricating the stack structure 有权
    半导体封装的堆叠结构和制造堆叠结构的方法

    公开(公告)号：US20070246811A1

    公开(公告)日：2007-10-25

    申请号：US11732853

    申请日：2007-04-04

    申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

    发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/02 ,  H01L21/00

    CPC分类号： H01L25/105 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/73 ,  H01L25/50 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01077 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

    摘要： A stack structure of semiconductor packages and a method for fabricating the stack structure are provided. A plurality of electrical connection pads and dummy pads are formed on a surface of a substrate of an upper semiconductor package and at positions corresponding to those around an encapsulant of a lower semiconductor package. Solder balls are implanted to the electrical connection pads and the dummy pads. The upper semiconductor package is mounted on the lower semiconductor package. The upper semiconductor package is electrically connected to the lower semiconductor package by the solder balls implanted to the electrical connection pads, and the encapsulant of the lower semiconductor package is surrounded and confined by the solder balls implanted to the dummy pads. Thereby, the upper semiconductor package is properly and securely positioned on the lower semiconductor package, without the occurrence of misalignment between the upper and lower semiconductor packages.

    摘要翻译： 提供半导体封装的堆叠结构以及制造叠层结构的方法。 在上半导体封装的衬底的表面上和与下半导体封装的密封剂周围的位置对应的位置处形成多个电连接焊盘和虚拟焊盘。 将焊球植入电连接焊盘和虚拟焊盘。 上半导体封装安装在下半导体封装上。 上半导体封装通过注入电连接焊盘的焊球电连接到下半导体封装，并且下半导体封装的密封剂被植入到虚拟焊盘中的焊球围绕并限制。 因此，上半导体封装被适当且牢固地定位在下半导体封装上，而不会发生上下半导体封装之间的未对准。