公开(公告)号：US20080170427A1

公开(公告)日：2008-07-17

申请号：US12003133

申请日：2007-12-20

Applicant: Sang-jun Choi ,  Jung-hyun Lee ,  Chang -soo Lee

Inventor： Sang-jun Choi ,  Jung-hyun Lee ,  Chang -soo Lee

IPC: G11C11/00 ,  H01L21/20

CPC classification number: H01L45/1226 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/142 ,  H01L45/144 ,  H01L45/1675

Abstract: Example embodiments may provide resistive random access memory devices and/or methods of manufacturing resistive random access memory devices. Example embodiment resistive random access memory devices may include a switching device and/or a storage node connected to the switching device. The storage node may include a stack structure including a plurality of resistance change layers separated from one another and first and second electrodes each on a side wall of the stack structure. The resistance change layers may be connected to the first and the second electrodes in parallel and/or may have different switching voltages from each other.

Abstract translation: 示例性实施例可以提供电阻性随机存取存储器件和/或制造电阻随机存取存储器件的方法。 示例性实施例电阻随机存取存储器设备可以包括连接到交换设备的交换设备和/或存储节点。 存储节点可以包括堆叠结构，其包括彼此分离的多个电阻变化层以及每个在堆叠结构的侧壁上的第一和第二电极。 电阻变化层可以并联连接到第一和第二电极和/或可以具有彼此不同的开关电压。

公开(公告)号：US20080169459A1

公开(公告)日：2008-07-17

申请号：US12003136

申请日：2007-12-20

Applicant: Sang-jun Choi ,  Jung-hyun Lee ,  Hyung-jin Bae ,  Chang-soo Lee

Inventor： Sang-jun Choi ,  Jung-hyun Lee ,  Hyung-jin Bae ,  Chang-soo Lee

IPC: H01L45/00

CPC classification number: H01L45/04 ,  H01L27/2436 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625

Abstract: Provided are a resistive random access memory device and a method of manufacturing the same. The resistive random access memory device includes a switching device and a storage node connected to the switching device, and the storage node includes a first electrode and a second electrode and a resistance change layer formed of Cu2-XO between the first electrode and the second electrode.

Abstract translation: 提供一种电阻随机存取存储器件及其制造方法。 电阻随机存取存储器件包括开关器件和连接到开关器件的存储节点，并且存储节点包括第一电极和第二电极以及由Cu 2-X X形成的电阻变化层， O在第一电极和第二电极之间。

公开(公告)号：US07394735B2

公开(公告)日：2008-07-01

申请号：US10429954

申请日：2003-05-06

Applicant: Jae-seong Shim ,  Hyun-soo Park ,  Jae-wook Lee ,  Jung-hyun Lee

Inventor： Jae-seong Shim ,  Hyun-soo Park ,  Jae-wook Lee ,  Jung-hyun Lee

IPC: G11B7/004

CPC classification number: G11B20/10009 ,  G11B20/18

Abstract: An apparatus, a method, and a computer readable recording medium thereof to update filter tap coefficients of an equalizer include a defect signal detection unit and a coefficient updating unit. The defect signal detection unit receives a sampled input signal reflected from an optical disc and/or a track jump signal, detects whether the input signal and/or the track jump signal are defective, and outputs an update stop signal indicative thereof. The coefficient updating unit stops the updating of the filter tap coefficients in response to the update stop signal and outputs current filter tap coefficients.

Abstract translation: 用于更新均衡器的滤波器抽头系数的装置，方法和计算机可读记录介质包括缺陷信号检测单元和系数更新单元。 缺陷信号检测单元接收从光盘反射的采样输入信号和/或轨道跳转信号，检测输入信号和/或轨道跳转信号是否有缺陷，并输出指示其的更新停止信号。 系数更新单元响应于更新停止信号停止更新滤波器抽头系数，并输出当前滤波器抽头系数。

公开(公告)号：US20070196984A1

公开(公告)日：2007-08-23

申请号：US11655191

申请日：2007-01-19

Applicant: Jung-hyun Lee ,  Sang-bong Bang ,  Sang-jun Choi ,  Bum-seok Seo ,  Chang-soo Lee

Inventor： Jung-hyun Lee ,  Sang-bong Bang ,  Sang-jun Choi ,  Bum-seok Seo ,  Chang-soo Lee

IPC: H01L21/336

CPC classification number: C23C14/46 ,  C23C14/0052 ,  C23C14/08 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1675

Abstract: Provided are a nonvolatile memory device, a layer deposition apparatus and a method of fabricating a nonvolatile memory device using the same. The apparatus may include a chamber capable of holding a substrate, a particle-discharging target discharging particles toward the substrate, and a first ion beam gun accelerating a first plurality of ions and irradiating the accelerated ions toward the substrate. The method of fabricating a nonvolatile memory device may include discharging particles from a target toward a substrate, accelerating and irradiating a first plurality of ions toward the substrate, forming a reaction product by reacting the discharged particles and the accelerated and irradiated first plurality of ions, and forming a data storage layer having a deposited layer on the substrate. The nonvolatile memory device may include a data storage layer including a transition metal oxide layer formed by reacting discharged transition metal particles and accelerated and irradiated oxygen ions.

Abstract translation: 提供一种非易失性存储器件，层淀积设备和使用其的非易失性存储器件的制造方法。 该装置可以包括能够保持基板的室，向基板排出颗粒的颗粒排放目标，以及加速第一多个离子并将加速离子朝向基板照射的第一离子束枪。 制造非易失性存储器件的方法可以包括将靶从靶向衬底排放，加速和照射第一多个离子朝向衬底，通过使排出的微粒和加速和照射的第一多个离子反应形成反应产物， 以及在所述基板上形成具有沉积层的数据存储层。 非易失性存储装置可以包括数据存储层，该数据存储层包括通过使放电的过渡金属颗粒和加速和照射的氧离子反应而形成的过渡金属氧化物层。

公开(公告)号：US20070195675A1

公开(公告)日：2007-08-23

申请号：US11528475

申请日：2006-09-28

Applicant: Jung Hyun Lee ,  Eing Seob Cho ,  Eun Jin Ryu ,  Jun Jin Kong

Inventor： Jung Hyun Lee ,  Eing Seob Cho ,  Eun Jin Ryu ,  Jun Jin Kong

IPC: G11B20/10

CPC classification number: G11B20/10009 ,  G11B20/10037 ,  G11B20/10046 ,  G11B20/10055 ,  G11B20/10101 ,  G11B20/10212 ,  G11B20/10222 ,  G11B20/10296 ,  G11B20/10425 ,  G11B20/10481 ,  G11B20/1426 ,  G11B20/22 ,  G11B2020/1457 ,  G11B2020/1863 ,  G11B2220/2562

Abstract: An optical disc reproducing apparatus includes an A/D converter; an asymmetry compensator for detecting 4T sampling signals; a phase locked loop including a frequency detector that counts and detects run-length signals from the digital signals and compensates frequency errors of the digital signals; a binary module including a Viterbi decoder, a slicer, and a minimum T compensator that compensates the digital signal with a minimum signal having a unit cycle; an equalizer; an adaptive level error detector detecting a base level of the Viterbi decoder from both an input signal into the equalizer and an output signal from the Viterbi decoder, and computing a filtering coefficient of the equalizer from the base level; and a signal quality measurer measuring a jitter or an SbER of the digital signal.

Abstract translation: 一种光盘再现装置，包括A / D转换器; 用于检测4T采样信号的不对称补偿器; 锁相环包括频率检测器，对来自数字信号的游程长度信号进行计数和检测，并补偿数字信号的频率误差; 包括维特比解码器，限幅器和最小T补偿器的二进制模块，其用具有单位周期的最小信号来补偿数字信号; 均衡器 自适应电平误差检测器，从输入到均衡器的输入信号和维特比解码器的输出信号中检测维特比解码器的基准电平，并从基准电平计算均衡器的滤波系数; 以及测量数字信号的抖动或SbER的信号质量测量器。

公开(公告)号：US20070108433A1

公开(公告)日：2007-05-17

申请号：US11650972

申请日：2007-01-09

Applicant: Jung-hyun Lee ,  Young-soo Park ,  Won-tae Lee

Inventor： Jung-hyun Lee ,  Young-soo Park ,  Won-tae Lee

IPC: H01L47/00

CPC classification number: H01L45/06 ,  H01L27/2436 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/16

Abstract: In a semiconductor memory device and a method of fabricating the same, a semiconductor memory device having a transistor and a data storing portion includes a heating portion interposed between the transistor and the data storing portion and a metal interconnection layer connected to the data storing portion, wherein the data storing portion includes a chalcogenide material layer, which undergoes a phase change due to a heating of the heating portion, for storing data therein.

Abstract translation: 在半导体存储器件及其制造方法中，具有晶体管和数据存储部分的半导体存储器件包括夹在晶体管和数据存储部分之间的加热部分和连接到数据存储部分的金属互连层， 其中所述数据存储部分包括由于所述加热部分的加热而发生相变的硫族化物材料层，用于在其中存储数据。

公开(公告)号：US20070072424A1

公开(公告)日：2007-03-29

申请号：US11519083

申请日：2006-09-12

Applicant: Jung-Hyun Lee ,  Sang-Bong Bang

Inventor： Jung-Hyun Lee ,  Sang-Bong Bang

IPC: H01L21/302 ,  H01L21/311 ,  H01L21/31 ,  H01L21/461 ,  H01L21/469

CPC classification number: H01L21/02164 ,  C23C16/401 ,  C23C16/45525 ,  C23C16/45529 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/3141 ,  H01L21/32055 ,  H01L29/66825 ,  H01L29/66833

Abstract: Provided are methods for manufacturing silicon rich oxide (SRO) layers useful in the fabrication of semiconductor devices, for example, non-volatile memory devices, and methods for fabricating semiconductor devices incorporating such SRO layers. The methods include absorbing a first silicon source gas onto the substrate, oxidizing the first absorbed layer to form a silicon oxide layer, absorbing a second silicon source gas onto the substrate and reducing the second absorbed layer to form a silicon layer. The combination of the silicon oxide layer(s) and the silicon layer(s) comprise, in turn, a composite SRO layer. These manufacturing methods facilitate control of the oxygen concentration in the SRO, the relative thicknesses of the silicon oxide and silicon layers, and provides improved step coverage, thus allowing the manufacturing of high quality semiconductor devices.

Abstract translation: 提供了制造用于制造半导体器件的富硅氧化物（SRO）层的方法，例如非易失性存储器件，以及用于制造并入这种SRO层的半导体器件的方法。 所述方法包括将第一硅源气体吸收到衬底上，氧化第一吸收层以形成氧化硅层，将第二硅源气体吸收到衬底上并还原第二吸收层以形成硅层。 氧化硅层和硅层的组合又包括复合SRO层。 这些制造方法有助于控制SRO中的氧浓度，氧化硅和硅层的相对厚度，并提供改进的台阶覆盖，从而允许制造高质量的半导体器件。

公开(公告)号：US20070045701A1

公开(公告)日：2007-03-01

申请号：US11508931

申请日：2006-08-24

Applicant: Jung-Hyun Lee ,  Sang-Bong Bang

Inventor： Jung-Hyun Lee ,  Sang-Bong Bang

IPC: H01L29/94

CPC classification number: H01L27/11502 ,  H01L27/10852 ,  H01L27/11507 ,  H01L27/2436 ,  H01L28/40 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1641 ,  H01L45/1675

Abstract: A storage node, a method of fabricating the same, a semiconductor memory device and a method of fabricating the same is provided. The method of fabricating a storage node may include forming a lower electrode, forming an irradiated data storage layer and forming an upper electrode.

Abstract translation: 提供存储节点，其制造方法，半导体存储器件及其制造方法。 制造存储节点的方法可以包括形成下电极，形成照射的数据存储层并形成上电极。

公开(公告)号：US20070023810A1

公开(公告)日：2007-02-01

申请号：US11529611

申请日：2006-09-29

Applicant: Hion-suck Baik ,  Jung-hyun Lee ,  Jong-bong Park ,  Yun-chang Park

Inventor： Hion-suck Baik ,  Jung-hyun Lee ,  Jong-bong Park ,  Yun-chang Park

IPC: H01L29/94 ,  H01L27/108 ,  H01L29/00

CPC classification number: H01L28/75 ,  H01L21/28556 ,  H01L27/10852 ,  H01L27/10855 ,  H01L28/55 ,  H01L28/65 ,  H01L28/90 ,  H01L28/91

Abstract: A semiconductor device with a stack type capacitor having a lower electrode formed of an aluminum-doped metal, and a manufacturing method thereof are provided. The semiconductor device includes: a semiconductor substrate having a gate structure and an active region; an interlayer dielectric film formed on the active region; a lower electrode formed of a metal containing aluminum on the interlayer dielectric film; a dielectric layer formed on the lower electrode; an upper electrode formed on the dielectric layer; and a plug formed in the interlayer dielectric film to electrically connect the active region with the lower electrode. The method includes: forming a gate structure and an active region on a semiconductor substrate; forming an interlayer dielectric film on the resultant semiconductor substrate; forming a plug in the interlayer dielectric film to electrically connect with the active region; forming a mold oxidation layer on the plug and the interlayer dielectric film; patterning the mold oxidation layer with a predetermined pattern and forming a lower electrode of material containing aluminum on the plug; and sequentially forming a dielectric layer and an upper electrode on the lower electrode.

Abstract translation: 提供具有由铝掺杂金属形成的下电极的堆叠型电容器的半导体器件及其制造方法。 半导体器件包括：具有栅极结构和有源区的半导体衬底; 形成在有源区上的层间绝缘膜; 在层间电介质膜上由含有铝的金属形成的下电极; 形成在下电极上的电介质层; 形成在电介质层上的上电极; 以及形成在所述层间电介质膜中以将所述有源区电连接到所述下电极的插塞。 该方法包括：在半导体衬底上形成栅极结构和有源区; 在所得半导体衬底上形成层间绝缘膜; 在所述层间电介质膜中形成插塞以与所述有源区电连接; 在插塞和层间电介质膜上形成模具氧化层; 以预定图案图案化模具氧化层，并在插头上形成含有铝的材料的下电极; 并且在下电极上依次形成电介质层和上电极。

公开(公告)号：US07153786B2

公开(公告)日：2006-12-26

申请号：US11034512

申请日：2005-01-12

Applicant: Jong-Pyo Kim ,  Jung-Hyun Lee ,  Bum-Seok Seo ,  Jung-Hyoung Lee

Inventor： Jong-Pyo Kim ,  Jung-Hyun Lee ,  Bum-Seok Seo ,  Jung-Hyoung Lee

IPC: H01L21/31 ,  H01L21/469

CPC classification number: H01L21/0228 ,  C23C16/40 ,  H01L21/02175 ,  H01L21/02192 ,  H01L21/022 ,  H01L21/28194 ,  H01L21/3141 ,  H01L21/31604 ,  H01L29/517

Abstract: Methods of fabricating a lanthanum oxide layer, and methods of fabricating a MOSFET and/or a capacitor especially adapted for semiconductor applications using such a lanthanum oxide layer are disclosed. The methods include a preliminary step of disposing a semiconductor substrate into a chamber. Tris(bis(trimethylsilyl)amino)Lanthanum as a lanthanum precursor is then injected into the chamber such that the lanthanum precursor is chemisorbed on the semiconductor substrate. Then, after carrying out a first purge of the chamber, at least one oxidizer is injected into the chamber such that the oxidizer is chemisorbed with the lanthanum precursor on the semiconductor substrate. Then, the chamber is purged a second time. The described steps of injecting the lanthanum precursor into the chamber, first-purging the chamber, injecting an oxidizer into the chamber, and second-purging the chamber may be sequentially and repeatedly performed to form a lanthanum oxide layer of a desired thickness having enhanced semiconductor characteristics.

Abstract translation: 公开了制造氧化镧层的方法以及特别适用于使用这种氧化镧层的半导体应用的MOSFET和/或电容器的制造方法。 所述方法包括将半导体衬底设置到腔室中的预备步骤。 然后将三（双（三甲基甲硅烷基）氨基）镧作为镧前体注入室中，使得镧前体在半导体衬底上被化学吸附。 然后，在进行室的第一次吹扫之后，至少一个氧化剂被注入到室中，使得氧化剂与半导体衬底上的镧前体化学吸附。 然后，房间被第二次清除。 将镧前体注入到室中，首先清洗室，将氧化剂注入到室中，以及对室进行第二次净化的所述步骤可以被顺序地和重复地进行，以形成具有增强的半导体的所需厚度的氧化镧层 特点