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公开(公告)号：US12125919B2
公开(公告)日：2024-10-22
申请号：US17430332
申请日：2020-02-11
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Shunpei Yamazaki , Tomonori Nakayama , Masahiro Takahashi
IPC: H01L29/786 , H01L29/24 , H10K59/121
CPC classification number: H01L29/7869 , H01L29/24 , H01L29/78648 , H01L29/78696 , H10K59/1213
Abstract: To provide a novel metal oxide. The metal oxide includes a first region and a second region. A third region is included between the first region and the second region. An interface of the first region is covered with the third region. The crystallinity of the third region is lower than the crystallinity of the first region. The crystallinity of the second region is lower than the crystallinity of the third region. The size of the first region measured from an image observed with a transmission electron microscope is greater than or equal to 1 nm and less than or equal to 3 nm.
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公开(公告)号：US12125849B2
公开(公告)日：2024-10-22
申请号：US18142064
申请日：2023-05-02
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei Yamazaki , Hajime Kimura
IPC: H01L23/522 , H01L21/48 , H01L21/56 , H01L21/66 , H01L21/68 , H01L21/768 , H01L23/00 , H01L23/31 , H01L23/495 , H01L23/498 , H01L23/528 , H01L23/532 , H01L25/065 , H01L27/088 , H10B41/27 , H10B43/27
CPC classification number: H01L27/088 , H01L21/76846 , H10B41/27 , H10B43/27
Abstract: A semiconductor device with large memory capacity is provided. A semiconductor device includes first to fourth insulators, a first conductor, a second conductor, and a first semiconductor, and the first semiconductor includes a first surface and a second surface. A first side surface of the first conductor is included on the first surface of the first semiconductor, and a first side surface of the first insulator is included on a second side surface of the first conductor. The second insulator is included in a region including a second side surface and a top surface of the first insulator, a top surface of the first conductor, and the second surface of the first semiconductor. The third insulator is included on a formation surface of the second insulator, and the fourth insulator is included on a formation surface of the third insulator. The second conductor is included in a region overlapping the second surface of the first semiconductor in a region where the fourth insulator is formed. The third insulator has a function of accumulating charge. A tunnel current is induced between the second surface of the first semiconductor and the third insulator with the second insulator therebetween by supply of a potential to the second conductor.
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公开(公告)号：US20240349579A1
公开(公告)日：2024-10-17
申请号：US18685268
申请日：2022-08-18
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Hisao IKEDA , Ryo HATSUMI , Daiki NAKAMURA , Takeya HIROSE
CPC classification number: H10K59/879 , G06V40/1318 , H10K30/87 , H10K39/34 , H10K59/8792 , G06F3/042 , G06F2203/04108
Abstract: A display device having an image capturing function is provided. The display device includes a first pixel and a second pixel. The first pixel includes a light-emitting device. The second pixel includes a light-receiving device and a lens. The light-emitting device and the light-receiving device share an electrode. The lens and the light-receiving device include a region overlapping with each other. The width of the lens is greater than the width of a light-receiving portion of the light-receiving device. The cross-sectional shape of the lens in a thickness direction including an optical axis is a substantial trapezoid. The surface including a leg of the substantially trapezoidal shape has a convex shape. The surface including an upper base of the substantially trapezoidal shape and the light-receiving portion are provided to face each other. The first pixel and the second pixel are provided to be adjacent to each other.
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154.发明公开公开(公告)号：US20240349546A1
公开(公告)日：2024-10-17
申请号：US18594460
申请日：2024-03-04
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Kaoru HATANO , Satoshi SEO , Takaaki NAGATA , Tatsuya OKANO
IPC: H10K59/124 , G02F1/1362 , G06F1/16 , H01L27/12 , H01L29/786 , H01L33/42 , H01L33/48 , H10K50/125 , H10K50/828 , H10K50/84 , H10K50/842 , H10K50/844 , H10K50/86 , H10K59/12 , H10K59/30 , H10K59/38 , H10K71/80 , H10K77/10 , H10K101/00 , H10K102/00
CPC classification number: H10K59/124 , H01L27/1214 , H01L27/1266 , H01L29/78678 , H01L33/48 , H10K50/84 , H10K50/8423 , H10K50/8426 , H10K50/844 , H10K59/38 , H10K77/111 , G02F1/136209 , G02F1/136222 , G06F1/1641 , H01L27/1225 , H01L33/42 , H10K50/125 , H10K50/828 , H10K50/865 , H10K59/12 , H10K59/1201 , H10K59/30 , H10K71/80 , H10K2101/27 , H10K2102/311 , H10K2102/351 , Y02E10/549 , Y02P70/50
Abstract: It is an object to provide a flexible light-emitting device with long lifetime in a simple way and to provide an inexpensive electronic device with long lifetime using the flexible light-emitting device. A flexible light-emitting device is provided, which includes a substrate having flexibility and a light-transmitting property with respect to visible light; a first adhesive layer over the substrate; an insulating film containing nitrogen and silicon over the first adhesive layer; a light-emitting element including a first electrode, a second electrode facing the first electrode, and an EL layer between the first electrode and the second electrode; a second adhesive layer over the second electrode; and a metal substrate over the second adhesive layer, wherein the thickness of the metal substrate is 10 μm to 200 μm inclusive. Further, an electronic device using the flexible light-emitting device is provided.
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公开(公告)号：US20240347644A1
公开(公告)日：2024-10-17
申请号：US18627560
申请日：2024-04-05
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shun OHTA , Rena WAKASA , Jesper EKLIND , Yuichi SATO
IPC: H01L29/786
CPC classification number: H01L29/7869
Abstract: A semiconductor device having excellent electrical characteristics is provided. The semiconductor device includes a first conductive layer, a first insulating layer over the first conductive layer, an oxide semiconductor layer over the first insulating layer, a second conductive layer, a third conductive layer, and a second insulating layer over the oxide semiconductor layer, and a fourth conductive layer over the second insulating layer. The second conductive layer and the third conductive layer each contain tantalum and nitrogen. In each of the second conductive layer and the third conductive layer, the percentage of a first tantalum bonding state is lower than or equal to 3%, and the percentage of a second tantalum bonding state is higher than or equal to 5%. The first tantalum bonding state is a bonding state of tantalum metal and a bonding state of tantalum nitride with stoichiometrically less nitrogen per tantalum, and the second tantalum bonding state is a bonding state of tantalum nitride with stoichiometrically equal nitrogen per tantalum.
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Patent Agency Ranking
公开(公告)号：US20240346985A1
公开(公告)日：2024-10-17
申请号：US18594548
申请日：2024-03-04
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Koji KUSUNOKI , Kazunori WATANABE
CPC classification number: G09G3/32 , G06F3/0412 , G06F3/044 , G06F3/046 , G09G2300/0814 , G09G2310/0202 , G09G2310/0243 , G09G2320/064 , G09G2320/0646 , G09G2354/00
Abstract: A novel display panel that is highly convenient or reliable is provided. The display panel includes a pixel comprising a pixel circuit and a display element, and the display element is electrically connected to the pixel circuit. The pixel circuit is supplied with a selection signal, an image signal, and a pulse width control signal, supplies an output potential, and determines, on the basis of the pulse width control signal, a period during which the output potential is supplied. The pixel circuit includes a first switch and a first transistor. The first switch supplies the image signal on the basis of the selection signal and determines the output potential on the basis of the image signal. The first transistor includes a first and second electrode, and a first gate electrode. The output potential is output from the first electrode, and the first gate electrode is supplied with the image signal.
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公开(公告)号：US12118333B2
公开(公告)日：2024-10-15
申请号：US17050359
申请日：2019-04-15
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Takayuki Ikeda , Roh Yamamoto , Shuichi Katsui
CPC classification number: G06F7/60 , G06F7/57 , G06N3/08 , H01L27/1207 , H01L27/1225 , H01L27/124 , H01L27/1255 , H01L29/78648 , H01L29/7869 , H10B12/00
Abstract: A semiconductor device that updates a weight coefficient used for arithmetic operation by an artificial neural network is provided. Each of the first to third memory cells draws a current corresponding to data of its retention node and changes the data in accordance with the potentials of first and second wirings. When a weight coefficient and first and second reference data are held in the retention nodes of the first to third memory cells, the first circuit supplies, to a third wiring, a constant currents drawn by the second and third memory cells. When input data is input to the first wiring, a difference current between the constant current and a current drawn by the first memory cell is changed, and the second circuit outputs arithmetic result data corresponding to the change. The third circuit inputs update data corresponding to the arithmetic result data to the second wiring.
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公开(公告)号：US12118286B2
公开(公告)日：2024-10-15
申请号：US17438551
申请日：2020-03-09
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Yusuke Koumura
IPC: G06F30/392 , G06N3/04 , G06N3/08 , G06N20/00
CPC classification number: G06F30/392 , G06N3/04 , G06N3/08 , G06N20/00
Abstract: A novel wiring layout design method is provided. A wiring layout in which a starting terminal group and an end terminal group are electrically connected to each other is generated using layout information and a netlist. In the case where the wiring layout satisfies a design rule, a wiring resistance and a parasitic capacitance of the wiring layout are extracted. The layout information is updated using Q learning and a new wiring layout is generated. In the Q learning, a positive reward is given when the values of the wiring resistance and the parasitic capacitance decrease, and a weight of the neural network is updated in accordance with the reward. In the case where the new wiring layout satisfies the design rule, a wiring resistance and a parasitic capacitance of the new wiring layout are extracted. In the case where the change rate of the wiring resistance and the parasitic capacitance is high, the layout information is updated using the Q learning.
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公开(公告)号：US20240339072A1
公开(公告)日：2024-10-10
申请号：US18636454
申请日：2024-04-16
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Koji KUSUNOKI , Kazunori WATANABE
CPC classification number: G09G3/32 , G06F3/0412 , G06F3/044 , G06F3/046 , G09G2300/0814 , G09G2310/0202 , G09G2310/0243 , G09G2320/064 , G09G2320/0646 , G09G2354/00
Abstract: A novel display panel that is highly convenient or reliable is provided. The display panel includes a pixel comprising a pixel circuit and a display element, and the display element is electrically connected to the pixel circuit. The pixel circuit is supplied with a selection signal, an image signal, and a pulse width control signal, supplies an output potential, and determines, on the basis of the pulse width control signal, a period during which the output potential is supplied. The pixel circuit includes a first switch and a first transistor. The first switch supplies the image signal on the basis of the selection signal and determines the output potential on the basis of the image signal. The first transistor includes a first and second electrode, and a first gate electrode. The output potential is output from the first electrode, and the first gate electrode is supplied with the image signal.
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公开(公告)号：US20240337877A1
公开(公告)日：2024-10-10
申请号：US18750016
申请日：2024-06-21
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Hajime Kimura
IPC: G02F1/13357 , G02F1/1362 , G02F1/1368 , G09G3/34 , G09G3/36
CPC classification number: G02F1/133621 , G02F1/136213 , G02F1/13624 , G02F1/136286 , G02F1/1368 , G09G3/3659 , G02F2201/121 , G02F2201/123 , G02F2202/10 , G09G3/342 , G09G3/3655 , G09G3/3688 , G09G2300/0426 , G09G2300/0443 , G09G2300/0842 , G09G2300/0852 , G09G2310/024 , G09G2310/0251 , G09G2310/0297 , G09G2320/0238 , G09G2320/0252 , G09G2320/0257 , G09G2320/0261 , G09G2320/028 , G09G2340/02 , G09G2340/0435 , G09G2340/16
Abstract: The present invention has a pixel which includes a first switch, a second switch, a third switch, a first resistor, a second resistor, a first liquid crystal element, and a second liquid crystal element. A pixel electrode of the first liquid crystal element is electrically connected to a signal line through the first switch. The pixel electrode of the first liquid crystal element is electrically connected to a pixel electrode of the second liquid crystal element through the second switch and the first resistor. The pixel electrode of the second liquid crystal element is electrically connected to a Cs line through the third switch and the second resistor. A common electrode of the first liquid crystal element is electrically connected to a common electrode of the second liquid crystal element.
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