Method for forming nanotube semiconductor devices
    171.
    发明授权
    Method for forming nanotube semiconductor devices 有权
    形成纳米管半导体器件的方法

    公开(公告)号:US07910486B2

    公开(公告)日:2011-03-22

    申请号:US12484166

    申请日:2009-06-12

    IPC分类号: H01L21/311

    摘要: A method for forming a semiconductor device includes forming a nanotube region using a thin epitaxial layer formed on the sidewall of a trench in the semiconductor body. The thin epitaxial layer has uniform doping concentration. In another embodiment, a first thin epitaxial layer of the same conductivity type as the semiconductor body is formed on the sidewall of a trench in the semiconductor body and a second thin epitaxial layer of the opposite conductivity type is formed on the first epitaxial layer. The first and second epitaxial layers have uniform doping concentration. The thickness and doping concentrations of the first and second epitaxial layers and the semiconductor body are selected to achieve charge balance. In one embodiment, the semiconductor body is a lightly doped P-type substrate. A vertical trench MOSFET, an IGBT, a Schottky diode and a P-N junction diode can be formed using the same N-Epi/P-Epi nanotube structure.

    摘要翻译: 形成半导体器件的方法包括:使用形成在半导体本体中的沟槽的侧壁上的薄外延层来形成纳米管区域。 薄的外延层具有均匀的掺杂浓度。 在另一个实施例中,在半导体主体中的沟槽的侧壁上形成与半导体本体相同的导电类型的第一薄外延层,并且在第一外延层上形成相反导电类型的第二薄外延层。 第一和第二外延层具有均匀的掺杂浓度。 选择第一和第二外延层和半导体本体的厚度和掺杂浓度以实现电荷平衡。 在一个实施例中,半导体本体是轻掺杂的P型衬底。 可以使用相同的N-Epi / P-Epi纳米管结构形成垂直沟槽MOSFET,IGBT,肖特基二极管和P-N结二极管。

    Differential electrical surge protection within a LAN magnetics interface circuit
    172.
    发明授权
    Differential electrical surge protection within a LAN magnetics interface circuit 有权
    局域网磁接口电路内的差动电涌保护

    公开(公告)号:US07808751B2

    公开(公告)日:2010-10-05

    申请号:US10833750

    申请日:2004-04-28

    IPC分类号: H02H3/20 H02H9/04

    摘要: A magnetic interface circuit for interfacing between the line side and the circuit side of a communication channel, such as an Ethernet port, includes a transformer having a primary winding connected to the line side of the channel and a secondary winding connected to the circuit side of the channel. The primary winding is fortified to provide differential mode electrical surge protection on the line side. The transformer design having parasitic L, C and R and, saturation during the surge event, acting to suppress the coupling of the electrical surge to the secondary winding. A voltage limiting device is connected in the circuit side of the channel to limit any voltage surges on the circuit side to a safe level. A pair of voltage limiting devices connected in series with the connection therebetween connected to ground may be used to also provide common mode surge protection.

    摘要翻译: 用于在诸如以太网端口的通信信道的线路侧和电路侧之间进行接口的磁接口电路包括具有连接到该通道的线路侧的初级绕组的变压器和连接到该通道的电路侧的次级绕组 这个频道。 初级绕组被加强以在线路侧提供差模电涌保护。 具有寄生L,C和R的变压器设计以及在浪涌事件期间的饱和度用于抑制电涌与次级绕组的耦合。 电压限制装置连接在通道的电路侧,以将电路侧的任何电压浪涌限制在一个安全的水平。 与连接到地之间的连接串联连接的一对限压装置可以用于提供共模浪涌保护。

    Method and structure for second spacer formation for strained silicon MOS transistors
    174.
    发明授权
    Method and structure for second spacer formation for strained silicon MOS transistors 有权
    用于应变硅MOS晶体管的第二间隔物形成的方法和结构

    公开(公告)号:US07591659B2

    公开(公告)日:2009-09-22

    申请号:US11243707

    申请日:2005-10-04

    IPC分类号: H01L21/8238

    摘要: A method for forming a CMOS semiconductor wafer. The method includes providing a semiconductor substrate (e.g., silicon wafer) and forming a dielectric layer (e.g., silicon dioxide, silicon oxynitride) overlying the semiconductor substrate. The method includes forming a gate layer overlying the dielectric layer and patterning the gate layer to form a gate structure including edges. The method includes forming a dielectric layer overlying the gate structure to protect the gate structure including the edges. Preferably, the dielectric layer has a thickness of less than 40 nanometers. The method includes etching a source region and a drain region adjacent to the gate structure using the dielectric layer as a protective layer and depositing silicon germanium material into the source region and the drain region to fill the etched source region and the etched drain region. The method causes a channel region between the source region and the drain region to be strained in compressive mode from at least the silicon germanium material formed in the source region and the drain region. The method includes forming a second protective layer overlying surfaces and performing an anisotropic etching process to form spacer structures to seal the gate structure.

    摘要翻译: 一种用于形成CMOS半导体晶片的方法。 该方法包括提供半导体衬底(例如硅晶片)并形成覆盖半导体衬底的电介质层(例如,二氧化硅,氮氧化硅)。 该方法包括形成覆盖在介电层上的栅极层,并构图栅极层以形成包括边缘的栅极结构。 该方法包括形成覆盖栅极结构的电介质层,以保护包括边缘的栅极结构。 优选地,电介质层的厚度小于40纳米。 该方法包括使用电介质层作为保护层蚀刻与栅极结构相邻的源极区域和漏极区域,并将硅锗材料沉积到源极区域和漏极区域中以填充蚀刻的源极区域和蚀刻的漏极区域。 该方法使得源极区域和漏极区域之间的沟道区域至少在形成于源极区域和漏极区域中的硅锗材料以压缩模式应变。 该方法包括形成覆盖表面的第二保护层,并执行各向异性蚀刻工艺以形成间隔结构以密封栅极结构。

    BALLOON CATHETER DEVICES WITH SOLVENT-SWELLABLE POLYMER
    176.
    发明申请
    BALLOON CATHETER DEVICES WITH SOLVENT-SWELLABLE POLYMER 审中-公开
    具有溶剂 - 可裂解聚合物的气泡导管装置

    公开(公告)号:US20090226502A1

    公开(公告)日:2009-09-10

    申请号:US12399532

    申请日:2009-03-06

    申请人: John Chen

    发明人: John Chen

    IPC分类号: A61M25/10 B05D3/00

    摘要: Methods for making a balloon catheter device comprising a solvent-swellable polymer are provided. The method includes providing a balloon, wherein a wall of the balloon or a coating over the balloon comprises a polymer, wherein the polymer is swellable in an organic solvent. In certain embodiments of the invention, the polymer on the balloon is exposed to a mixture of said solvent and a therapeutic agent; and the solvent is thereafter removing, leaving the therapeutic agent in the polymer.

    摘要翻译: 提供了制造包含溶剂可溶胀聚合物的球囊导管装置的方法。 该方法包括提供气囊,其中球囊的壁或球囊上的涂层包含聚合物,其中聚合物在有机溶剂中可溶胀。 在本发明的某些实施方案中,将球囊上的聚合物暴露于所述溶剂和治疗剂的混合物中; 然后除去溶剂,将治疗剂留在聚合物中。

    Etching method and structure using a hard mask for strained silicon MOS transistors
    177.
    发明授权
    Etching method and structure using a hard mask for strained silicon MOS transistors 有权
    用于应变硅MOS晶体管的硬掩模的蚀刻方法和结构

    公开(公告)号:US07557000B2

    公开(公告)日:2009-07-07

    申请号:US11609748

    申请日:2006-12-12

    IPC分类号: H01L21/8238

    摘要: A method for forming an strained silicon integrated circuit device. The method includes providing a semiconductor substrate and forming a dielectric layer overlying the semiconductor substrate. The method also includes forming a gate layer overlying the dielectric layer and forming a hard mask overlying the gate layer. The method patterns the gate layer to form a gate structure including edges using the hard mask as a protective layer. The method forms a dielectric layer overlying the gate structure to protect the gate structure including the edges. The method forms spacers from the dielectric layer, while maintaining the hard mask overlying the gate structure. The method etches a source region and a drain region adjacent to the gate structure using the dielectric layer and the hard mask as a protective layer, while the hard mask prevents any portion of the gate structure from being exposed. In a preferred embodiment, the method maintains the hard mask overlying the gate structure. The method includes depositing silicon germanium material into the source region and the drain region to fill the etched source region and the etched drain region, while maintaining any portion of the gate layer from being exposed using the hard mask such that the gate structure is substantially free from any permanent deposition of silicon germanium material, which causes a channel region between the source region and the drain region to be strained in compressive mode from at least the silicon germanium material formed in the source region and the drain region. In a preferred embodiment, the method removing the hard mask from the gate structure to expose a top portion of the gate structure and maintains the top portion of the gate structure being substantially free from any silicon germanium material.

    摘要翻译: 一种形成应变硅集成电路器件的方法。 该方法包括提供半导体衬底并形成覆盖半导体衬底的电介质层。 该方法还包括形成覆盖在电介质层上的栅极层,并形成覆盖栅极层的硬掩模。 该方法使栅极层形成包括使用硬掩模的边缘作为保护层的栅极结构。 该方法形成覆盖栅极结构的电介质层,以保护包括边缘的栅极结构。 该方法从电介质层形成间隔物,同时保持覆盖栅极结构的硬掩模。 该方法使用电介质层和硬掩模作为保护层来蚀刻与栅极结构相邻的源极区域和漏极区域,同时硬掩模防止栅极结构的任何部分暴露。 在优选实施例中,该方法保持覆盖栅极结构的硬掩模。 该方法包括将硅锗材料沉积到源极区域和漏极区域中以填充蚀刻的源极区域和蚀刻的漏极区域,同时保持栅极层的任何部分不被使用硬掩模曝光,使得栅极结构基本上是空的 来自硅锗材料的任何永久性沉积,其使得源极区域和漏极区域之间的沟道区域至少在形成于源极区域和漏极区域中的硅锗材料以压缩模式应变。 在优选实施例中,该方法从栅极结构去除硬掩模以露出栅极结构的顶部并且保持栅极结构的顶部基本上不含任何硅锗材料。

    Method and structure using a pure silicon dioxide hardmask for gate pattering for strained silicon MOS transistors
    178.
    发明申请
    Method and structure using a pure silicon dioxide hardmask for gate pattering for strained silicon MOS transistors 有权
    使用纯二氧化硅硬掩模进行应变硅MOS晶体管栅极图案的方法和结构

    公开(公告)号:US20090065805A1

    公开(公告)日:2009-03-12

    申请号:US12145268

    申请日:2008-06-24

    IPC分类号: H01L29/78

    摘要: A structure using pure silicon dioxide hard marsk for gate pattern. In an embodiment, the present invention provides a partially completed semiconductor integrated circuit device. The device has a semiconductor substrate and a dielectric layer overlying the semiconductor substrate. The device has a gate structure including edges and a substantially pure silicon dioxide mask structure overlying the gate structure. A thickness ranging from about 400 to about 600 Angstroms of the substantially pure silicon dioxide mask structure is included. The device has a dielectric layer forming sidewall spacers on the edges of the gate structure to protect the gate structure including the edges and an exposed portion of the pure silicon dioxide mask structure overlying the gate structure. The device has an epitaxially grown fill material in an etched source region and an etched drain region.

    摘要翻译: 一种使用纯二氧化硅硬马尔斯克进行栅极图案的结构。 在一个实施例中,本发明提供了部分完成的半导体集成电路器件。 该器件具有覆盖半导体衬底的半导体衬底和电介质层。 该器件具有包括边缘的栅极结构和覆盖栅极结构的基本上纯的二氧化硅掩模结构。 包括约400至约600埃基本上纯的二氧化硅掩模结构的厚度。 器件具有在栅极结构的边缘上形成侧壁间隔物的电介质层,以保护包括边缘的栅极结构和覆盖栅极结构的纯二氧化硅掩模结构的暴露部分。 该器件在蚀刻源区和蚀刻漏极区中具有外延生长的填充材料。

    Rotary latch
    179.
    发明授权
    Rotary latch 有权
    旋转锁

    公开(公告)号:US07497488B2

    公开(公告)日:2009-03-03

    申请号:US11364016

    申请日:2006-02-28

    申请人: John Chen

    发明人: John Chen

    IPC分类号: E05C3/12

    摘要: A rotary latch having a pivoting handle mounted in the recess of a mounting plate includes a turn-key member that rotates within the handle's free end, and the turn-key member is mechanically linked to a catch rod where rotation of the turn-key member results in a corresponding rotation of the catch rod. As a result of the rotation of the turn-key member, the catch rod has two positions—a “lock” position that does not engage a swiveling trip lever, and an “unlocked” position that engages the swiveling trip lever. When the turn-key member rotates the catch rod into the unlocked position, an actuation/pivoting of the handle about the pivot pin rotates the free end of the handle away from the mounting plate recess to linearly displace the catch rod. The linear displacement of the catch rod causes it to come into contact with and pivot the arm of a swiveling trip lever. The trip lever arm, when rotated by the catch rod, rotates an adjacent kicker journaled on the mounting plate's rear surface. The kicker includes a kicker pin that is engaged by the swiveling trip lever, causing the release kicker to rotate and push a guard rotary. The guard rotary protects a capture rotary from opening, where the capture rotary retains a lock bar. However, when the release kicker pushes the guard rotary against the bias of a dedicated spring, the capture rotary can rotate freely and open outward to release the captured lock bar.

    摘要翻译: 具有安装在安装板的凹部中的枢转手柄的旋转闩锁包括在手柄的自由端内旋转的转动键构件,并且转动键构件机械地连接到卡扣杆,其中转动键构件的旋转 导致抓杆的相应旋转。 由于转向键构件的旋转,锁扣杆具有两个位置 - 不接合旋转跳闸杆的“锁定”位置和接合旋转跳闸杆的“解锁”位置。 当转向键构件将卡扣杆旋转到解锁位置时,手柄围绕枢轴销的致动/枢转将手柄的自由端远离安装板凹槽旋转,以使卡扣杆线性地移位。 捕捉杆的线性位移使其与旋转跳闸杆的臂接触并枢转。 脱扣杠杆臂当被卡扣杆旋转时,旋转安装板后表面上相邻的推杆。 踢球机包括由旋转跳闸杆接合的撞击销,使释放踢球器旋转并推动保护旋转。 防护旋转保护捕获旋转体不受打开,捕获旋转体保留锁定杆。 然而,当释放踢球者抵抗专用弹簧的偏压推动保护旋转时,捕获旋转体可以自由旋转并向外打开以释放所捕获的锁定杆。

    Method and apparatus for multi-phase wireless handshaking
    180.
    发明授权
    Method and apparatus for multi-phase wireless handshaking 失效
    多相无线握手方法和装置

    公开(公告)号:US07420984B2

    公开(公告)日:2008-09-02

    申请号:US10841690

    申请日:2004-05-06

    IPC分类号: H04J3/16

    摘要: Methods and apparatuses associated with multi-phase wireless handshaking. A user terminal enters handshaking with an access point. The access point may respond to an access request of the user terminal with an access assignment, and alternatively, with a message indicating an assignment will not be presently given. The handshaking process could then be completed at a later time.

    摘要翻译: 与多相无线握手相关的方法和设备。 用户终端用接入点进入握手。 接入点可以利用接入分配来响应用户终端的接入请求,或者替代地,当前不给出指示分配的消息。 握手过程随后可以完成。