公开(公告)号：US09980277B2

公开(公告)日：2018-05-22

申请号：US15084125

申请日：2016-03-29

Applicant: Silicon Laboratories, Inc.

Inventor： Terry Lee Dickey ,  Christopher L. McCrank ,  Jesse Ira Masters ,  Donald Miner Markuson ,  Micah Solomon Evans

IPC: H04W72/12 ,  H04L1/16 ,  H04W72/14 ,  H04W88/06

CPC classification number: H04W72/1215 ,  H04L1/1685 ,  H04W72/14 ,  H04W88/06 ,  Y02D70/00 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/162

Abstract: A system and method of minimizing interference and retries in an environment where two or more network protocols utilize the same frequency spectrum is disclosed. A lower-power network controller is co-located with a WIFI controller. The lower-power network controller parses incoming packets as they are received and generates a request signal once it is determined that the incoming packet is destined for this device. This maximizes the likelihood that no WIFI traffic will occur while the incoming packet is being received.

公开(公告)号：US09966900B2

公开(公告)日：2018-05-08

申请号：US15238525

申请日：2016-08-16

Applicant: Silicon Laboratories Inc.

Inventor： Marty Pflum ,  Arup Mukherji ,  John M. Khoury

IPC: H03K3/03 ,  H03B5/04 ,  H03L7/00 ,  H03B5/36 ,  H03B27/00 ,  G06F1/04 ,  H03B1/00 ,  H03M3/00 ,  G01R19/00

CPC classification number: H03B5/04 ,  G01R19/00 ,  G06F1/04 ,  H03B1/00 ,  H03B5/36 ,  H03B27/00 ,  H03L7/00 ,  H03L7/1976 ,  H03M3/30

Abstract: An apparatus includes a first oscillator to generate an output signal that has a first frequency. The apparatus further includes a second oscillator to generate an output signal that has a second frequency. The second frequency varies as a function of temperature. The apparatus further includes a controller that counts a number of cycles of the output signal of the second oscillator in order to determine whether to calibrate the first oscillator.

公开(公告)号：US09964986B2

公开(公告)日：2018-05-08

申请号：US14983413

申请日：2015-12-29

Applicant: Silicon Laboratories Inc.

Inventor： Timothy T. Rueger ,  Praveen Kallam ,  Nicholas M. Atkinson

IPC: G05F3/26

CPC classification number: G05F3/262

Abstract: An apparatus includes an integrated circuit (IC). The IC includes a regulator to receive a plurality of input voltages and to provide a regulated output voltage to a load. The regulator includes a plurality of voltage regulators that receive the plurality of input voltages and provide the regulated output voltage as an output of the regulator. The IC further includes a controller that controls the regulator by using a voltage regulator in the plurality of voltage regulators to generate the regulated output voltage from the plurality of input voltages.

公开(公告)号：US09960756B1

公开(公告)日：2018-05-01

申请号：US15367560

申请日：2016-12-02

Applicant: Silicon Laboratories Inc.

Inventor： Navin Harwalkar

IPC: H03K5/1252 ,  H05K1/02 ,  H03F3/195 ,  H01L23/66

CPC classification number: H03K5/1252 ,  H01L23/64 ,  H01L23/66 ,  H03F1/223 ,  H03F3/195 ,  H03F2200/114 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2200/451 ,  H03K19/00346 ,  H05K1/0216 ,  H05K1/023 ,  H05K1/0243 ,  H05K3/328 ,  H05K2203/049

Abstract: Bypass techniques are provided herein to protect noise sensitive circuits from both internal and external noise sources. According to one embodiment, an integrated circuit (IC) chip may include a noise sensitive circuit coupled between a power supply pad and a first ground pad of the IC chip. In order to protect the first ground pad of the noise sensitive circuit, two distinct bypass paths are provided to route noise current around the noise sensitive circuit. Each bypass path terminates in its own ground pad (e.g., a second ground pad and third ground pad), which is separate from the first ground pad of the noise sensitive circuit.

公开(公告)号：US09874887B2

公开(公告)日：2018-01-23

申请号：US13404981

申请日：2012-02-24

Applicant: Shouli Yan ,  Alan Westwick

Inventor： Shouli Yan ,  Alan Westwick

IPC: G05F1/00 ,  G05F1/565

CPC classification number: G05F1/565

Abstract: A voltage regulator circuit with variable feedback is disclosed. In one embodiment, a voltage regulator includes an amplifier having a first input configured to receive a reference voltage and a second input configured to receive a feedback signal. The voltage regulator further includes first and second transistors each having respective gate terminals coupled to an output of the amplifier. A resistor network coupled to the second input of the amplifier and further coupled to the first and second transistors. The resistor network is configured to produce the feedback signal based on currents through the first and second transistors, respectively.

公开(公告)号：US09870103B2

公开(公告)日：2018-01-16

申请号：US13342658

申请日：2012-01-03

Applicant: Vadim Konradi ,  Parker Dorris ,  Michael Franklin ,  David R. Welland

Inventor： Vadim Konradi ,  Parker Dorris ,  Michael Franklin ,  David R. Welland

IPC: G06F3/044 ,  G06F3/041

CPC classification number: G06F3/044 ,  G06F3/0416

Abstract: A controller for a capacitive touch screen or the like includes a touch resolve subsystem and a processor. The touch resolve subsystem, when activated, measures a plurality of capacitance values using a plurality of input pins. The processor uses the plurality of capacitance values at each of a plurality of values of a parameter to create an interference map.

公开(公告)号：US09846205B1

公开(公告)日：2017-12-19

申请号：US14798129

申请日：2015-07-13

Applicant: Silicon Laboratories Inc.

Inventor： Jeffrey L. Sonntag

IPC: G01R33/02 ,  G01R33/028 ,  G01R33/09 ,  G01K13/00

CPC classification number: G01R33/02 ,  G01R35/00

Abstract: An integrated circuit includes a magnetic sensor and a magnetic field generating coil. A control circuit on the integrated circuit responds to an activation indication received by the integrated circuit to cause activation of generation of a first magnetic field by the magnetic field generating coil. The control circuit responds to a subsequent activation indication to generate a second magnetic field different from the first magnetic field. The first magnetic field may have a polarity opposite to a polarity of the second magnetic field. A communication interface may be used to communicate one or more indications associated with an expected magnetic field strength, such as coil resistance, and a measured magnetic field strength measured by the magnetic sensor. The magnetic field generating coil may be coaxial with the magnetic sensor and the magnetic field generating coil may have an inner diameter greater than a diameter of the magnetic sensor.

公开(公告)号：US09806521B2

公开(公告)日：2017-10-31

申请号：US14527205

申请日：2014-10-29

Applicant: Silicon Laboratories Inc.

Inventor： Michael G. Khazhinsky ,  Ravi K. Kummaraguntla

IPC: H02H9/04 ,  H02H3/20 ,  H02H3/02

CPC classification number: H02H9/046 ,  H02H3/02 ,  H02H3/202 ,  H02H9/04

Abstract: A balun includes an input coil and an output coil with first and second outputs that vary during normal operation. The output coil has a center point connection that remains substantially constant during normal operation. An ESD circuit provides a low impedance path between the center point connection and chip ground when the voltage at the center point connection is above a first threshold voltage or below a second threshold voltage and isolates the center point connection from chip ground otherwise. Another ESD protection circuit provides ESD protection for other input or output terminals of the integrated circuit by selectively coupling the other input or output terminals to chip ground. Thus, a charge that builds up between one of the balun outputs and another terminal on the integrated circuit can be safely dissipated.

公开(公告)号：US09800281B2

公开(公告)日：2017-10-24

申请号：US15470989

申请日：2017-03-28

Applicant: Silicon Laboratories Inc.

Inventor： Abdulkerim L. Coban ,  Alessandro Piovaccari ,  Ramin K. Poorfard ,  James T. Kao

IPC: H04B1/06 ,  H04B1/16 ,  H03G3/30

CPC classification number: H04B1/16 ,  H03G3/3068

Abstract: A signal processor for a radio frequency (RF) receiver includes a signal processing path having first and second programmable gain amplifiers and first and second offset correction circuits. The first offset correction circuit receives a first digital offset correction word and corrects a first offset of the first programmable gain amplifier by adding a first value corresponding to the first digital offset correction word to an input of the first programmable gain amplifier. The second offset correction circuit receives a second digital offset correction word and corrects a second offset of the second programmable gain amplifier by adding a first value corresponding to the second digital offset correction word to an input of the second programmable gain amplifier. A controller measures offsets of the first and second programmable gain amplifiers during a calibration, and provides the first and second offset correction words in response to the offsets.

公开(公告)号：US09793240B2

公开(公告)日：2017-10-17

申请号：US14529492

申请日：2014-10-31

Applicant: SILICON LABORATORIES INC.

Inventor： Ka Y. Leung ,  Jean-Luc Nauleau

IPC: H01L25/065 ,  H01L23/495 ,  H01L23/52 ,  H01L23/58 ,  H01L23/00

CPC classification number: H01L25/0655 ,  H01L23/4952 ,  H01L23/49575 ,  H01L23/52 ,  H01L23/585 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/371 ,  H01L2224/37599 ,  H01L2224/40 ,  H01L2224/48106 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An apparatus includes a wafer portion and a plurality of die fabricated in the wafer portion in a defined pattern such that the die are separated from each other by a dicing area or a street. The apparatus includes a conductive connection between given adjacent die. The conductive connection is electrically coupled to circuitry disposed on the given adjacent die.