公开(公告)号：US20170134071A1

公开(公告)日：2017-05-11

申请号：US15410818

申请日：2017-01-20

Applicant: TEXAS INSTRUMENTS INCORPORATED ,  TEXAS INSTRUMENTS DEUTSCHLAND GMBH

Inventor： Swaminathan Sankaran ,  Bradley Allen Kramer ,  Benjamin Stassen Cook ,  Juan Alejandro Herbsommer ,  Lutz Naumann ,  Mark W. Morgan ,  Baher Haroun

IPC: H04B5/00 ,  H04W4/00

CPC classification number: H04B5/0031 ,  H04B5/0075 ,  H04W4/80

Abstract: A system is provided in which a set of modules each have a substrate on which is mounted a radio frequency (RF) transmitter and/or an RF receiver coupled to a near field communication (NFC) coupler located on the substrate. Each module has a housing that surrounds and encloses the substrate. The housing has a port region on a surface of the housing. Each module has a field confiner located between the NFC coupler and the port region on the housing configured to guide electromagnetic energy emanated from the NFC coupler through the port region to a port region of an adjacent module.

公开(公告)号：US20170077994A1

公开(公告)日：2017-03-16

申请号：US14970315

申请日：2015-12-15

Applicant: Texas Instruments Deutschland GMBH ,  Texas Instruments Incorporated

Inventor： Swaminathan Sankaran ,  Bradley Allen Kramer ,  Benjamin Stassen Cook ,  Juan Alejandro Herbsommer ,  Lutz Naumann ,  Mark W. Morgan ,  Baher Haroun

IPC: H04B5/00 ,  H04W4/00

CPC classification number: H04B5/0031 ,  H04B5/0075 ,  H04W4/80

Abstract: A system is provided in which a set of modules each have a substrate on which is mounted a radio frequency (RF) transmitter and/or an RF receiver coupled to a near field communication (NFC) coupler located on the substrate. Each module has a housing that surrounds and encloses the substrate. The housing has a port region on a surface of the housing. Each module has a field confiner located between the NFC coupler and the port region on the housing configured to guide electromagnetic energy emanated from the NFC coupler through the port region to a port region of an adjacent module.

Abstract translation: 提供了一种系统，其中一组模块各自具有衬底，其上安装有射频（RF）发射器和/或耦合到位于衬底上的近场通信（NFC）耦合器）的RF接收器。 每个模块具有围绕并包围衬底的壳体。 壳体在壳体的表面上具有端口区域。 每个模块具有位于NFC耦合器和壳体上的端口区域之间的场约束器，其被配置成将通过端口区域从NFC耦合器发出的电磁能引导到相邻模块的端口区域。

公开(公告)号：US20250076190A1

公开(公告)日：2025-03-06

申请号：US18950734

申请日：2024-11-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jeronimo Segovia Fernandez ,  Bichoy Bahr ,  Hassan Omar Ali ,  Benjamin Stassen Cook

IPC: G01N21/3504 ,  B81B3/00 ,  G01J5/08 ,  G01N21/27 ,  G01N21/61

Abstract: In some examples, an apparatus comprises a chopper, a first microelectromechanical system (MEMS) device, a second MEMS device, and a processing circuit. The chopper configured is to repeatedly switch states to enable and disable provision of a light signal. The first MEMS device is configured to provide first and second irradiance signals when the chopper is in, respectively, first and second states The second MEMS device is configured to provide first and second reference signals when the chopper is in, respectively, the first and second states. The processing circuit is configured to generate a first signal based on the first irradiance signal and the first reference signal, generate a second signal based on the second irradiance signal and the second reference signal, and provide a third signal at the processing output representing an irradiance measurement of the light source based on a difference between the first and second signals.

公开(公告)号：US20250066526A1

公开(公告)日：2025-02-27

申请号：US18942875

申请日：2024-11-11

Applicant: Texas Instruments Incorporated

Inventor： Nazila Dadvand ,  Benjamin Stassen Cook ,  Archana Venugopal ,  Luigi Colombo

IPC: C08F292/00 ,  C08F8/42 ,  C08J5/00 ,  C08K3/04 ,  C08K3/08 ,  C08K7/00 ,  C08L25/06 ,  C08L33/12 ,  G03F1/78

Abstract: A method of forming a composite material includes photo-initiating a polymerization of a monomer in a pattern of interconnected units to form a polymer microlattice. Unpolymerized monomer is removed from the polymer microlattice. The polymer microlattice is coated with a metal. The metal-coated polymer microlattice is dispersed in a polymer matrix.

公开(公告)号：US12172374B2

公开(公告)日：2024-12-24

申请号：US18527663

申请日：2023-12-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Daniel Lee Revier ,  Sean Ping Chang ,  Benjamin Stassen Cook

IPC: B29C64/165 ,  B22F10/00 ,  B22F10/14 ,  B22F12/37 ,  B22F12/53 ,  B22F12/55 ,  B22F12/57 ,  B28B1/00 ,  B33Y10/00 ,  B33Y30/00 ,  B33Y70/00 ,  B33Y80/00 ,  H01L21/02 ,  H01L21/288 ,  H01L21/67 ,  B22F12/00 ,  B22F12/41 ,  B22F12/49 ,  B29C64/241 ,  B29L31/34 ,  C04B35/14

Abstract: A layer of additive material is formed in a circular printing area on a substrate using additive sources distributed across a printing zone. The additive sources form predetermined discrete amounts of the additive material. The substrate and the additive sources are rotated with respect to each other around a center of rotation, so that a pattern of the additive material is formed in a circular printing area on the substrate. Each additive source receives actuation waveforms at an actuation frequency that is proportional to a distance of the additive source from the center of rotation. The actuation waveforms include formation signals, with a maximum of one formation signal in each cycle of the actuation frequency. The formation signals result in the additive sources forming the predetermined discrete amounts of the additive material on the substrate.

公开(公告)号：US11791296B2

公开(公告)日：2023-10-17

申请号：US17544888

申请日：2021-12-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Scott Robert Summerfelt ,  Benjamin Stassen Cook ,  Ralf Jakobskrueger Muenster ,  Sreenivasan Kalyani Koduri

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/13005 ,  H01L2224/13023 ,  H01L2224/13026 ,  H01L2224/13078 ,  H01L2224/279 ,  H01L2224/29078 ,  H01L2224/3207 ,  H01L2224/83895 ,  H01L2224/83896

Abstract: In some examples, an electronic device comprises a first component having a surface, a second component having a surface, and a bond layer positioned between the surfaces of the first and second components to couple the first and second components to each other. The bond layer includes a set of metallic nanowires and a dielectric portion. The dielectric portion comprises a polymer matrix and dielectric nanoparticles.

公开(公告)号：US20230307312A1

公开(公告)日：2023-09-28

申请号：US18143446

申请日：2023-05-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Archana Venugopal ,  Luigi Colombo ,  Robert Reid Doering

IPC: H01L23/367 ,  H01L23/373 ,  H01L21/48

CPC classification number: H01L23/3677 ,  H01L23/3733 ,  H01L21/4882 ,  H01L23/3731 ,  H01L23/3736

Abstract: An integrated circuit has a substrate and an interconnect region disposed on the substrate. The interconnect region includes a plurality of interconnect levels. Each interconnect level includes interconnects in dielectric material. The integrated circuit includes a thermal via in the interconnect region. The thermal via extends vertically in at least one of the interconnect levels in the interconnect region. The thermal via includes a cohered nanoparticle film in which adjacent nanoparticles are cohered to each other. The thermal via has a thermal conductivity higher than dielectric material touching the thermal via. The cohered nanoparticle film is formed by a method which includes an additive process.

公开(公告)号：US11676880B2

公开(公告)日：2023-06-13

申请号：US15361399

申请日：2016-11-26

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Archana Venugopal ,  Luigi Colombo ,  Robert Reid Doering

IPC: H01L23/48 ,  H01L23/52 ,  H01L23/367 ,  H01L23/373 ,  H01L21/48

CPC classification number: H01L23/3677 ,  H01L21/4882 ,  H01L23/3731 ,  H01L23/3733 ,  H01L23/3736

Abstract: An integrated circuit has a substrate and an interconnect region disposed on the substrate. The interconnect region includes a plurality of interconnect levels. Each interconnect level includes interconnects in dielectric material. The integrated circuit includes a thermal via in the interconnect region. The thermal via extends vertically in at least one of the interconnect levels in the interconnect region. The thermal via includes a cohered nanoparticle film in which adjacent nanoparticles are cohered to each other. The thermal via has a thermal conductivity higher than dielectric material touching the thermal via. The cohered nanoparticle film is formed by a method which includes an additive process.

公开(公告)号：US20220336217A1

公开(公告)日：2022-10-20

申请号：US17847250

申请日：2022-06-23

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Daniel Lee Revier

IPC: H01L21/02 ,  H01L21/66 ,  H01L21/8238 ,  H01L21/3205 ,  B33Y30/00 ,  H01L27/092 ,  H01L21/8234 ,  H01L21/762

Abstract: A microelectronic device is formed by forming at least a portion of a substrate of the microelectronic device by one or more additive processes. The additive processes may be used to form semiconductor material of the substrate. The additive processes may also be used to form dielectric material structures or electrically conductive structures, such as metal structures, of the substrate. The additive processes are used to form structures of the substrate which would be costly or impractical to form using planar processes. In one aspect, the substrate may include multiple doped semiconductor elements, such as wells or buried layers, having different average doping densities, or depths below a component surface of the substrate. In another aspect, the substrate may include dielectric isolation structures with semiconductor material extending at least partway over and under the dielectric isolation structures. Other structures of the substrate are disclosed.

公开(公告)号：US11387919B2

公开(公告)日：2022-07-12

申请号：US16590354

申请日：2019-10-01

Applicant: Texas Instruments Incorporated

Inventor： Bichoy Bahr ,  Benjamin Stassen Cook ,  Scott Robert Summerfelt

IPC: H04B11/00 ,  H01L29/51 ,  G01N29/24

Abstract: In described examples of a CMOS IC, an ultrasonic transducer having terminals is formed on a substrate of the IC. CMOS circuitry having ultrasonic signal terminals is formed on the substrate. At least one metal interconnect layer overlies the ultrasonic transducer and the CMOS circuitry. The at least one metal interconnect layer connects the CMOS circuitry ultrasonic signal terminals to the terminals of the ultrasonic transducer.