-
公开(公告)号：US09748963B2
公开(公告)日：2017-08-29
申请号：US15188272
申请日：2016-06-21
Applicant: Silicon Laboratories Inc.
Inventor： Abdulkerim L. Coban , Mustafa H. Koroglu
CPC classification number: H03M1/002 , H03M1/0626 , H03M1/1009 , H03M1/124 , H03M1/60
Abstract: In one embodiment, an apparatus includes: a first voltage controlled oscillator (VCO) analog-to-digital converter (ADC) unit to receive a first portion of a differential analog signal and convert the first portion of the differential analog signal into a first digital value; a second VCO ADC unit to receive a second portion of the differential analog signal and convert the second portion of the differential analog signal into a second digital value; a combiner to form a combined digital signal from the first and second digital values; a decimation circuit to receive the combined digital signal and filter the combined digital signal into a filtered combined digital signal; and a cancellation circuit to receive the filtered combined digital signal and generate a distortion cancelled digital signal, based at least in part on a coefficient value.
-
公开(公告)号：US09746505B2
公开(公告)日：2017-08-29
申请号：US14557266
申请日：2014-12-01
Applicant: Silicon Laboratories Inc.
Inventor： David Huitse Shen
CPC classification number: G01R21/10 , H03F2200/451
Abstract: In an embodiment, an apparatus may include first input and a second input to receive a differential input signal and may include a diode including an anode coupled to the first input and including a cathode coupled to the second input. The apparatus may further include a feedback circuit having an input coupled to the cathode and an output coupled to the anode. The feedback circuit may be configured to apply a feedback signal to the diode to maintain a substantially constant direct current across the diode. The apparatus may also include a comparator coupled to the feedback circuit and configured to compare the feedback signal to a threshold to detect radio frequency energy in the input signal in response to changes in the feedback signal.
-
公开(公告)号：US09742611B2
公开(公告)日：2017-08-22
申请号：US14061084
申请日：2013-10-23
Applicant: SILICON LABORATORIES INC.
Inventor： Javier Elenes
IPC: H04L27/26
CPC classification number: H04L27/2657 , H04L27/2662 , H04L27/2671 , H04L27/2678
Abstract: In an embodiment, an apparatus includes a buffer to store incoming orthogonal frequency division multiplexed (OFDM) samples. This buffer is configured to output the OFDM samples according to a read pointer that can be adjusted by a sum value corresponding to a sum of a length of a symbol and a feedback value, to align the read pointer with the symbol. In addition, the apparatus further includes a feedback circuit coupled to the buffer to receive the output OFDM samples and generate the feedback value based at least in part on the output OFDM samples.
-
公开(公告)号：US09742423B1
公开(公告)日：2017-08-22
申请号：US15338709
申请日：2016-10-31
Applicant: Silicon Laboratories Inc.
Inventor： Obaida Mohammed Khaled Abu Hilal
IPC: H03M1/12
CPC classification number: H03M1/1245 , H03M1/12 , H03M1/462 , H03M1/468
Abstract: In an example embodiment, an apparatus includes: a first sampling capacitor to switchably couple between an input analog voltage, a reference voltage (VREF) and a ground voltage; a second sampling capacitor to switchably couple between the reference voltage and the ground voltage; and a comparator having a first input terminal to couple to the first sampling capacitor and a second input terminal to couple to the second sampling capacitor. The comparator may be configured to compare a voltage level at the second input terminal to a sum voltage based at least in part on the input analog voltage to generate at least one bit of a digital output.
-
公开(公告)号：US09736709B2
公开(公告)日：2017-08-15
申请号：US14500382
申请日：2014-09-29
Applicant: Silicon Laboratories Inc.
Inventor： Hendricus de Ruijter , Wentao Li
IPC: H04L12/26 , G01R31/08 , G06F11/00 , G08C15/00 , H04J1/16 , H04J3/14 , H04W24/08 , H04L27/10 , H04L27/12 , H04L27/148
CPC classification number: H04W24/08 , H04L27/106 , H04L27/12 , H04L27/148
Abstract: A receiver includes an analog receiver and a digital processor. The analog receiver has an input for receiving a radio frequency (RF) signal, and an output for providing a digital intermediate frequency signal. The digital processor has an input for receiving the digital intermediate frequency signal, and an output for providing digital symbols. The digital processor measures peak-to-peak frequency deviation of the digital intermediate frequency signal, and performs a digital signal processing function on the digital intermediate frequency signal to provide the digital symbols based on the peak-to-peak frequency deviation so measured.
-
Patent Agency Ranking
公开(公告)号：US09705668B2
公开(公告)日：2017-07-11
申请号：US14725053
申请日：2015-05-29
Applicant: Silicon Laboratories Inc.
Inventor： Yunteng Huang
IPC: H03D3/24 , H04L7/033 , H04L27/227
CPC classification number: H04L7/0332 , H03L7/0807 , H03L7/148 , H04J3/0614 , H04L27/2272
Abstract: A gap detector detects when a phase difference between a feedback signal and a clock signal is larger than a gap threshold. If the phase difference is larger than the gap threshold, then the phase difference is modified by subtracting a gap value from the phase difference. If the phase difference is less than the threshold, the phase difference is not modified. A loop filter receives and filters the modified or unmodified phase difference and controls an oscillator. An accumulator circuit accumulates the modified phase difference and supplies a phase adjust signal. A low pass filter receives the phase adjust signal and supplies a filtered phase adjust signal that is used to slowly adjust the output of the oscillator.
-
公开(公告)号：US09705521B1
公开(公告)日：2017-07-11
申请号：US15221109
申请日：2016-07-27
Applicant: Silicon Laboratories Inc.
Inventor： Timothy A. Monk , Rajesh Thirugnanam
CPC classification number: H03M1/66 , H03M1/0665
Abstract: A noise-shaping signed digital-to-analog converter is described. A method includes selectively enabling a first sequence of unit elements of a plurality of unit elements of a digital-to-analog converter to convert a signed digital code to a plurality of analog signals in response to a plurality of control signals. Individual control signals of the plurality of control signals and individual analog signals of the plurality of analog signals correspond to respective unit elements of the plurality of unit elements. The method includes generating the plurality of control signals based on a pointer, a magnitude of the signed digital code, and a sign of the signed digital code. The method may include combining the plurality of analog signals with an output of a phase/frequency detector and charge pump in a phase-locked loop. The signed digital code may be an error signal based on a predetermined divide ratio of the phase-locked loop.
-
公开(公告)号：US09705514B2
公开(公告)日：2017-07-11
申请号：US14554798
申请日：2014-11-26
Applicant: Silicon Laboratories Inc.
Inventor： Michael H. Perrott
CPC classification number: H03L7/0991 , H03L7/0802 , H03L7/093 , H03L7/0994
Abstract: A hybrid analog/digital control approach for a digitally controlled oscillator augments a digital control path with an analog control path that acts to center the digital control path control signal within its range. The digital control path controls a first group of varactors within an oscillator tank circuit using a digital filter and a delta sigma modulator, which generates a dithered control signal for at least one of the first group of varactors. The analog control path controls a second group of varactors in the tank circuit but actively tunes only one varactor at a time. The analog control path performs relatively low bandwidth centering of the digital control signal resulting in negligible impact on PLL bandwidth, stability, and noise performance. Instead, the digital control path dominates in setting the PLL dynamic and noise behavior, and has reduced range requirements due to the centering action.
-
公开(公告)号：US09698654B2
公开(公告)日：2017-07-04
申请号：US14036176
申请日：2013-09-25
Applicant: Silicon Laboratories Inc.
Inventor： Paulo Santos , Tufan Karalar , Michael J. Mills , Ross Sabolcik , Rudye McGlothlin , Michael L. Duffy , András Vince Horvath
CPC classification number: H02K11/20 , H02H7/0822 , H02H9/001 , H02P27/06 , H02P29/0241
Abstract: An apparatus for controlling a high-power drive device external to a package of a motor drive circuit includes a motor drive circuit. The motor drive circuit includes a driver to control the high-power drive device based on a first reference voltage, a second reference voltage, and a control signal based on a received control signal. A fault circuit generates a failure indicator based on a voltage across terminals of the high-power drive device. A fault condition is based on the failure indicator. A first terminal coupled to the driver charges a node of the high-power drive device over a first length of time in response to an absence of the fault condition and a first level of the control signal. A second terminal coupled to the driver discharges the node over a second length of time different from the first length of time.
-
公开(公告)号：US09680420B2
公开(公告)日：2017-06-13
申请号：US14869924
申请日：2015-09-29
Applicant: Silicon Laboratories Inc.
Inventor： Gang Yuan , Matthew Powell
CPC classification number: H03F1/26 , H03F1/083 , H03F1/086 , H03F3/3022 , H03F3/45179 , H03F3/45242 , H03F2200/408 , H03F2203/45116
Abstract: An apparatus includes a multi-stage amplifier. The multi-stage amplifier includes first, second, and third amplifier circuits coupled in a cascade configuration. The multi-stage amplifier further includes first, second, and third compensation networks. The first compensation network is coupled between the output of the third amplifier circuit and the input of the second amplifier circuit. The second compensation network is coupled between the output of the third amplifier circuit and the input of the third amplifier circuit. The third compensation network is coupled between the output of the second amplifier circuit and the input of the second amplifier circuit.
-
-
-
-
-
-
-
-
-
Search Results
2312
records
(took 0.035 seconds)
