公开(公告)号：US20070196576A1

公开(公告)日：2007-08-23

申请号：US11677353

申请日：2007-02-21

Applicant: Byoung-June KIM ,  Sung-Hoon Yang ,  Jae-Ho Choi

Inventor： Byoung-June KIM ,  Sung-Hoon Yang ,  Jae-Ho Choi

IPC: C23C16/00

CPC classification number: C23C16/24 ,  C23C16/56 ,  G02F1/133305 ,  G02F1/133345 ,  H01L27/1214 ,  H01L27/1262 ,  H01L27/127 ,  H01L29/78603

Abstract: A manufacturing method for a flat panel display device includes forming a barrier layer on a flexible plastic substrate by RF sputtering, forming an amorphous silicon layer on the plastic substrate, and subjecting the amorphous silicon layer to a rapid heat treatment so as to thereby improve electrical characteristics and/or homogeneity of the amorphous silicon layer.

Abstract translation: 平板显示装置的制造方法包括通过RF溅射在柔性塑料基板上形成阻挡层，在塑料基板上形成非晶硅层，对非晶硅层进行快速热处理，从而改善电气 非晶硅层的特性和/或均匀性。

公开(公告)号：US08409916B2

公开(公告)日：2013-04-02

申请号：US13233399

申请日：2011-09-15

Applicant: Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

Inventor： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC: H01L21/00 ,  H01L21/16

CPC classification number: H01L29/7869 ,  H01L27/1225

Abstract: A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.

Abstract translation: 薄膜晶体管基板包括绝缘板; 设置在绝缘板上的栅电极; 包含金属氧化物的半导体层，其中所述金属氧化物具有小于或等于3％的氧缺陷，并且其中所述金属氧化物包含约0.01mol / cm 3至约0.3mol / cm 3的3d过渡金属; 设置在所述栅极电极和所述半导体层之间的栅极绝缘层; 以及设置在半导体层上的源电极和漏电极。 还描述了显示基板。 金属氧化物具有小于或等于3％的氧缺陷，并且掺杂有约0.01摩尔/ cm3至约0.3摩尔/ cm3的3d过渡金属。 金属氧化物包括氧化铟或二氧化钛。 3d过渡金属包括选自铬，钴，镍，铁，锰及其混合物中的至少一种3d过渡金属。

公开(公告)号：US08329500B2

公开(公告)日：2012-12-11

申请号：US12642527

申请日：2009-12-18

Applicant: Byoung-Kyu Lee ,  Se-Jin Chung ,  Byoung-June Kim ,  Czang-Ho Lee ,  Myung-Hun Shin ,  Min-Seok Oh ,  Ku-Hyun Kang ,  Yuk-Hyun Nam ,  Seung-Jae Jung ,  Min Park ,  Mi-Hwa Lim ,  Joon-Young Seo

Inventor： Byoung-Kyu Lee ,  Se-Jin Chung ,  Byoung-June Kim ,  Czang-Ho Lee ,  Myung-Hun Shin ,  Min-Seok Oh ,  Ku-Hyun Kang ,  Yuk-Hyun Nam ,  Seung-Jae Jung ,  Min Park ,  Mi-Hwa Lim ,  Joon-Young Seo

IPC: H01L21/00

CPC classification number: H01L21/324 ,  H01L21/02667 ,  H01L31/03921 ,  H01L31/046 ,  H01L31/075 ,  H01L31/1872 ,  Y02E10/548 ,  Y02P70/521

Abstract: Provided is a method of manufacturing a photovoltaic device using a Joule heating-induced crystallization method. The method includes: forming a first conductive pattern on a substrate; forming a photoelectric conversion layer on the substrate having the first conductive pattern; and crystallizing at least part of the photoelectric conversion layer by applying an electric field to the photoelectric conversion layer, wherein the photoelectric conversion layer includes a first amorphous semiconductor layer containing first impurities, a second intrinsic, amorphous semiconductor layer, and a third amorphous semiconductor layer containing second impurities.

Abstract translation: 提供了使用焦耳加热诱导结晶法制造光伏器件的方法。 该方法包括：在衬底上形成第一导电图案; 在具有第一导电图案的基板上形成光电转换层; 以及通过向所述光电转换层施加电场而使所述光电转换层的至少一部分结晶，其中所述光电转换层包括含有第一杂质的第一非晶半导体层，第二本征非晶半导体层和第三非晶半导体层 含有第二杂质。

公开(公告)号：US20090233399A1

公开(公告)日：2009-09-17

申请号：US12400674

申请日：2009-03-09

Applicant: Seung-Jae Jung ,  Byoung-June Kim ,  Jin-Seock Kim ,  Czang-Ho Lee ,  Myung-Hun Shin ,  Joon-Young Seo ,  Dong-Uk Choi ,  Byoung-Kyu Lee

Inventor： Seung-Jae Jung ,  Byoung-June Kim ,  Jin-Seock Kim ,  Czang-Ho Lee ,  Myung-Hun Shin ,  Joon-Young Seo ,  Dong-Uk Choi ,  Byoung-Kyu Lee

IPC: H01L31/18

CPC classification number: H01L31/02366 ,  H01L31/022483 ,  H01L31/046 ,  H01L31/1888 ,  Y02E10/50 ,  Y10S438/964

Abstract: In a method of manufacturing a photoelectric device, a transparent conductive layer is formed on a substrate, and the transparent conductive layer is partially etched using an etching solution including hydrofluoric acid. Thus, a transparent electrode having a concavo-convex pattern on its surface is formed. When the transparent conductive layer is partially etched, a haze of the transparent electrode may be controlled by adjusting an etching time of the transparent conductive layer. Also, since the etching solution is sprayed to the transparent conductive layer to etch the transparent conductive layer, the concavo-convex pattern on the surface of the transparent electrode may be easily formed even though the size of the substrate increases.

Abstract translation: 在制造光电器件的方法中，在衬底上形成透明导电层，并且使用包括氢氟酸的蚀刻溶液部分蚀刻透明导电层。 因此，形成在其表面具有凹凸图案的透明电极。 当透明导电层被部分蚀刻时，可以通过调节透明导电层的蚀刻时间来控制透明电极的雾度。 此外，由于将蚀刻溶液喷射到透明导电层以蚀刻透明导电层，所以即使基板的尺寸增加，也可以容易地形成透明电极表面上的凹凸图案。

公开(公告)号：US20080258143A1

公开(公告)日：2008-10-23

申请号：US12100436

申请日：2008-04-10

Applicant: Sung-Ryul KIM ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Jae-Ho CHOI ,  Hwa-Yeul OH ,  Yong-Mo CHOI

Inventor： Sung-Ryul KIM ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Jae-Ho CHOI ,  Hwa-Yeul OH ,  Yong-Mo CHOI

IPC: H01L29/786 ,  H01L21/36

CPC classification number: H01L29/78618 ,  H01L29/458 ,  H01L29/66765 ,  H01L29/7869

Abstract: A method of manufacturing a thin film transistor (“TFT”) substrate includes forming a first conductive pattern group including a gate electrode on a substrate, forming a gate insulating layer on the first conductive pattern group, forming a semiconductor layer and an ohmic contact layer on the gate insulating layer by patterning an amorphous silicon layer and an oxide semiconductor layer, forming a second conductive pattern group including a source electrode and a drain electrode on the ohmic contact layer by patterning a data metal layer, forming a protection layer including a contact hole on the second conductive pattern group, and forming a pixel electrode on the contact hole of the protection layer. The TFT substrate including the ohmic contact layer formed of an oxide semiconductor is further provided.

Abstract translation: 制造薄膜晶体管（“TFT”）基板的方法包括在基板上形成包括栅电极的第一导电图案组，在第一导电图案组上形成栅极绝缘层，形成半导体层和欧姆接触层 通过图案化非晶硅层和氧化物半导体层，在栅极绝缘层上，通过图案化数据金属层，在欧姆接触层上形成包括源电极和漏电极的第二导电图案组，形成包括接触的保护层 并且在保护层的接触孔上形成像素电极。 还提供了包括由氧化物半导体形成的欧姆接触层的TFT基板。

公开(公告)号：US20060118793A1

公开(公告)日：2006-06-08

申请号：US11262163

申请日：2005-10-27

Applicant: Sung-Hoon Yang ,  Kunal Girotra ,  Byoung-June Kim

Inventor： Sung-Hoon Yang ,  Kunal Girotra ,  Byoung-June Kim

IPC: H01L33/00 ,  H01L31/113

CPC classification number: H01L29/458 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/4908

Abstract: A TFT array panel including a substrate, a gate line having a gate electrode, a gate insulating layer formed on the gate line, a data line having a source electrode and a drain electrode spaced apart from the source electrode, a passivation layer formed on the data line and the drain electrode, and a pixel electrode connected to the drain electrode is provided. The TFT array panel further includes a protection layer including Si under at least one of the gate insulating layer and the passivation layer to enhance reliability.

Abstract translation: 一种TFT阵列面板，包括基板，具有栅极电极的栅极线，栅极线上形成的栅极绝缘层，具有与源极间隔开的源极和漏电极的数据线，形成在栅电极上的钝化层 数据线和漏电极，以及连接到漏电极的像素电极。 TFT阵列板还包括在栅极绝缘层和钝化层中的至少一个之下包括Si的保护层，以增强可靠性。

公开(公告)号：US08802972B2

公开(公告)日：2014-08-12

申请号：US12476645

申请日：2009-06-02

Applicant: Min-Seok Oh ,  Jung-Tae Kim ,  Nam-Kyu Song ,  Min Park ,  Yun-Seok Lee ,  Czang-Ho Lee ,  Myung-Hun Shin ,  Byoung-Kyu Lee ,  Yuk-Hyun Nam ,  Seung-Jae Jung ,  Mi-Hwa Lim ,  Joon-Young Seo ,  Dong-Uk Choi ,  Dong-Seop Kim ,  Byoung-June Kim

Inventor： Min-Seok Oh ,  Jung-Tae Kim ,  Nam-Kyu Song ,  Min Park ,  Yun-Seok Lee ,  Czang-Ho Lee ,  Myung-Hun Shin ,  Byoung-Kyu Lee ,  Yuk-Hyun Nam ,  Seung-Jae Jung ,  Mi-Hwa Lim ,  Joon-Young Seo ,  Dong-Uk Choi ,  Dong-Seop Kim ,  Byoung-June Kim

IPC: H01L31/0224 ,  H01L31/0376 ,  H01L31/0368 ,  H01L31/068 ,  H01L31/078

CPC classification number: H01L31/022441 ,  H01L31/022425 ,  H01L31/022466 ,  H01L31/02363 ,  H01L31/03682 ,  H01L31/03762 ,  H01L31/068 ,  H01L31/0682 ,  H01L31/072 ,  H01L31/078 ,  H01L31/182 ,  Y02E10/52 ,  Y02E10/547 ,  Y02E10/548

Abstract: Disclosed herein is a photoelectric conversion device having a semiconductor substrate including a front side and back side, a protective layer formed on the front side of the semiconductor substrate, a first non-single crystalline semiconductor layer formed on the back side of the semiconductor substrate, a first conductive layer including a first impurity formed on a first portion of a back side of the first non-single crystalline semiconductor layer, and a second conductive layer including the first impurity and a second impurity formed on a second portion of the back side of the first non-single crystalline semiconductor layer.

Abstract translation: 这里公开了一种光电转换装置，其具有包括正面和背面的半导体衬底，形成在半导体衬底的正面上的保护层，形成在半导体衬底背面的第一非单晶半导体层， 第一导电层，包括形成在第一非单晶半导体层的背面的第一部分上的第一杂质，以及第二导电层，其包含第一杂质和第二杂质，所述第二杂质形成在第一非杂质半导体层的背面的第二部分上 第一非单晶半导体层。

公开(公告)号：US20120129295A1

公开(公告)日：2012-05-24

申请号：US13359606

申请日：2012-01-27

Applicant: Min-Seok OH ,  Jung-Tae Kim ,  Nam-Kyu Song ,  Min Park ,  Yun-Seok Lee ,  Czang-Ho Lee ,  Myung-Hun Shin ,  Byoung-Kyu Lee ,  Yuk-Hyun Nam ,  Seung-Jae Jung ,  Mi-Hwa Lim ,  Joon-Young Seo ,  Dong-Uk Choi ,  Dong-Seop Kim ,  Byoung-June Kim

Inventor： Min-Seok OH ,  Jung-Tae Kim ,  Nam-Kyu Song ,  Min Park ,  Yun-Seok Lee ,  Czang-Ho Lee ,  Myung-Hun Shin ,  Byoung-Kyu Lee ,  Yuk-Hyun Nam ,  Seung-Jae Jung ,  Mi-Hwa Lim ,  Joon-Young Seo ,  Dong-Uk Choi ,  Dong-Seop Kim ,  Byoung-June Kim

IPC: H01L31/18

CPC classification number: H01L31/022441 ,  H01L31/022425 ,  H01L31/022466 ,  H01L31/02363 ,  H01L31/03682 ,  H01L31/03762 ,  H01L31/068 ,  H01L31/0682 ,  H01L31/072 ,  H01L31/078 ,  H01L31/182 ,  Y02E10/52 ,  Y02E10/547 ,  Y02E10/548

Abstract: Disclosed herein is a photoelectric conversion device having a semiconductor substrate including a front side and back side, a protective layer formed on the front side of the semiconductor substrate, a first non-single crystalline semiconductor layer formed on the back side of the semiconductor substrate, a first conductive layer including a first impurity formed on a first portion of a back side of the first non-single crystalline semiconductor layer, and a second conductive layer including the first impurity and a second impurity formed on a second portion of the back side of the first non-single crystalline semiconductor layer.

Abstract translation: 这里公开了一种光电转换装置，其具有包括正面和背面的半导体衬底，形成在半导体衬底的正面上的保护层，形成在半导体衬底背面的第一非单晶半导体层， 第一导电层，包括形成在第一非单晶半导体层的背面的第一部分上的第一杂质，以及第二导电层，其包含第一杂质和第二杂质，所述第二杂质形成在第一非杂质半导体层的背面的第二部分上 第一非单晶半导体层。

公开(公告)号：US20120003769A1

公开(公告)日：2012-01-05

申请号：US13233399

申请日：2011-09-15

Applicant: Kap-Soo YOON ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Sung-Ryul KIM ,  Hwa-Yeul OH ,  Jae-Ho CHOI ,  Yong-Mo CHOI

Inventor： Kap-Soo YOON ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Sung-Ryul KIM ,  Hwa-Yeul OH ,  Jae-Ho CHOI ,  Yong-Mo CHOI

IPC: H01L33/08

CPC classification number: H01L29/7869 ,  H01L27/1225

Abstract: A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.

Abstract translation: 薄膜晶体管基板包括绝缘板; 设置在绝缘板上的栅电极; 包含金属氧化物的半导体层，其中所述金属氧化物具有小于或等于3％的氧缺陷，并且其中所述金属氧化物包含约0.01mol / cm 3至约0.3mol / cm 3的3d过渡金属; 设置在所述栅极电极和所述半导体层之间的栅极绝缘层; 以及设置在半导体层上的源电极和漏电极。 还描述了显示基板。 金属氧化物具有小于或等于3％的氧缺陷，并且掺杂有约0.01摩尔/ cm3至约0.3摩尔/ cm3的3d过渡金属。 金属氧化物包括氧化铟或二氧化钛。 3d过渡金属包括选自铬，钴，镍，铁，锰及其混合物中的至少一种3d过渡金属。

公开(公告)号：US08088653B2

公开(公告)日：2012-01-03

申请号：US12604318

申请日：2009-10-22

Applicant: Byoung-June Kim ,  Sung-Hoon Yang ,  Min-Seok Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

Inventor： Byoung-June Kim ,  Sung-Hoon Yang ,  Min-Seok Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC: H01L21/00

CPC classification number: H01L29/78669 ,  H01L27/12 ,  H01L27/124 ,  H01L29/458 ,  H01L29/66765

Abstract: A TFT includes a gate electrode, an active layer, a source electrode, a drain electrode, and a buffer layer. The gate electrode is formed on the substrate; the active layer is formed on the gate electrode. The source and drain electrodes, formed on the active layer, are separated by a predetermined distance. The buffer layer is formed between the active layer and the source and drain electrodes. The buffer layer has a substantially continuously varying content ratio corresponding to a buffer layer thickness. The buffer layer is formed to suppress oxidation of the active layer, and reduce contact resistance.

Abstract translation: TFT包括栅电极，有源层，源电极，漏电极和缓冲层。 栅电极形成在基板上; 在栅电极上形成有源层。 形成在有源层上的源电极和漏电极分开预定的距离。 缓冲层形成在有源层与源极和漏极之间。 缓冲层具有对应于缓冲层厚度的基本连续变化的含量比。 形成缓冲层以抑制有源层的氧化，并降低接触电阻。