公开(公告)号：US06573540B2

公开(公告)日：2003-06-03

申请号：US10026968

申请日：2001-12-27

申请人： Atsushi Kurokawa ,  Masao Yamane ,  Kazuhiro Mochizuki

发明人： Atsushi Kurokawa ,  Masao Yamane ,  Kazuhiro Mochizuki

IPC分类号： H01L31072

CPC分类号： H01L29/7304 ,  H01L21/8252 ,  H01L27/0605 ,  H01L28/20 ,  H01L29/73

摘要： A bipolar transistor device with a large current capacity is formed by connecting a plurality of transistor elements to each other in parallel, each transistor element having a collector layer, a base layer, and an emitter layer formed respectively in a semiconductor substrate. In the bipolar transistor device, the base layers of a plurality of the transistor elements are extended in parallel to each other and those base layers are separated from each other. In each separated base layer, a first base electrode is formed on a part of the base layer which is separated from an emitter junction with the emitter layer, and a second base electrode is formed on another portion of the base layer closer to the emitter junction than the first base electrode. To dispose the base electrodes of a plurality of the transistor elements in parallel to each other, a base wiring is connected to the first base electrodes of those elements electrically. Consequently, a ballast resistor that causes no variation in the resistance value can be connected to each of a plurality of the transistor elements.

公开(公告)号：US20120228626A1

公开(公告)日：2012-09-13

申请号：US13366313

申请日：2012-02-04

申请人： Kazuhiro Mochizuki ,  Takashi Ishigaki ,  Akihisa Terano ,  Tomonobu Tsuchiya

发明人： Kazuhiro Mochizuki ,  Takashi Ishigaki ,  Akihisa Terano ,  Tomonobu Tsuchiya

IPC分类号： H01L29/205 ,  H01L21/20

CPC分类号： H01L29/872 ,  H01L29/0649 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66143

摘要： In a semiconductor device including a stack structure having heterojunction units formed by alternately stacking GaN (gallium nitride) films and barrier films which are different in forbidden band width, a first electrode formed in a Schottky barrier contact with one sidewall of the stack structure, and a second electrode formed in contact with the other sidewall, an oxide film is interposed between the first electrode and the barrier films. Therefore, the reverse leakage current is prevented from flowing through defects remaining in the barrier films due to processing of the barrier films, so that a reverse leakage current of a Schottky barrier diode is reduced.

摘要翻译： 在包括具有通过交替层叠禁带宽度不同的GaN（氮化镓）膜和阻挡膜形成的异质结单元的堆叠结构的半导体器件中，形成为与堆叠结构的一个侧壁接触的肖特基势垒的第一电极，以及 形成为与另一侧壁接触的第二电极，在第一电极和阻挡膜之间插入氧化膜。 因此，由于阻挡膜的处理，防止反向泄漏电流流过残留在阻挡膜中的缺陷，使得肖特基势垒二极管的反向泄漏电流降低。

公开(公告)号：US20090057685A1

公开(公告)日：2009-03-05

申请号：US12176635

申请日：2008-07-21

申请人： Kazuhiro MOCHIZUKI ,  Hidekatsu Onose ,  Natsuki Yokoyama

发明人： Kazuhiro MOCHIZUKI ,  Hidekatsu Onose ,  Natsuki Yokoyama

IPC分类号： H01L29/24

CPC分类号： H01L29/1608 ,  H01L29/0804 ,  H01L29/66068 ,  H01L29/7322

摘要： In a mesa type bipolar transistor or a thyristor, since carriers injected from an emitter layer or an anode layer to a base layer or a gate layer diffuse laterally and are recombined, reduction in the size and improvement for the switching frequency is difficult.In the invention, the emitter layer or the anode layer is formed of two high-doped and low-doped layers, a semiconductor region for suppressing recombination comprising an identical semiconductor having an impurity density identical with that of the low-doped layer is present being in contact with a base layer or a gate layer and a surface passivation layer, and the width of the semiconductor region for suppressing recombination is defined equal with or longer than the diffusion length of the carrier. This provides an effect of attaining reduction in the size of the bipolar transistor or improvement of the switching frequency of the thyristor without deteriorating the performance. Further, this has an effect of greatly improving the current gain by successively stacking above the high-doped emitter layer of the bipolar transistor, a hole barrier layer, a conduction band discontinuity relaxed layer and an emitter contact layer.

摘要翻译： 在台式双极晶体管或晶闸管中，由于从发射极层或阳极层向基极层或栅极层注入的载流子横向漫射并重新组合，因此难以减小开关频率的尺寸和改善。 在本发明中，发射极层或阳极层由两个高掺杂和低掺杂层形成，用于抑制复合的半导体区域包括具有与低掺杂层的杂质密度相同的杂质密度的相同半导体， 与基底层或栅极层和表面钝化层接触，并且用于抑制复合的半导体区域的宽度被限定为等于或长于载体的扩散长度。 这提供了在不降低性能的情况下实现双极晶体管的尺寸的减小或晶闸管的开关频率的提高的效果。 此外，这具有通过连续堆叠在双极晶体管，空穴阻挡层，导带不连续松弛层和发射极接触层的高掺杂发射极层上方大大改善电流增益的效果。

公开(公告)号：US20070241427A1

公开(公告)日：2007-10-18

申请号：US11686396

申请日：2007-03-15

申请人： Kazuhiro Mochizuki ,  Natsuki Yokoyama

发明人： Kazuhiro Mochizuki ,  Natsuki Yokoyama

IPC分类号： H01L31/00 ,  H01L29/739 ,  H01L27/082

CPC分类号： H01L21/8213 ,  H01L21/101 ,  H01L27/0647 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/66068 ,  H01L29/6631 ,  H01L29/732 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/49175 ,  H01L2924/00014

摘要： In conventional mesa-type npn bipolar transistors, the improvement of a current gain and the miniaturization of the transistor have been unachievable simultaneously as a result of a trade-off being present between lateral diffusion and recombination of the electrons which have been injected from an emitter layer into a base layer, and a high-density base contact region—emitter mesa distance. In contrast to the above, the present invention is provided as follows: The gradient of acceptor density in the depth direction of a base layer is greater at the edge of an emitter layer than at the edge of a collector layer. Also, the distance between a first mesa structure including the emitter layer and the base layer, and a second mesa structure including the base layer and the collector layer, is controlled to range from 3 μm to 9 μm. In addition, in order for the above to be implemented with high controllability, the base layer is formed of a first p-type base layer having an acceptor of uniform density, and a second p-type base layer whose density is greater than the uniform acceptor density of the first base layer while having a gradient in the depth direction of the second base layer. These features produce the advantageous effect that it is possible to provide a high-temperature adaptable, power-switching bipolar transistor that ensures a current gain high enough for practical use and is suitable for miniaturization.

摘要翻译： 在传统的台面型npn双极型晶体管中，由于在从发射极注入的电子的横向扩散和复合之间存在权衡的结果，电流增益的提高和晶体管的小型化是不可实现的 层到基层，以及高密度基极接触区域 - 发射极台面距离。 与上述相反，本发明提供如下：基底层的深度方向上的受主密度梯度在发射极层的边缘处比在集电极层的边缘处更大。 此外，包括发射极层和基底层的第一台面结构之间的距离和包括基底层和集电体层的第二台面结构的距离被控制在3μm到9μm的范围。 此外，为了实现上述的高可控性，基层由具有均匀密度的受体的第一p型基底层和密度大于均匀的第二p型基底层形成 同时具有第二基底层的深度方向上的梯度的第一基底层的受主密度。 这些特征产生有利的效果是可以提供高温适应性的功率开关双极晶体管，其确保电流增益足够高以用于实际应用并且适合于小型化。

公开(公告)号：US07276744B2

公开(公告)日：2007-10-02

申请号：US11316908

申请日：2005-12-27

申请人： Kenichi Tanaka ,  Tomonori Tanoue ,  Hidetoshi Matsumoto ,  Hiroshi Ohta ,  Kazuhiro Mochizuki ,  Hiroyuki Uchiyama

发明人： Kenichi Tanaka ,  Tomonori Tanoue ,  Hidetoshi Matsumoto ,  Hiroshi Ohta ,  Kazuhiro Mochizuki ,  Hiroyuki Uchiyama

IPC分类号： H01L29/33 ,  H01L31/109

CPC分类号： H01L29/7371 ,  H01L29/66318

摘要： This invention is intended to provide an HBT capable of achieving, if the HBT is a collector-up HBT, the constriction of the emitter layer disposed directly under an external base layer, and reduction in base-emitter junction capacity, or if the HBT is an emitter-up HBT, reduction in base-collector junction capacity. For the collector-up HBT, window structures around the sidewalls of a collector are used to etch either the emitter layer disposed directly under the external base layer, or an emitter contact layer For the emitter-up HBT, window structures around the sidewalls of an emitter are used to etch either the collector layer disposed directly under the external base layer, or a collector contact layer. In both HBTs, the external base layer is supported by a columnar structure to ensure mechanical strength.

摘要翻译： 本发明旨在提供一种如果HBT是集电极HBT，则可以实现直接位于外部基极层下方的发射极层的收缩，以及基极 - 发射极结能量的降低，或HBT为 发射极HBT，基极 - 集电极结电容降低。 对于收集器HBT，围绕集电极侧壁的窗口结构用于蚀刻直接位于外部基极层下方的发射极层或发射极接触层。对于发射极上升HBT，围绕侧壁的窗口结构 发射极用于蚀刻直接位于外部基底层下方的集电极层或集电极接触层。 在两个HBT中，外部基层由柱状结构支撑以确保机械强度。

公开(公告)号：US20060058697A1

公开(公告)日：2006-03-16

申请号：US11068868

申请日：2005-03-02

申请人： Kazuhiro Mochizuki ,  Toshiki Sugawara ,  Masataka Shirai ,  Hiroyuki Uchiyama ,  Masaru Kokubo

发明人： Kazuhiro Mochizuki ,  Toshiki Sugawara ,  Masataka Shirai ,  Hiroyuki Uchiyama ,  Masaru Kokubo

IPC分类号： A61B5/08 ,  G08B1/08

CPC分类号： A61B5/1112 ,  A61B5/0002 ,  A61B5/082

摘要： A portable health check apparatus incorporating a highly sensitive and compact expiration analysis sensor and an expiration analysis service offered to a specified user at a specified time. Hydrogen is detected using tungsten oxide produced through metalorganic chemical vapor deposition process. The apparatus has a unit for performing personal authentication by using, for example, a voiceprint of a user. The apparatus is also arranged to call up a user at a predetermined time through a cellular phone. Further, a center server receives detection information of an expiration component via a communication circuit, analyzes or statistically processes the detection information, collates a result of the analysis or statistic process with advice information stored in a database and transmits advice information based on a result of the collation from the server to the cellular phone of the user.

摘要翻译： 一种便携式健康检查装置，包括高度敏感和紧凑的呼气分析传感器和在指定时间向特定用户提供的到期分析服务。 使用通过金属有机化学气相沉积工艺生产的氧化钨检测氢。 该装置具有通过使用例如用户的声纹执行个人认证的单元。 该装置还被布置成通过蜂窝电话在预定时间呼叫用户。 此外，中心服务器通过通信电路接收到期分量的检测信息，分析或统计处理检测信息，将分析或统计处理结果与存储在数据库中的建议信息进行比较，并根据以下结果发送建议信息： 从服务器到用户的蜂窝电话的整理。

公开(公告)号：US5949097A

公开(公告)日：1999-09-07

申请号：US932939

申请日：1997-09-17

申请人： Koji Hirata ,  Tomonori Tanoue ,  Hiroshi Masuda ,  Hiroyuki Uchiyama ,  Kazuhiro Mochizuki

发明人： Koji Hirata ,  Tomonori Tanoue ,  Hiroshi Masuda ,  Hiroyuki Uchiyama ,  Kazuhiro Mochizuki

IPC分类号： H01L21/331 ,  H01L21/768 ,  H01L27/06 ,  H01L29/737 ,  H01L29/04

CPC分类号： H01L29/66318 ,  H01L27/0605 ,  H01L29/7371

摘要： The present invention relates to a contact structure not only for a semiconductor device having a hetero-junction bipolar transistor or a hetero-insulated gate field effect transistor but also for semiconductor devices at large. In a semiconductor layer of a polycrystalline or amorphous undoped III-V compound semiconductor or an alloy thereof, a through hole is formed for contact. The size of the through hole is set to permit exposure of at least part of a first conductor layer and a dielectric layer, such as an Si compound, present around the first conductor layer, and a second conductor layer is formed within the through hole so as to contact the first conductor layer. Since the semiconductor layer can be subjected to a selective dry etching for the dielectric layer, the dielectric layer is not etched at the time of forming the above through hole in the semiconductor layer. As a result an electric short-circuit of the second conductor layer with a single crystal semiconductor layer which underlies the dielectric layer can be prevented.

摘要翻译： 本发明涉及不仅具有异质结双极晶体管或异质绝缘栅场效应晶体管的半导体器件的接触结构，而且还涉及用于半导体器件的半导体器件。 在多晶或非晶未掺杂的III-V族化合物半导体的半导体层或其合金中，形成用于接触的通孔。 通孔的尺寸被设定为允许暴露在第一导体层周围的第一导体层和诸如Si化合物的电介质层的至少一部分，并且在通孔内形成第二导体层，因此 以接触第一导体层。 由于可以对半导体层进行电介质层的选择性干蚀刻，所以在形成半导体层中的上述通孔时不会蚀刻电介质层。 结果，可以防止具有位于电介质层下面的单晶半导体层的第二导体层的电短路。

公开(公告)号：US5017517A

公开(公告)日：1991-05-21

申请号：US518035

申请日：1990-05-02

申请人： Kazuhiro Mochizuki ,  Tomonori Tanoue ,  Chushirou Kusano ,  Hiroshi Masuda ,  Katsuhiko Mitani

发明人： Kazuhiro Mochizuki ,  Tomonori Tanoue ,  Chushirou Kusano ,  Hiroshi Masuda ,  Katsuhiko Mitani

IPC分类号： H01L29/73 ,  H01L21/20 ,  H01L21/28 ,  H01L21/331 ,  H01L29/205 ,  H01L29/737 ,  H01L29/80

CPC分类号： H01L29/66318 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02491 ,  H01L21/02546 ,  H01L21/02639 ,  H01L21/28 ,  Y10S148/005 ,  Y10S148/011 ,  Y10S148/026 ,  Y10S438/976

摘要： A method for fabricating a semiconductor device comprises the steps of forming the first semiconductor layer on a semiconductor substrate, forming a surface protection layer of antimony (Sb) or the material having Sb as its main component, executing the other steps necessary for the fabrication of the semiconductor device, removing the surface protection layer, and forming, on the first semiconductor layer thus exposed, the second semiconductor layer.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在半导体衬底上形成第一半导体层，形成锑（Sb）的表面保护层或具有Sb的材料作为其主要成分，执行制造所需的其它步骤 半导体器件，去除表面保护层，并且在由此暴露的第一半导体层上形成第二半导体层。

公开(公告)号：US09518736B2

公开(公告)日：2016-12-13

申请号：US13319865

申请日：2010-05-25

申请人： Katsuhiko Yokohama ,  Kenichiro Kosaka ,  Keigo Matsumoto ,  Noboru Kawamoto ,  Yoshiki Yamaguchi ,  Masaaki Kinoshita ,  Koji Ohura ,  Atsushi Tsutsumi ,  Shozo Kaneko ,  Kazuhiro Mochizuki ,  Chihiro Fushimi ,  Yasuki Kansha

发明人： Katsuhiko Yokohama ,  Kenichiro Kosaka ,  Keigo Matsumoto ,  Noboru Kawamoto ,  Yoshiki Yamaguchi ,  Masaaki Kinoshita ,  Koji Ohura ,  Atsushi Tsutsumi ,  Shozo Kaneko ,  Kazuhiro Mochizuki ,  Chihiro Fushimi ,  Yasuki Kansha

IPC分类号： F26B3/08 ,  F23K1/04 ,  C10L9/08 ,  F26B23/00

CPC分类号： F23K1/04 ,  C10L9/08 ,  F23K2201/20 ,  F26B23/004 ,  Y02B30/52 ,  Y02E50/30 ,  Y02P70/405

摘要： A water-containing solid fuel drying apparatus that can efficiently dry with low energy consumption by effectively utilizing sensible heat and latent heat of a heating medium for drying, etc. is provided. A drying apparatus (10) that dries water-containing solid fuel includes a dryer (20) that injects scavenging gas into the interior of a drying vessel (21) in which a heat transfer pipe (22) is disposed; a dust collector (13) that removes microparticles from microparticle-containing mixed gaseous fluid that has flowed out of the drying vessel (21); a compressor (30) that compresses vapor-containing mixed gaseous fluid; a vapor heat exchanger (31) that preheats low-pressure mixed gaseous fluid with high-pressure mixed gaseous fluid compressed at the compressor (30); and a gas-liquid separator (14), in which the high-pressure mixed gaseous fluid is employed as drying gas that radiates heat by passing through the heat transfer pipe (22), that performs gas-liquid separation of water-containing scavenging gas that has flowed out of the heat transfer pipe (22) while containing condensed water of vapor generated due to heat radiation, wherein the water-containing solid fuel is dried by heating the water-containing solid fuel in the drying vessel (21) utilizing latent heat and sensible heat of the mixed gaseous fluid.

摘要翻译： 提供一种含水固体燃料干燥装置，其能够通过有效地利用用于干燥的加热介质的显热和潜热等而能够有效地干燥低能量消耗。 干燥含水固体燃料的干燥装置（10）包括将清扫气体注入到设置有传热管（22）的干燥容器（21）的内部的干燥机（20） 从所述干燥容器（21）流出的含微粒混合气体流体中除去微粒的集尘器（13）。 压缩机（30），其压缩含蒸汽的混合气体流体; 蒸汽热交换器（31），用于在压缩机（30）处压缩的高压混合气体流体预热低压混合气体流体; 和气液分离器（14），其中采用高压混合气体流体作为通过传热管（22）散热的干燥气体，其进行含水清除气体的气液分离 其从传热管（22）流出，同时包含由于热辐射而产生的蒸气的冷凝水，其中通过利用潜在的方式加热干燥容器（21）中的含水固体燃料来干燥含水固体燃料 混合气态流体的热和显热。

公开(公告)号：US20070295994A1

公开(公告)日：2007-12-27

申请号：US11685796

申请日：2007-03-14

申请人： Kazuhiro Mochizuki ,  Hidetoshi Matsumoto ,  Shinichiro Takatani

发明人： Kazuhiro Mochizuki ,  Hidetoshi Matsumoto ,  Shinichiro Takatani

IPC分类号： H01L29/739 ,  H01L27/082

CPC分类号： H01L29/66318 ,  H01L27/0605 ,  H01L29/2003 ,  H01L29/737

摘要： A hetero-junction bipolar transistor is provided including emitter contact region, an emitter region made of a first semiconductor material, a base region made of a second semiconductor material having a smaller energy band gap than the first semiconductor material, a collector region made of the first semiconductor material, and a collector contact area, the regions being serially formed on a surface of a substrate in a direction parallel to the surface thereof. A buffer layer made of a third semiconductor material with an energy band gap larger than the first semiconductor material is provided between the emitter region, the base region, the collector region and the substrate surface. Emitter, base and collector electrodes are also provided, in contact with the emitter contact region, the base region, and the collector region, respectively.

摘要翻译： 提供了一种异质结双极晶体管，其包括发射极接触区域，由第一半导体材料制成的发射极区域，由具有比第一半导体材料更小的能带隙的第二半导体材料制成的基极区域，由 第一半导体材料和集电极接触区域，所述区域在平行于其表面的方向上串联地形成在基板的表面上。 在发射极区域，基极区域，集电极区域和基板表面之间设置由能量带隙大于第一半导体材料的第三半导体材料制成的缓冲层。 发射极，基极和集电极电极也分别与发射极接触区域，基极区域和集电极区域接触。