IF Signal processing circuit in a receiver
    11.
    发明授权
    IF Signal processing circuit in a receiver 失效
    IF接收机中的信号处理电路

    公开(公告)号:US4476586A

    公开(公告)日:1984-10-09

    申请号:US464167

    申请日:1983-02-07

    Applicant: Koji Ishida

    Inventor: Koji Ishida

    CPC classification number: H03D3/004

    Abstract: In an IF signal processing circuit in an FM receiver, distortion introduced by an IF filter is eliminated without degrading a selection characteristic thereof. The circuit includes a front end which converts an FM-RF signal into a first IF signal; an IF filter; an FM detector which detects the first IF signal which has passed through the IF filter; an FM modulation circuit which outputs an FM modulation signal in accordance with a detection output of the FM detector; a mixer for mixing the FM modulation signal with the first IF signal and providing a second IF signal; and another mixer for mixing the second IF signal with the FM modulation signal to convert into the first IF signal. The first IF signal thus converted is delivered to an FM detector.

    Abstract translation: 在FM接收机中的IF信号处理电路中,消除由IF滤波器引入的失真,而不降低其选择特性。 该电路包括将FM-RF信号转换成第一IF信号的前端; 中频滤波器 FM检测器,其检测已经通过IF滤波器的第一IF信号; FM调制电路,其根据FM检测器的检测输出输出FM调制信号; 混频器,用于将FM调制信号与第一IF信号混频并提供第二IF信号; 以及用于将第二IF信号与FM调制信号混合以转换成第一IF信号的另一个混频器。 如此转换的第一IF信号被传送到FM检测器。

    Semiconductor integrated circuit
    12.
    发明授权
    Semiconductor integrated circuit 有权
    半导体集成电路

    公开(公告)号:US08436352B2

    公开(公告)日:2013-05-07

    申请号:US13156681

    申请日:2011-06-09

    Abstract: Whether there is a defect such as chipping of a die or separation of a resin in a wafer level package is electrically detected. A peripheral wiring is disposed along four peripheries of a semiconductor substrate outside a circuit region and pad electrodes P1-P8. The peripheral wiring is formed on the semiconductor substrate and is made of a metal layer that is the same layer as or an upper layer of a metal layer forming the pad electrodes P1-P8, or a polysilicon layer. A power supply electric potential Vcc is applied to a first end of the peripheral wiring, while a ground electric potential Vss is applied to a second end of the peripheral wiring through a resistor R2. A detection circuit is connected to a connecting node N1 between the peripheral wiring and the resistor R2, and is structured to generate an anomaly detection signal ERRFLG based on an electric potential at the connecting node N1.

    Abstract translation: 电子检测是否存在诸如芯片碎裂或晶片级封装中树脂分离的缺陷。 外围布线沿着电路区域外侧的半导体基板的四周以及焊盘电极P1〜P8配置。 外围布线形成在半导体基板上,并且由与构成焊盘电极P1-P8的金属层相同的层或上层的金属层或多晶硅层构成。 电源电位Vcc被施加到外围配线的第一端,而接地电位Vss通过电阻器R2施加到外围配线的第二端。 检测电路与外围配线和电阻R2之间的连接节点N1连接,构成为根据连接节点N1的电位生成异常检测信号ERRFLG。

    Anti-ILT7 antibody
    13.
    发明授权
    Anti-ILT7 antibody 有权
    抗ILT7抗体

    公开(公告)号:US08084585B2

    公开(公告)日:2011-12-27

    申请号:US12064957

    申请日:2006-12-20

    Abstract: An antibody binding to IPC was obtained by using an animal cell in which a cell membrane protein associatable with ILT7 was co-expressed as an immunogen. The antibody of the invention has a high specificity which allows immunological distinction between other ILT family molecules and ILT7. The anti-ILT7 antibody of the invention bound to IPC and inhibited the activity thereof. With the anti-ILT7 antibody of the invention, the IPC activity can be inhibited and an interferon-related disease can be treated or prevented. ILT7 expression is maintained even in IPC in the presence of IFNα. Therefore, an inhibitory action of IPC activity by the anti-ILT7 antibody can be expected even in an autoimmune disease patient with an increased production of IFNα.

    Abstract translation: 通过使用与ILT7相关的细胞膜蛋白共表达作为免疫原的动物细胞获得与IPC结合的抗体。 本发明的抗体具有高特异性,其允许其他ILT家族分子和ILT7之间的免疫学区别。 本发明的抗ILT7抗体结合IPC并抑制其活性。 利用本发明的抗ILT7抗体,可以抑制IPC活性并且可以治疗或预防干扰素相关疾病。 在IFNα存在下,甚至在IPC中也维持ILT7表达。 因此,即使在具有增加的IFNα产生量的自身免疫疾病患者中也能预期抗ILT7抗体的IPC活性的抑制作用。

    Granulation process
    15.
    发明授权
    Granulation process 失效
    造粒工艺

    公开(公告)号:US4501773A

    公开(公告)日:1985-02-26

    申请号:US387650

    申请日:1982-06-11

    CPC classification number: C05C9/005 B01J2/16

    Abstract: A spouted bed granulation process in which the average particle size of the final product is controlled by employing, as seed particles fed to the granulator, a mixture of particles of at least two different average particle sizes and changing the mixing ratio of the respective particles.

    Abstract translation: 喷射床造粒方法,其中通过将作为种子颗粒加入造粒机的至少两种不同平均粒度的颗粒的混合物并且改变各个颗粒的混合比来控制最终产品的平均粒径。

    Optical transmission line
    16.
    发明授权
    Optical transmission line 失效
    光传输线

    公开(公告)号:US4185890A

    公开(公告)日:1980-01-29

    申请号:US734310

    申请日:1976-10-20

    CPC classification number: G02B6/03627 G02B6/0288

    Abstract: In order to expand the product between the transmission length and the transmission bandwidth of an optical fiber for use in the optical communication and to facilitate the connection between the optical fibers, the optical fiber is made of transparent materials of three concentric layers of a core whose refractive index gradually decreases in the radial direction from the center, an intermediate layer which has a uniform refractive index lower than the varying refractive index of the core, and a cladding which has a uniform refractive index substantially equal to the lowest refractive index of the core.

    Abstract translation: 为了在光通信中使用的光纤的传输长度和传输带宽之间扩大产品并且促进光纤之间的连接,光纤由具有核心的三个同心层的透明材料制成, 折射率从中心沿半径方向逐渐减小,具有低于芯的折射率变化的折射率均匀的中间层和具有基本上等于芯的最低折射率的均匀折射率的包层 。

    SEMICONDUCTOR INTEGRATED CIRCUIT
    19.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT 有权
    半导体集成电路

    公开(公告)号:US20110315986A1

    公开(公告)日:2011-12-29

    申请号:US13156681

    申请日:2011-06-09

    Abstract: Whether there is a defect such as chipping of a die or separation of a resin in a wafer level package is electrically detected. A peripheral wiring is disposed along four peripheries of a semiconductor substrate outside a circuit region and pad electrodes P1-P8. The peripheral wiring is formed on the semiconductor substrate and is made of a metal layer that is the same layer as or an upper layer of a metal layer forming the pad electrodes P1-P8, or a polysilicon layer. A power supply electric potential Vcc is applied to a first end of the peripheral wiring, while a ground electric potential Vss is applied to a second end of the peripheral wiring through a resistor R2. A detection circuit is connected to a connecting node N1 between the peripheral wiring and the resistor R2, and is structured to generate an anomaly detection signal ERRFLG based on an electric potential at the connecting node N1.

    Abstract translation: 电子检测是否存在诸如芯片碎裂或晶片级封装中树脂分离的缺陷。 外围布线沿着电路区域外侧的半导体基板的四周以及焊盘电极P1〜P8配置。 外围布线形成在半导体基板上,并且由与构成焊盘电极P1-P8的金属层相同的层或上层的金属层或多晶硅层构成。 电源电位Vcc被施加到外围配线的第一端,而接地电位Vss通过电阻器R2施加到外围配线的第二端。 检测电路与外围配线和电阻R2之间的连接节点N1连接,构成为根据连接节点N1的电位生成异常检测信号ERRFLG。

    ANTI-BST2 ANTIBODY
    20.
    发明申请
    ANTI-BST2 ANTIBODY 失效
    抗BST2抗体

    公开(公告)号:US20100278832A1

    公开(公告)日:2010-11-04

    申请号:US12738285

    申请日:2008-10-16

    Abstract: BST2 antibodies were selected by using as an indicator the binding between BST2 antibodies and various splicing variants of human BST2 antigen. As a result, the present inventors successfully obtained BST2 antibodies that specifically recognize BST2D, which has been reported to be expressed at high levels in cancer cells. The antibodies of the present invention specifically bind to cells expressing BST2D. Non-specific antibody binding to non-target tissues, which results in the decrease of antibody concentration in blood, can be prevented by using the antibodies of the present invention therapeutically. Alternatively, the present invention provides diagnostic agents comprising an antibody of the present invention, which specifically detect tissues expressing BST2D.

    Abstract translation: 通过使用BST2抗体与人BST2抗原的各种剪接变体之间的结合作为指标来选择BST2抗体。 结果,本发明人成功地获得了特异性识别BST2D的BST2抗体,BST2D据报道在癌细胞中以高水平表达。 本发明的抗体特异性结合表达BST2D的细胞。 可以通过使用本发明的抗体治疗性地防止结合非靶组织的非特异性抗体,其导致血液中抗体浓度的降低。 或者,本发明提供了包含特异性检测表达BST2D的组织的本发明的抗体的诊断剂。

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