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11.发明申请IMAGE SENSOR, METHOD FOR MANUFACTURING THE SAME, AND IMAGE PROCESSING DEVICE HAVING THE IMAGE SENSOR 有权图像传感器，其制造方法和具有图像传感器的图像处理装置公开(公告)号：US20140375826A1
公开(公告)日：2014-12-25
申请号：US14310305
申请日：2014-06-20
Applicant: Myung Won Lee , Sang Chul Sul , Hirosige Goto , Sae Young Kim , Gwi Deck Ryan Lee , Masaru Ishii , Kyo Jin Choo
Inventor： Myung Won Lee , Sang Chul Sul , Hirosige Goto , Sae Young Kim , Gwi Deck Ryan Lee , Masaru Ishii , Kyo Jin Choo
CPC classification number: H01L27/307 , H01L51/442 , H04N5/23229 , H04N5/3765 , H04N5/378 , H04N9/045
Abstract: An image sensor comprising: a first layer having a plurality of groups of photodiodes formed in a semiconductor substrate, each group representing a 2×2 array of photodiodes, with 2 first pixels configured to detect light of a first wavelength and 2 second pixels configured to detect light of a second wavelength, each first pixel positioned adjacent to the second pixels; and a second layer overlapping the first layer, the second layer is organic, having a plurality of organic photodiodes configured to detect light of a third wavelength, each organic photodiode positioned to partially overlap 2 first photodiodes and 2 second photodiodes of the first layer.
Abstract translation: 一种图像传感器，包括：第一层，其具有形成在半导体衬底中的多组光电二极管，每个组表示2×2的光电二极管阵列，其中2个第一像素被配置为检测第一波长的光和2秒的像素， 检测第二波长的光，每个第一像素定位成与第二像素相邻; 以及与所述第一层重叠的第二层，所述第二层是有机的，具有被配置为检测第三波长的光的多个有机光电二极管，每个有机光电二极管定位成部分地重叠第一层的2个第一光电二极管和2个第二光电二极管。
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12.发明申请公开(公告)号：US20140293106A1
公开(公告)日：2014-10-02
申请号：US14303221
申请日：2014-06-12
Applicant: Yu Jin PARK , Han YANG , Sin-Hwan LIM , Kyo Jin CHOO , Seog Heon HAM
Inventor： Yu Jin PARK , Han YANG , Sin-Hwan LIM , Kyo Jin CHOO , Seog Heon HAM
CPC classification number: H04N5/3658 , H03K5/08 , H03M1/08 , H03M1/12 , H03M1/123 , H03M1/56 , H04N5/3355 , H04N5/3591 , H04N5/363 , H04N5/3742
Abstract: One embodiment of an analog-to-digital converter includes at least one comparator and a restriction circuit. The comparator has first and second input nodes and a connection node. The connection node is one of an internal node and an output node of the comparator. The restriction circuit is electrically connected to the connection node, and the restriction circuit is configured to restrict a voltage of the connection node.
Abstract translation: 模数转换器的一个实施例包括至少一个比较器和限制电路。 比较器具有第一和第二输入节点和连接节点。 连接节点是比较器的内部节点和输出节点之一。 限制电路电连接到连接节点，并且限制电路被配置为限制连接节点的电压。
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公开(公告)号：US08797063B2
公开(公告)日：2014-08-05
申请号：US13180064
申请日：2011-07-11
Applicant: Kyo-Jin Choo , Yu-Jin Park , Yong Lim
Inventor： Kyo-Jin Choo , Yu-Jin Park , Yong Lim
IPC: H03K19/0175
CPC classification number: H03M9/00 , H03K5/15093
Abstract: A data transmission device includes a control unit and a delay chain unit. The control unit outputs a first control signal through an nth control signal, where n is a natural number. The delay chain unit includes a first switching element through an nth switching element. The switching elements receive a first data signal through an nth data signal and perform pipelining operations on the first through nth data signals based upon the first through nth control signals, respectively, to output the pipelined data signals as at least one data stream. The switching elements are connected to each other to form at least one data delay chain.
Abstract translation: 数据传输装置包括控制单元和延迟链单元。 控制单元通过第n个控制信号输出第一控制信号，其中n是自然数。 延迟链单元包括通过第n个开关元件的第一开关元件。 开关元件通过第n个数据信号接收第一数据信号，并且分别基于第一至第N控制信号对第一至第n数据信号执行流水线操作，以将流水线数据信号作为至少一个数据流输出。 开关元件彼此连接以形成至少一个数据延迟链。
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14.发明授权公开(公告)号：US08773191B2
公开(公告)日：2014-07-08
申请号：US13669983
申请日：2012-11-06
Applicant: Yu Jin Park , Han Yang , Sin-Hwan Lim , Kyo Jin Choo , Seog Heon Ham
Inventor： Yu Jin Park , Han Yang , Sin-Hwan Lim , Kyo Jin Choo , Seog Heon Ham
CPC classification number: H04N5/3658 , H03K5/08 , H03M1/08 , H03M1/12 , H03M1/123 , H03M1/56 , H04N5/3355 , H04N5/3591 , H04N5/363 , H04N5/3742
Abstract: One embodiment of an analog-to-digital converter includes at least one comparator and a restriction circuit. The comparator has first and second input nodes and a connection node. The connection node is one of an internal node and an output node of the comparator. The restriction circuit is electrically connected to the connection node, and the restriction circuit is configured to restrict a voltage of the connection node.
Abstract translation: 模数转换器的一个实施例包括至少一个比较器和限制电路。 比较器具有第一和第二输入节点和连接节点。 连接节点是比较器的内部节点和输出节点之一。 限制电路电连接到连接节点，并且限制电路被配置为限制连接节点的电压。
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Patent Agency Ranking
公开(公告)号：US20120104229A1
公开(公告)日：2012-05-03
申请号：US13243471
申请日：2011-09-23
Applicant: Min-Ho Kwon , Sin-Hwan Lim , Jin-Ho Seo , Ju-Hyun Ko , Young-Tae Jang , Kyo-Jin Choo
Inventor： Min-Ho Kwon , Sin-Hwan Lim , Jin-Ho Seo , Ju-Hyun Ko , Young-Tae Jang , Kyo-Jin Choo
CPC classification number: G01J5/22
Abstract: A temperature sensor includes a band gap reference (BGR) circuit, a voltage generation unit and a digital CDS circuit. The band gap reference (BGR) circuit generates a reference voltage proportional to a temperature. The voltage generation unit generates a first voltage and a second voltage based on the reference voltage, where the first voltage and the second voltage are proportional to the temperature. The digital CDS circuit generates a digital signal corresponding to the temperature by performing a digital correlated double sampling (CDS) operation on the first voltage and the second voltage. The temperature sensor is able to detect a temperature accurately.
Abstract translation: 温度传感器包括带隙基准（BGR）电路，电压产生单元和数字CDS电路。 带隙基准（BGR）电路产生与温度成比例的参考电压。 电压产生单元基于参考电压产生第一电压和第二电压，其中第一电压和第二电压与温度成比例。 数字CDS电路通过对第一电压和第二电压执行数字相关双采样（CDS）操作来产生对应于温度的数字信号。 温度传感器能够准确检测温度。
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16.发明申请公开(公告)号：US20120007653A1
公开(公告)日：2012-01-12
申请号：US13180064
申请日：2011-07-11
Applicant: Kyo-Jin CHOO , Yu-Jin PARK , Yong LIM
Inventor： Kyo-Jin CHOO , Yu-Jin PARK , Yong LIM
IPC: H03K17/00
CPC classification number: H03M9/00 , H03K5/15093
Abstract: A data transmission device includes a control unit and a delay chain unit. The control unit outputs a first control signal through an nth control signal, where n is a natural number. The delay chain unit includes a first switching element through an nth switching element. The switching elements receive a first data signal through an nth data signal and perform pipelining operations on the first through nth data signals based upon the first through nth control signals, respectively, to output the pipelined data signals as at least one data stream. The switching elements are connected to each other to form at least one data delay chain.
Abstract translation: 数据传输装置包括控制单元和延迟链单元。 控制单元通过第n个控制信号输出第一控制信号，其中n是自然数。 延迟链单元包括通过第n个开关元件的第一开关元件。 开关元件通过第n个数据信号接收第一数据信号，并且分别基于第一至第N控制信号对第一至第n数据信号执行流水线操作，以将流水线数据信号作为至少一个数据流输出。 开关元件彼此连接以形成至少一个数据延迟链。
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公开(公告)号：US07973578B2
公开(公告)日：2011-07-05
申请号：US12627229
申请日：2009-11-30
Applicant: Do-hwan Oh , Kyo-Jin Choo , Deog-Kyoon Jeong
Inventor： Do-hwan Oh , Kyo-Jin Choo , Deog-Kyoon Jeong
IPC: H03L7/06
CPC classification number: G04F10/005 , G04F10/06 , H03L7/087 , H03L7/091
Abstract: A time-to-digital converter (TDC) includes a converter which receives a first signal and a second signal, delays the second signal in phases using a plurality of delay elements which are coupled in series, compares the delayed second signal with the first signal, and outputs a phase error of the second signal with respect to the first signal, a phase frequency detector which receives the first signal, and a third signal from one of the nodes in the plurality of delay elements, and outputs a phase difference between the first signal and the third signal, and a frequency detector which outputs a frequency error of the second signal with respect to the first signal as a digital code using an output signal of the phase frequency detector and the second signal.
Abstract translation: 时间数字转换器（TDC）包括接收第一信号和第二信号的转换器，使用串联耦合的多个延迟元件来相位延迟第二信号，将延迟的第二信号与第一信号进行比较 并且输出相对于第一信号的第二信号的相位误差，接收第一信号的相位频率检测器和来自多个延迟元件中的一个节点的第三信号，并且输出第二信号之间的相位差 第一信号和第三信号，以及频率检测器，其使用相位频率检测器和第二信号的输出信号将相对于第一信号的第二信号的频率误差作为数字码输出。
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18.发明申请ADJUSTABLE CAPACITOR, DIGITALLY CONTROLLED OSCILLATOR, AND ALL-DIGITAL PHASE LOCKED LOOP 有权可调节电容器，数字控制振荡器和全数字锁相环公开(公告)号：US20100156550A1
公开(公告)日：2010-06-24
申请号：US12630885
申请日：2009-12-04
Applicant: Do-hwan OH , Kyo-Jin CHOO , Deog-Kyoon JEONG
Inventor： Do-hwan OH , Kyo-Jin CHOO , Deog-Kyoon JEONG
CPC classification number: H03L7/099 , H03J2200/10 , H03L7/18 , H03L2207/06 , H03L2207/50
Abstract: An adjustable capacitor is provided including a capacitor unit including a plurality of capacitor groups aligned in a matrix format and a switch unit to adjust capacitance by connecting the plurality of capacitor groups in parallel according to a selection signal of a column and row of the matrix. Accordingly, the adjustable capacitor may be realized of a small size but with a high capacitance change rate.
Abstract translation: 提供了一种可调节电容器，包括：电容器单元，其包括以矩阵形式排列的多个电容器组;以及开关单元，用于根据矩阵的列和行的选择信号并联连接多个电容器组来调整电容。 因此，可调电容器可以实现为小尺寸但具有高电容变化率。
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公开(公告)号：US20100134165A1
公开(公告)日：2010-06-03
申请号：US12627229
申请日：2009-11-30
Applicant: Do-hwan OH , Kyo-Jin CHOO , Deog-Kyoon JEONG
Inventor： Do-hwan OH , Kyo-Jin CHOO , Deog-Kyoon JEONG
CPC classification number: G04F10/005 , G04F10/06 , H03L7/087 , H03L7/091
Abstract: A time-to-digital converter (TDC) includes a converter which receives a first signal and a second signal, delays the second signal in phases using a plurality of delay elements which are coupled in series, compares the delayed second signal with the first signal, and outputs a phase error of the second signal with respect to the first signal, a phase frequency detector which receives the first signal, and a third signal from one of the nodes in the plurality of delay elements, and outputs a phase difference between the first signal and the third signal, and a frequency detector which outputs a frequency error of the second signal with respect to the first signal as a digital code using an output signal of the phase frequency detector and the second signal.
Abstract translation: 时间数字转换器（TDC）包括接收第一信号和第二信号的转换器，使用串联耦合的多个延迟元件来相位延迟第二信号，将延迟的第二信号与第一信号进行比较 并且输出相对于第一信号的第二信号的相位误差，接收第一信号的相位频率检测器和来自多个延迟元件中的一个节点的第三信号，并且输出第二信号之间的相位差 第一信号和第三信号，以及频率检测器，其使用相位频率检测器和第二信号的输出信号将相对于第一信号的第二信号的频率误差作为数字码输出。
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