System and method for self configuration of reconfigurable systems
    12.
    发明申请
    System and method for self configuration of reconfigurable systems 有权
    可配置系统自配置的系统和方法

    公开(公告)号:US20070027977A1

    公开(公告)日:2007-02-01

    申请号:US11540480

    申请日:2006-09-28

    IPC分类号: G06F15/177 G06F15/173

    CPC分类号: G06F15/7867

    摘要: The invention is a system and method for reconfigurable computers. The invention involves a plurality of reconfigurable component clusters (RCCs), each of which can change their respective configuration upon receiving a configuration command. The invention uses a reconfiguration network for distributing the configuration command to the RCCs, wherein the reconfiguration network comprises a plurality of cells, wherein each RCC is connected to a cell.

    摘要翻译: 本发明是用于可重新配置的计算机的系统和方法。 本发明涉及多个可重新配置的组件集群(RCC),每个组件集群在接收到配置命令时都可以改变其各自的配置。 本发明使用重配置网络将配置命令分配给RCC,其中重新配置网络包括多个小区,其中每个RCC连接到小区。

    Three-dimensional nanoscale crossbars
    15.
    发明申请
    Three-dimensional nanoscale crossbars 有权
    三维纳米级横条

    公开(公告)号:US20060240681A1

    公开(公告)日:2006-10-26

    申请号:US11114307

    申请日:2005-04-25

    IPC分类号: H01L21/00

    摘要: Various embodiments of the present invention include three-dimensional, at least partially nanoscale, electronic circuits and devices in which signals can be routed in three independent directions, and in which electronic components can be fabricated at junctions interconnected by internal signal lines. The three-dimensional, at least partially nanoscale, electronic circuits and devices include layers, the nanowire or microscale-or-submicroscale/nanowire junctions of each of which may be economically and efficiently fabricated as one type of electronic component. Various embodiments of the present invention include nanoscale memories, nanoscale programmable arrays, nanoscale multiplexers and demultiplexers, and an almost limitless number of specialized nanoscale circuits and nanoscale electronic components.

    摘要翻译: 本发明的各种实施例包括三维,至少部分纳米级的电子电路和装置,其中信号可以在三个独立的方向上布线,并且其中电子部件可以在通过内部信号线互连的连接点处制造。 三维,至少部分纳米级的电子电路和器件包括层,其中每一个的纳米线或微米级或亚微米级/纳米线结可以经济地和有效地制造为一种类型的电子部件。 本发明的各种实施例包括纳米级存储器,纳米级可编程阵列,纳米级多路复用器和解复用器,以及几乎无限数量的专用纳米尺度电路和纳米级电子部件。

    Photonic interconnect method
    17.
    发明申请
    Photonic interconnect method 有权
    光子互连方法

    公开(公告)号:US20080118201A1

    公开(公告)日:2008-05-22

    申请号:US12008605

    申请日:2008-01-11

    IPC分类号: G02B6/12

    摘要: A photonic interconnect method avoids high capacitance electric interconnects by using optical signals to communicate data between devices. The method can provide massively parallel information output by mapping logical addresses to frequency bands, so that modulation of a selected frequency band can encode information for a specific location corresponding to the logical address. Wavelength-specific directional couplers, modulators, and detectors, which can be fabricated at defects in a photonic bandgap crystal, can be employed for the photonic interconnect method. The interconnect method can be used for both classical and quantum information processing.

    摘要翻译: 光子互连方法通过使用光信号在设备之间传送数据来避免高电容电互连。 该方法可以通过将逻辑地址映射到频带来提供大量并行信息输出,使得所选频带的调制可以对与逻辑地址相对应的特定位置的信息进行编码。 可以在光子互连方法中使用可在光子带隙晶体的缺陷处制造的波长特异性定向耦合器,调制器和检测器。 互连方法可用于经典和量子信息处理。

    Nanoscale shift register and signal demultiplexing using microscale/nanoscale shift registers
    20.
    发明申请
    Nanoscale shift register and signal demultiplexing using microscale/nanoscale shift registers 有权
    使用微米/纳米级移位寄存器的纳米级移位寄存器和信号解复用

    公开(公告)号:US20070094756A1

    公开(公告)日:2007-04-26

    申请号:US11255722

    申请日:2005-10-21

    IPC分类号: H01L23/58

    摘要: One embodiment of the present invention is a nanoscale shift register that can be used, in certain nanoscale and mixed-scale logic circuits, to distribute an input signal to individual nanowires of the logic circuit. In a described embodiment, the nanoscale shift register includes two series of nanoscale latches, each series controlled by common latch-control signals. Internal latches of each series of latches are alternatively interconnected with a previous latch of the other series and a next latch of the other series by two series of gates, each controlled by a gate signal line.

    摘要翻译: 本发明的一个实施例是纳米级移位寄存器,其可以在某些纳米尺度和混合尺度的逻辑电路中用于将输入信号分配到逻辑电路的各个纳米线。 在所描述的实施例中,纳米尺度移位寄存器包括两个系列的纳米尺度锁存器,每个串联由公共锁存控制信号控制。 每个锁存器系列的内部锁存器交替地与另一个串联的先前锁存器和另一个串联的下一个锁存器通过两个串联的栅极互连,每个栅极由栅极信号线控制。