MONOSACCHARIDE DERIVATIVES
    13.
    发明申请
    MONOSACCHARIDE DERIVATIVES 审中-公开
    单糖衍生物

    公开(公告)号:US20090221515A1

    公开(公告)日:2009-09-03

    申请号:US11574465

    申请日:2005-08-31

    CPC classification number: C07H15/18

    Abstract: The present invention relates to monosaccharide derivatives as anti-inflammatory agents. The compounds disclosed herein can be useful for inhibition and prevention of inflammation and associated pathologies, including inflammatory and autoimmune diseases such as bronchial asthma, rheumatoid arthritis, type I diabetes, multiple sclerosis, allograft rejection, psoriasis, inflammatory bowel disease, ulcerative colitis, acne, atherosclerosis, cancer, pruritis or allergic rhinitis. Pharmacological compositions containing the compounds of the present invention and the methods of treating bronchial asthma, chronic obstructive pulmonary disease, rheumatoid arthritis, multiple sclerosis, type I diabetes, psoriasis, allograft rejection, inflammatory bowel disease, ulcerative colitis, acne, atherosclerosis, cancer, pruritis, allergic rhinitis and other inflammatory and/or autoimmune disorders, using the compounds are also provided.

    Abstract translation: 本发明涉及作为抗炎剂的单糖衍生物。 本文公开的化合物可用于抑制和预防炎症和相关病理学,包括炎症和自身免疫性疾病如支气管哮喘,类风湿性关节炎,I型糖尿病,多发性硬化,同种异体移植排斥,牛皮癣,炎性肠病,溃疡性结肠炎,痤疮 ,动脉粥样硬化,癌症,瘙痒症或过敏性鼻炎。 包含本发明化合物的药物组合物,治疗支气管哮喘,慢性阻塞性肺病,类风湿性关节炎,多发性硬化,I型糖尿病,牛皮癣,同种异体移植排斥,炎性肠病,溃疡性结肠炎,痤疮,动脉粥样硬化,癌症, 还提供了使用该化合物的瘙痒症,过敏性鼻炎和其它炎性和/或自身免疫性疾病。

    Hyaluronic Acid Derivative and Neural Stem Cells for SCI and PNT Regeneration
    14.
    发明申请
    Hyaluronic Acid Derivative and Neural Stem Cells for SCI and PNT Regeneration 审中-公开
    透明质酸衍生物和神经干细胞用于SCI和PNT再生

    公开(公告)号:US20090202495A1

    公开(公告)日:2009-08-13

    申请号:US11795428

    申请日:2006-01-18

    Abstract: A biomaterial for the treatment of spinal cord or of peripheral nerve injury injury, obtainable by: a) treating a hyaluronic acid derivative with a coating solution promoting Neuronal Stem Cells adhesion, branching and differentiation; b) contacting isolated Neuronal Stem Cells with the hyaluronic acid derivative obtained from step a) and culturing and expanding the absorbed cells in the presence of growth or neurotrophic factors selected from βFGF (basic fibroblast growth factor), CNTF (ciliary neurotrophic factor), BDNF (brain derived neurotrophic factor) and GDNF (glial derived neurotrophic factor) or mixtures thereof.

    Abstract translation: 用于治疗脊髓或周围神经损伤损伤的生物材料,其可通过以下方法获得:a)用涂覆溶液处理透明质酸衍生物,促进神经元干细胞粘附,分支和分化; b)使分离的神经元干细胞与从步骤a)获得的透明质酸衍生物接触,并在生长或选自βFGF(碱性成纤维细胞生长因子),CNTF(睫状神经营养因子),BDNF的神经营养因子的存在下培养和扩增所吸收的细胞 (脑源性神经营养因子)和GDNF(胶质衍生的神经营养因子)或其混合物。

    INHIBITORS OF PHOSPHODIESTERASE TYPE 4
    16.
    发明申请
    INHIBITORS OF PHOSPHODIESTERASE TYPE 4 审中-公开
    磷酸二酯酶类型4的抑制剂

    公开(公告)号:US20080207659A1

    公开(公告)日:2008-08-28

    申请号:US12031842

    申请日:2008-02-15

    CPC classification number: C07D403/04 C07D401/04

    Abstract: The present invention relates to inhibitors of phosphodiesterase (PDE) type 4.Compounds disclosed herein can be useful for treating, preventing, inhibiting or suppressing asthma, arthritis, bronchitis, chronic obstructive pulmonary disease (COPD), psoriasis, allergic rhinitis, shock, atopic dermatitis, Crohn's disease, adult respiratory distress syndrome (ARDS), AIDS, eosinophilic granuloma, allergic conjunctivitis, osteoarthritis, ulcerative colitis or other inflammatory diseases, especially in humans.Processes for the preparation of disclosed compounds, pharmaceutical compositions containing the disclosed compounds and their use as phosphodiesterase (PDE) type 4 inhibitors are provided.

    Abstract translation: 本发明涉及类型4的磷酸二酯酶(PDE)抑制剂。本文公开的化合物可用于治疗,预防,抑制或抑制哮喘,关节炎,支气管炎,慢性阻塞性肺病(COPD),牛皮癣,过敏性鼻炎,休克,特应性 特发性皮炎,克罗恩病,成人呼吸窘迫综合征(ARDS),艾滋病,嗜酸性肉芽肿,过敏性结膜炎,骨关节炎,溃疡性结肠炎或其他炎性疾病。 提供制备所公开化合物的方法,含有所公开化合物的药物组合物及其作为磷酸二酯酶(PDE)4型抑制剂的用途。

    METHOD OF CONTROLLING A DATA FLOW, TRANSMITTER AND DATA TRANSMISSION SYSTEM
    17.
    发明申请
    METHOD OF CONTROLLING A DATA FLOW, TRANSMITTER AND DATA TRANSMISSION SYSTEM 有权
    控制数据流,发射机和数据传输系统的方法

    公开(公告)号:US20080192631A1

    公开(公告)日:2008-08-14

    申请号:US11674501

    申请日:2007-02-13

    CPC classification number: H04L47/10 H04L47/266 H04L47/30

    Abstract: A method of controlling a data flow, a transmitter and a data transmission system are described. For example, in a method of controlling a data flow of a transmitter, first data is received at a first interface. The first data is buffered in a buffer. The first data is output via a second interface. Information is determined regarding an estimated amount of second data comprising payload data output via the first interface until a filling level of the buffer will reach a predetermined threshold. An amount of the payload data output via the first interface is adjusted based on the information. The payload data is then output via the first interface. Similarly, a transmitter includes an interface to output payload data and a control signal, and a buffer to buffer further data received via the interface wherein the control signal controls a flow of said further data.

    Abstract translation: 描述了一种控制数据流的方法,发射机和数据传输系统。 例如,在控制发送器的数据流的方法中,在第一接口处接收第一数据。 第一个数据被缓冲在缓冲区中。 第一个数据通过第二个接口输出。 确定关于包括经由第一接口输出的有效载荷数据的第二数据的估计量的信息,直到缓冲器的填充级别将达到预定阈值。 基于该信息来调整经由第一接口输出的有效载荷数据的量。 然后通过第一接口输出有效载荷数据。 类似地,发射机包括用于输出有效载荷数据和控制信号的接口,以及用于缓冲经由接口接收到的另外的数据的缓冲器,其中控制信号控制所述另外的数据的流。

    Decoder system for data encoded with interleaving and redundancy coding
    18.
    发明申请
    Decoder system for data encoded with interleaving and redundancy coding 有权
    用于编码交织和冗余编码的数据的解码器系统

    公开(公告)号:US20080065968A1

    公开(公告)日:2008-03-13

    申请号:US11506051

    申请日:2006-08-17

    Abstract: A system for processing a data signal (such as an ADSL or VDSL signal) includes a demodulator, a first decoder unit, such as a convolutional encoder or a QAM decoder, for receiving the output of the demodulator, decoding the second level of encoding and outputting a decoded signal and a first error indication signal indicative of errors in the decoded signal. The decoded signal is passed through a de-interleaving unit to form a de-interleaved signal. The first location signal is passed to an identifier unit which receives it, and from it produces a second error indication signal indicative of the errors in the de-interleaved signal. The de-interleaved signal and the second error indication signal are transmitted to a redundancy decoder which employs them to perform redundancy decoding.

    Abstract translation: 用于处理数据信号(例如ADSL或VDSL信号)的系统包括解调器,诸如卷积编码器或QAM解码器的第一解码器单元,用于接收解调器的输出,解码第二编码级别,以及 输出解码信号和指示解码信号中的错误的第一错误指示信号。 解码信号通过解交织单元以形成解交织信号。 第一位置信号被传递到接收它的标识符单元,并从其产生指示解交织信号中的错误的第二错误指示信号。 解交织信号和第二错误指示信号被发送到使用它们执行冗余解码的冗余解码器。

    Multiple rate architecture for wireline communication system
    19.
    发明申请
    Multiple rate architecture for wireline communication system 审中-公开
    用于有线通信系统的多速率架构

    公开(公告)号:US20080008255A1

    公开(公告)日:2008-01-10

    申请号:US11483963

    申请日:2006-07-10

    CPC classification number: H04L27/2626 H04L25/14 H04L27/2647

    Abstract: A discrete multitone (DMT) transceiver communicates with multiple channels generates and receives DMT symbols each having a duration of a timeslot. A transmitter portion of the transceiver includes a symbol processor which generates symbols for multiple channels sequentially, and stores the generated symbols in a buffer until they are transmitted. A receiver portion simultaneously receives symbols on multiple channels and stores the symbols in a buffer, from which the symbols on different channels are read and processed sequentially. To reduce the rate of communication on a given channel, the symbol processors may be idle in respect of some of the timeslots corresponding to that channel. The transceiver may alternatively be an OFDM transceiver.

    Abstract translation: 离散多音(DMT)收发器与多个通道通信产生和接收每个具有时隙持续时间的DMT码元。 收发器的发射机部分包括符号处理器,其顺序地产生多个信道的符号,并将生成的符号存储在缓冲器中直到它们被发送。 接收机部分同时在多个信道上接收符号并且将符号存储在缓冲器中,从该信号缓冲器中顺序地读取和处理不同信道上的符号。 为了降低给定信道上的通信速率,符号处理器可能对于与该信道相对应的某些时隙而言是空闲的。 收发器可以可选地是OFDM收发器。

    Implementation of wait-states
    20.
    发明授权
    Implementation of wait-states 失效
    执行等待状态

    公开(公告)号:US06954873B2

    公开(公告)日:2005-10-11

    申请号:US10115504

    申请日:2002-04-02

    Applicant: Raj Kumar Jain

    Inventor: Raj Kumar Jain

    CPC classification number: G06F13/4226 H03K2005/00247 H03L7/06

    Abstract: An improved implementation of wait-states in an SOC architecture with optimized performance is described. The clock input signal to the processor is modified during wait-states so that the wait signal does not have to be provided within a short setup time. Data integrity is maintained by providing alternative data paths during wait-states.

    Abstract translation: 描述了具有优化性能的SOC架构中等待状态的改进实现。 在等待状态期间修改处理器的时钟输入信号,使得等待信号不需要在短的建立时间内提供。 通过在等待状态期间提供备用数据路径来维护数据完整性。

Patent Agency Ranking