公开(公告)号：US20180090248A1

公开(公告)日：2018-03-29

申请号：US15709606

申请日：2017-09-20

Applicant: SFI Electronics Technology Inc.

Inventor： Ching-Hohn LIEN ,  Jie-An ZHU ,  Zhi-Xian XU ,  Ting-Yi FANG ,  Hong-Zong XU

IPC: H01C17/06 ,  H01C7/102 ,  H01C7/10 ,  H01C1/14 ,  H01C17/28

CPC classification number: H01C17/06 ,  H01C1/14 ,  H01C7/1006 ,  H01C7/102 ,  H01C7/112 ,  H01C7/18 ,  H01C17/065 ,  H01C17/06546 ,  H01C17/281

Abstract: A process for producing a multilayer varistor (MLV) if remained its size unchanged as prior arts is favorable to outstandingly increase overall current-carrying area and improve the performance of final produced MLV; and the MLV has laminated a lower cap, an inner-electrode stack formed from piling up several inner-electrode gaps (g), and an upper cap into a unity, and at least satisfies the condition that the lower cap and the upper cap has a thickness smaller than a thickness of the inner-electrode gap (g), but equal to or greater than 0.1 times of the thickness of the inner-electrode gap (g).

公开(公告)号：US20150200147A1

公开(公告)日：2015-07-16

申请号：US14585857

申请日：2014-12-30

Applicant: SFI Electronics Technology Inc.

Inventor： Ching-Hohn LIEN ,  Xing- Xiang HUANG ,  Hsing-Tsai HUANG ,  Hong-Zong XU ,  Yi-Wei CHEN

IPC: H01L23/15 ,  H01L23/02 ,  H01L23/00 ,  H01L21/78 ,  H01L21/56 ,  H01L23/31 ,  H01L29/861

CPC classification number: H01L24/97 ,  H01L21/4853 ,  H01L21/4867 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L21/7813 ,  H01L23/02 ,  H01L23/15 ,  H01L23/3107 ,  H01L23/49805 ,  H01L23/49833 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L24/96 ,  H01L25/0652 ,  H01L29/861 ,  H01L2224/06181 ,  H01L2224/27312 ,  H01L2224/2732 ,  H01L2224/29294 ,  H01L2224/29311 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29364 ,  H01L2224/29369 ,  H01L2224/32168 ,  H01L2224/32227 ,  H01L2224/33181 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/1203 ,  H01L2924/12032 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/15798 ,  H01L2924/181 ,  H01L2924/186 ,  H05K1/117 ,  H05K1/144 ,  H05K1/145 ,  H05K3/403 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/83

Abstract: A miniaturized SMD diode package involves using a diode chip whose bottom surface has a positive electrode and a negative electrode, using a circuit board instead of a conventional lead frame during packaging, and using Charge-Coupled Device (CCD) image registration technology to perform chip bonding; the beneficial advantages brought from a process for producing the same including to simplify producing process and reduce manufacturing cost, to improve accuracy and precision of producing the miniaturized SMD diode package due to using a circuit board instead of conventionally used lead frame, and to ensure the produced miniaturized SMD diode package possesses excellent diode characteristics without distortion or defect.

Abstract translation: 小型SMD二极管封装包括使用二极管芯片，其底表面具有正极和负极，在封装期间使用电路板代替常规引线框架，并使用电荷耦合器件（CCD）图像配准技术来执行芯片 粘接; 由于使用电路板而不是常规使用的引线框架，从其制造方法带来的有益优点包括简化制造工艺并降低制造成本，提高生产小型化SMD二极管封装的精度和精度，并确保 生产的小型SMD二极管封装具有优异的二极管特性，无失真或缺陷。

公开(公告)号：US20150123254A1

公开(公告)日：2015-05-07

申请号：US14523066

申请日：2014-10-24

Applicant: SFI Electronics Technology Inc.

Inventor： Ching-Hohn LIEN ,  Xing- Xiang HUANG ,  Hsing-Tsai HUANG ,  Hong-Zong XU

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L25/07 ,  H01L25/00

CPC classification number: H01L23/49575 ,  H01L23/3107 ,  H01L23/49537 ,  H01L23/49555 ,  H01L23/49562 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L25/072 ,  H01L25/50 ,  H01L2224/2732 ,  H01L2224/2741 ,  H01L2224/29294 ,  H01L2224/29311 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29364 ,  H01L2224/29369 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/9221 ,  H01L2224/97 ,  H01L2924/00015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12 ,  H01L2924/1203 ,  H01L2924/12032 ,  H01L2924/12035 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2224/48

Abstract: A novel chip scale diode package due to no containing outer lead pins is miniaturized like a chip scale appearance to promote dimensional accuracy so that the diode package is so suitably produced by automation equipment to get automated mass production; the produced diode package may contain one or more diode chips to increase versatile functions more useful in applications, such as produced as a SMT diode package or an array-type SMT diode, and the present diode package due to made of no lead-containing material conforms to requirements for environmental protection.

Abstract translation: 由于不含外部引脚引脚的新颖的芯片尺寸二极管封装小型化，像芯片尺寸外观，以提高尺寸精度，使得二极管封装由自动化设备适当地生产以获得自动批量生产; 所生成的二极管封装可以包含一个或多个二极管芯片，以增加在应用中更有用的通用功能，例如作为SMT二极管封装或阵列型SMT二极管制造的，以及由于不含含铅材料制成的本二极管封装 符合环保要求。