公开(公告)号：US07629218B2

公开(公告)日：2009-12-08

申请号：US11592177

申请日：2006-11-03

Applicant: Woo-Sung Lee ,  Man-Sug Kang ,  Tae-Han Kim ,  Keum-Joo Lee

Inventor： Woo-Sung Lee ,  Man-Sug Kang ,  Tae-Han Kim ,  Keum-Joo Lee

IPC: H01L21/8242

CPC classification number: H01L28/91 ,  H01L27/10814 ,  H01L27/10852

Abstract: Example embodiments relate to a method of manufacturing a capacitor and a method of manufacturing a semiconductor device using the same. Other example embodiments relate to a method of manufacturing a capacitor having improved characteristics and a method of manufacturing a semiconductor device using the same. In a method of manufacturing a capacitor having improved characteristics, an insulation layer, including a pad therein, may be formed on a substrate. An etch stop layer may be formed on the insulation layer. A mold layer may be formed on the etch stop layer. The mold layer may be partially etched by a first etching process to form a first contact hole exposing the etch stop layer. The mold layer may be partially etched by a second etching process to form a second contact hole. The exposed etch stop layer may be etched by a third etching process to form a third contact hole exposing the pad. A native oxide layer on the exposed pad may be removed by a fourth etching process to form a capacitor contact hole. A conductive layer may be formed in the capacitor contact hole to form a capacitor.

Abstract translation: 示例性实施例涉及制造电容器的方法和使用其制造半导体器件的方法。 其他示例性实施例涉及制造具有改进特性的电容器的方法以及使用其制造半导体器件的方法。 在制造具有改进特性的电容器的方法中，可以在衬底上形成包括衬垫的绝缘层。 可以在绝缘层上形成蚀刻停止层。 可以在蚀刻停止层上形成模具层。 可以通过第一蚀刻工艺部分蚀刻模具层，以形成露出蚀刻停止层的第一接触孔。 可以通过第二蚀刻工艺部分地蚀刻模具层以形成第二接触孔。 可以通过第三蚀刻工艺蚀刻暴露的蚀刻停止层，以形成露出焊盘的第三接触孔。 暴露焊盘上的自然氧化物层可以通过第四蚀刻工艺去除以形成电容器接触孔。 可以在电容器接触孔中形成导电层以形成电容器。

公开(公告)号：US20080143911A1

公开(公告)日：2008-06-19

申请号：US11826589

申请日：2007-07-17

Applicant: Hyun Suk Jin ,  Hyung Seok Jang ,  Tae Han Kim

Inventor： Hyun Suk Jin ,  Hyung Seok Jang ,  Tae Han Kim

IPC: G02F1/136

CPC classification number: G02F1/134336 ,  G02F1/1323 ,  G02F1/133555 ,  G02F1/1393 ,  G02F2001/134345

Abstract: Provided are an LCD device that can control a viewing angle freely and a manufacturing method thereof. The LCD device includes a first substrate, a second substrate, and an LC layer interposed between the first and second substrates. The LCD device further includes red, green, blue, and viewing angle controlling subpixels. These subpixels are driven in a VA mode. The red, green, and blue subpixels have a transflective structure. The viewing angle controlling subpixel has a transmissive or transflective structure.

Abstract translation: 提供了可以自由地控制视角的LCD装置及其制造方法。 LCD装置包括第一基板，第二基板和置于第一和第二基板之间的LC层。 LCD装置还包括红色，绿色，蓝色和视角控制子像素。 这些子像素以VA模式被驱动。 红色，绿色和蓝色子像素具有透反射结构。 视角控制子像素具有透射或透反射结构。

公开(公告)号：US20150372038A1

公开(公告)日：2015-12-24

申请号：US14741740

申请日：2015-06-17

Applicant: Ji Won LEE ,  Seung Sik KIM ,  Young Chan KIM ,  Tae Han KIM ,  Eun Sub SHIM ,  Dong Joo YANG ,  Min Seok OH ,  Moo Sup LIM

Inventor： Ji Won LEE ,  Seung Sik KIM ,  Young Chan KIM ,  Tae Han KIM ,  Eun Sub SHIM ,  Dong Joo YANG ,  Min Seok OH ,  Moo Sup LIM

IPC: H01L27/146

CPC classification number: H01L27/14623 ,  H01L27/14609 ,  H01L27/14643 ,  H04N5/3592 ,  H04N5/3696 ,  H04N5/378

Abstract: An image sensor capable of boosting a voltage of a floating diffusion node is provided. The image sensor includes a floating diffusion node and a storage element which are in a semiconductor substrate. The image sensor includes a first light-shielding material formed over the floating diffusion node, and a second light-shielding material formed over the storage diode. The second light-shielding material is separated from the first light-shielding material. The image sensor also includes a first voltage supply line configured to apply a first voltage to the first light-shielding material and a second voltage supply line configured to apply a second voltage lower than the first voltage to the second light-shielding material.

Abstract translation: 提供能够提高浮动扩散节点的电压的图像传感器。 图像传感器包括位于半导体衬底中的浮动扩散节点和存储元件。 图像传感器包括形成在浮动扩散节点上的第一遮光材料和形成在存储二极管上的第二遮光材料。 第二遮光材料与第一遮光材料分离。 图像传感器还包括被配置为向第一遮光材料施加第一电压的第一电压供给线和被配置为将低于第一电压的第二电压施加到第二遮光材料的第二电压供给线。

公开(公告)号：US08569140B2

公开(公告)日：2013-10-29

申请号：US13194030

申请日：2011-07-29

Applicant: Kyu-Tae Kim ,  Jong-Seo Hong ,  Tae-Han Kim

Inventor： Kyu-Tae Kim ,  Jong-Seo Hong ,  Tae-Han Kim

IPC: H01L21/336

CPC classification number: H01L29/66545 ,  H01L21/28114 ,  H01L21/28238 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/66553 ,  H01L29/66628 ,  H01L29/7834

Abstract: A method for fabricating a semiconductor device is disclosed. One embodiment of the method includes forming a dummy gate pattern on a substrate, forming an interlayer dielectric film that covers the dummy gate pattern, exposing a top surface of the dummy gate pattern, selectively removing the dummy gate pattern to form a first gate trench, forming a sacrificial layer pattern over a top surface of the substrate in the first gate trench, the sacrificial layer pattern leaving a top portion of the first gate trench exposed, increasing an upper width of the exposed top portion of the first gate trench to form a second gate trench, and removing the sacrificial layer pattern in the second gate trench, and forming a non-dummy gate pattern in the second gate trench.

Abstract translation: 公开了一种制造半导体器件的方法。 该方法的一个实施例包括在衬底上形成伪栅极图案，形成覆盖伪栅极图案的层间电介质膜，暴露伪栅极图案的顶表面，选择性地去除伪栅极图案以形成第一栅极沟槽， 在所述第一栅极沟槽中的所述衬底的顶表面上形成牺牲层图案，所述牺牲层图案离开所述第一栅极沟槽的顶部部分而暴露，从而增加所述第一栅极沟槽的暴露顶部的上部宽度，以形成 第二栅极沟槽，并且去除第二栅极沟槽中的牺牲层图案，以及在第二栅极沟槽中形成非虚拟栅极图案。

公开(公告)号：US07851364B2

公开(公告)日：2010-12-14

申请号：US11739647

申请日：2007-04-24

Applicant: Ki-Won Nam ,  Tae-Han Kim

Inventor： Ki-Won Nam ,  Tae-Han Kim

IPC: H01L21/311

CPC classification number: H01L21/32139 ,  H01L21/32135

Abstract: A method for forming a pattern in a semiconductor device includes forming an etch target layer comprising metal over a substrate. A hard mask pattern is formed over the etch target layer. The etch target layer is etched to form a pattern such that a line width of the etch target layer is smaller than a line width of the hard mask pattern.

Abstract translation: 在半导体器件中形成图案的方法包括在衬底上形成包含金属的蚀刻目标层。 在蚀刻目标层上形成硬掩模图案。 蚀刻目标层被蚀刻以形成图案，使得蚀刻目标层的线宽小于硬掩模图案的线宽。

公开(公告)号：US20100297840A1

公开(公告)日：2010-11-25

申请号：US12642496

申请日：2009-12-18

Applicant: Tae-Han KIM ,  Dong-Hyun Kim

Inventor： Tae-Han KIM ,  Dong-Hyun Kim

IPC: H01L21/28

CPC classification number: H01L21/28247 ,  H01L21/28061 ,  H01L29/4941

Abstract: A method for fabricating a semiconductor device includes forming a gate insulation layer over a substrate, sequentially forming a silicon layer and a metal layer over the gate insulation layer, performing a first gate etching process to etch the metal layer using a gate hard mask layer, formed on the metal layer, as an etch barrier, and then partially etch the silicon layer, thereby forming a first pattern, performing a second gate etching process to partially etch the silicon layer, thereby forming an undercut beneath the metal layer, forming a capping layer on both sidewalls of the first pattern including the undercut, performing a third gate etching process to etch the silicon layer to expose the gate insulation layer using the gate hard mask layer and the capping layer as an etch barrier, thereby forming a second pattern, and performing a gate re-oxidation process.

Abstract translation: 一种制造半导体器件的方法包括在衬底上形成栅极绝缘层，在栅极绝缘层上依次形成硅层和金属层，执行第一栅极蚀刻工艺以使用栅极硬掩模层来蚀刻金属层， 形成在金属层上，作为蚀刻阻挡层，然后部分地蚀刻硅层，由此形成第一图案，执行第二栅极蚀刻工艺以部分蚀刻硅层，从而在金属层下方形成底切，形成封盖 在包括底切的第一图案的两个侧壁上，执行第三栅极蚀刻工艺以蚀刻硅层，以使用栅极硬掩模层和封盖层作为蚀刻阻挡层来露出栅极绝缘层，从而形成第二图案， 并进行栅极再氧化处理。

公开(公告)号：US07809596B2

公开(公告)日：2010-10-05

申请号：US11514472

申请日：2006-09-01

Applicant: Tae-Han Kim ,  Eun-Jin Cho ,  Hyun-Mi Baek ,  Jae-Ho Byun

Inventor： Tae-Han Kim ,  Eun-Jin Cho ,  Hyun-Mi Baek ,  Jae-Ho Byun

IPC: G06F17/00

CPC classification number: G06Q30/02 ,  G06Q30/0204 ,  G06Q30/0283 ,  G06Q40/12

Abstract: Provided are an apparatus for evaluating an indirect loss caused by a ubiquity effect by provision of a universal service, and a method thereof. The apparatus includes a first data storage unit for storing population statistics-related data, a second data storage unit for storing universal service offer-related data, a control unit for reading out and delivering required data from the first and second data storage units to a ubiquity loss calculation unit and controlling the ubiquity loss calculation unit, the ubiquity loss calculation unit for calculating a ubiquity loss of each evaluation object district by using the required data from the control unit, and a third data storage unit for storing the ubiquity loss of each evaluation object district calculated in the ubiquity loss calculation unit.

Abstract translation: 提供一种用于通过提供通用服务来评估由普遍性效应引起的间接损失的装置及其方法。 该装置包括用于存储总体统计数据相关数据的第一数据存储单元，用于存储通用服务提供相关数据的第二数据存储单元，用于从第一和第二数据存储单元读出并传送所需数据的控制单元， 无处不在丢失计算单元，并且控制无处不在丢失计算单元，用于通过使用来自控制单元的所需数据来计算每个评估对象区域的普遍性损失的无处不在丢失计算单元，以及用于存储每个评估对象区域的无处不在损失的第三数据存储单元 评估对象区在无处不在损失计算单位计算。

公开(公告)号：US20070111462A1

公开(公告)日：2007-05-17

申请号：US11592177

申请日：2006-11-03

Applicant: Woo-Sung Lee ,  Man-Sug Kang ,  Tae-Han Kim ,  Keum-Joo Lee

Inventor： Woo-Sung Lee ,  Man-Sug Kang ,  Tae-Han Kim ,  Keum-Joo Lee

IPC: H01L21/20

CPC classification number: H01L28/91 ,  H01L27/10814 ,  H01L27/10852

Abstract: Example embodiments relate to a method of manufacturing a capacitor and a method of manufacturing a semiconductor device using the same. Other example embodiments relate to a method of manufacturing a capacitor having improved characteristics and a method of manufacturing a semiconductor device using the same. In a method of manufacturing a capacitor having improved characteristics, an insulation layer, including a pad therein, may be formed on a substrate. An etch stop layer may be formed on the insulation layer. A mold layer may be formed on the etch stop layer. The mold layer may be partially etched by a first etching process to form a first contact hole exposing the etch stop layer. The mold layer may be partially etched by a second etching process to form a second contact hole. The exposed etch stop layer may be etched by a third etching process to form a third contact hole exposing the pad. A native oxide layer on the exposed pad may be removed by a fourth etching process to form a capacitor contact hole. A conductive layer may be formed in the capacitor contact hole to form a capacitor.

Abstract translation: 示例性实施例涉及制造电容器的方法和使用其制造半导体器件的方法。 其他示例性实施例涉及制造具有改进特性的电容器的方法以及使用其制造半导体器件的方法。 在制造具有改进特性的电容器的方法中，可以在衬底上形成包括衬垫的绝缘层。 可以在绝缘层上形成蚀刻停止层。 可以在蚀刻停止层上形成模具层。 可以通过第一蚀刻工艺部分蚀刻模具层，以形成露出蚀刻停止层的第一接触孔。 可以通过第二蚀刻工艺部分地蚀刻模具层以形成第二接触孔。 可以通过第三蚀刻工艺蚀刻暴露的蚀刻停止层，以形成露出焊盘的第三接触孔。 暴露焊盘上的自然氧化物层可以通过第四蚀刻工艺去除以形成电容器接触孔。 可以在电容器接触孔中形成导电层以形成电容器。

公开(公告)号：US06623696B1

公开(公告)日：2003-09-23

申请号：US09697171

申请日：2000-10-27

Applicant: Su-Hyeon Kim ,  Jo-Kyun Park ,  Tae-Han Kim

Inventor： Su-Hyeon Kim ,  Jo-Kyun Park ,  Tae-Han Kim

IPC: G01N2100

CPC classification number: G01N21/6452 ,  B01J19/0046 ,  B01J2219/00378 ,  B01J2219/00432 ,  B01J2219/00497 ,  B01J2219/00536 ,  B01J2219/00576 ,  B01J2219/00585 ,  B01J2219/00596 ,  B01J2219/00605 ,  B01J2219/00626 ,  B01J2219/00659 ,  B01J2219/00675 ,  B01J2219/00677 ,  B01J2219/00704 ,  B01J2219/00707 ,  B01J2219/00711 ,  B01J2219/00722 ,  B01J2219/00725 ,  B01J2219/00729 ,  B01J2219/00731 ,  B01J2219/00743 ,  B82Y30/00 ,  G01N21/6456 ,  G01N35/00069

Abstract: The present invention provides a biochip which includes: a substrate having a center hole at a central portion, an biomaterial region aranged at a circumferential portion of the top surface of the substrate; and an information region formed on the substrate between the biomaterial region and the center hole and having the information on the biomaterials. In the method for detecting biomaterials using the biochip, a disk-type upper substrate is placed on the top surface of the biochip, a sample is put between the disk-type upper substrate and the biochip, the reaction between the sample solution and the biomaterial of the biochip is accelerated by rotating the biochip, and the detection unit analyzes the biomaterial by receiving the light emitted from the biomaterials, thereby making it possible to analyze the biomaterial of the sample solution. Since the biochip of the present invention is constructed as a disk type, high-priced scanning equipment is not necessary for thereby reducing the cost for detecting biomaterials. Since the sample solution is stirred by rotating the biochip, the speed of binding reaction is increased for thereby decreasing the time for analysis. Since the information on the biomaterial and the analytical information of the biomaterial can be recorded in the biochip, the management of the information of the biomaterials is made easier.

Abstract translation: 本发明提供一种生物芯片，其包括：在中心部分具有中心孔的基板，在所述基板顶面的圆周部分上排列的生物材料区域; 以及形成在生物材料区域和中心孔之间的基板上的信息区域，并且具有关于生物材料的信息。 在使用生物芯片检测生物材料的方法中，将盘状上基板放置在生物芯片的上表面上，将样品放置在盘型上基板和生物芯片之间，样品溶液与生物材料之间的反应 通过旋转生物芯片来加速生物芯片，并且检测单元通过接收从生物材料发射的光来分析生物材料，从而可以分析样品溶液的生物材料。 由于本发明的生物芯片被构造为盘式，因此不需要高价格的扫描设备，从而降低检测生物材料的成本。 由于通过旋转生物芯片搅拌样品溶液，所以结合反应的速度增加，从而减少分析时间。 由于生物材料的信息和生物材料的分析信息可以记录在生物芯片中，因此生物材料信息的管理变得更加容易。

公开(公告)号：US06391625B1

公开(公告)日：2002-05-21

申请号：US09604405

申请日：2000-06-27

Applicant: Je Kyun Park ,  Tae Han Kim

Inventor： Je Kyun Park ,  Tae Han Kim

IPC: C12M134

CPC classification number: B82Y30/00 ,  B01J19/0046 ,  B01J2219/00497 ,  B01J2219/00536 ,  B01J2219/00572 ,  B01J2219/00585 ,  B01J2219/0059 ,  B01J2219/00596 ,  B01J2219/00605 ,  B01J2219/0061 ,  B01J2219/00612 ,  B01J2219/00617 ,  B01J2219/00626 ,  B01J2219/00637 ,  B01J2219/00659 ,  B01J2219/00689 ,  B01J2219/00702 ,  B01J2219/00711 ,  B01J2219/00722 ,  B01J2219/00725 ,  B01J2219/00729 ,  C40B40/06 ,  C40B40/10 ,  C40B70/00 ,  G01N33/54373

Abstract: A biochip including a DNA chip and a protein chip and a method for patterning and measuring biomaterial of the same are disclosed. The method for patterning a biomaterial of the biochip including a reflecting layer and an active layer on a substrate includes the steps of: rotating the biochip; successively irradiating pulse type laser beams to the rotating biochip to activate predetermined regions of the active layer; and fixing a biomaterial pattern on the activated predetermined regions. A method for measuring the patterned biomaterial includes the steps of: reacting a biomaterial labeled with at least one dye material with the biochip; rotating the biochip reacted with at least one biomaterial; successively irradiating laser beams to the rotating biochip; and detecting and processing light derived from the biochip as a result of reaction of the biomaterial to measure the biomaterial. Thus, the biochip having reliability and high packing density can be fabricated at low cost and the biomaterial of the biochip can be measured at high speed without using expensive equipments.

Abstract translation: 公开了一种包括DNA芯片和蛋白质芯片的生物芯片及其生物材料的图形化和测量方法。 在基板上包括反射层和有源层的生物芯片的生物材料图形化方法包括以下步骤：旋转生物芯片; 向旋转的生物芯片依次照射脉冲型激光束，激活有源层的预定区域; 以及在活化的预定区域上固定生物材料图案。 用于测量图案化生物材料的方法包括以下步骤：使用至少一种染料材料标记的生物材料与生物芯片反应; 旋转所述生物芯片与至少一种生物材料反应; 将激光束依次照射到旋转的生物芯片上; 并且由于生物材料的反应而测量和处理来自生物芯片的光，以测量生物材料。 因此，可以以低成本制造具有可靠性和高填充密度的生物芯片，并且可以高速度地测量生物芯片的生物材料而不使用昂贵的设备。