公开(公告)号：US20100224858A1

公开(公告)日：2010-09-09

申请号：US12717788

申请日：2010-03-04

Applicant: PO MIN TU ,  SHIH CHENG HUANG ,  YING CHAO YEH ,  WEN YU LIN ,  PENG YI WU ,  SHIH HSIUNG CHAN

Inventor： PO MIN TU ,  SHIH CHENG HUANG ,  YING CHAO YEH ,  WEN YU LIN ,  PENG YI WU ,  SHIH HSIUNG CHAN

IPC: H01L33/00

CPC classification number: H01L33/44 ,  H01L33/642 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49107 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A lateral thermal dissipation LED and a fabrication method thereof are provided. The lateral thermal dissipation LED utilizes a patterned metal layer and a lateral heat spreading layer to transfer heat out of the LED. The thermal dissipation efficiency of the LED is increased, and the lighting emitting efficiency is accordingly improved.

Abstract translation: 提供横向散热LED及其制造方法。 横向散热LED利用图案化金属层和横向散热层将热量传出LED。 提高了LED的散热效率，相应地提高了发光效率。

公开(公告)号：US20100170936A1

公开(公告)日：2010-07-08

申请号：US12650056

申请日：2009-12-30

Applicant: PO MIN TU ,  SHIH CHENG HUANG ,  YING CHAO YEH ,  WEN YU LIN ,  PENG YI WU ,  SHIH HSIUNG CHAN

Inventor： PO MIN TU ,  SHIH CHENG HUANG ,  YING CHAO YEH ,  WEN YU LIN ,  PENG YI WU ,  SHIH HSIUNG CHAN

IPC: B23K31/02

CPC classification number: B23K13/01 ,  B23K2101/40 ,  H01L21/187 ,  H01L33/0079

Abstract: A method for bonding two materials uses radio frequency energy to swiftly induce heat in a high permeability material for heating a medium to the bonding temperature of the medium so as to bond the two materials with each other.

Abstract translation: 用于接合两种材料的方法使用射频能量来迅速地在高磁导率材料中引起热量，以将介质加热到介质的粘合温度，以便将两种材料彼此粘合。

公开(公告)号：US20100099213A1

公开(公告)日：2010-04-22

申请号：US12579779

申请日：2009-10-15

Applicant: PENG YI WU ,  SHIH CHENG HUANG ,  PO MIN TU ,  YING CHAO YEH ,  WEN YU LIN ,  SHIH HSIUNG CHAN

Inventor： PENG YI WU ,  SHIH CHENG HUANG ,  PO MIN TU ,  YING CHAO YEH ,  WEN YU LIN ,  SHIH HSIUNG CHAN

IPC: H01L21/322 ,  H01L21/28

CPC classification number: H01L21/02521 ,  H01L21/0237 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/0265 ,  H01L33/007 ,  H01L33/12

Abstract: The present invention provides a method for blocking the dislocation propagation of a semiconductor. A semiconductor layer is formed by epitaxial process on a substrate. A plurality of recesses is formed on the semiconductor layer by etching fragile locations of the semiconductor layer where dislocation occurs. Thereafter, a blocking layer is formed on each of the plurality of recesses. The aforesaid semiconductor layer undergoes epitaxial process again on the aforesaid semiconductor layer, and laterally overgrows to redirect the dislocation defects.

Abstract translation: 本发明提供一种阻止半导体位错传播的方法。 在衬底上通过外延工艺形成半导体层。 通过蚀刻发生位错的半导体层的脆弱位置，在半导体层上形成多个凹部。 此后，在多个凹部中的每一个上形成阻挡层。 上述半导体层在上述半导体层上再次进行外延处理，并横向过度地重新定位位错缺陷。

公开(公告)号：US20100019263A1

公开(公告)日：2010-01-28

申请号：US12505711

申请日：2009-07-20

Applicant: YING CHAO YEH ,  SHIH CHENG HUANG ,  PO MIN TU ,  WEN YU LIN ,  PENG YI WU ,  SHIH HSIUNG CHAN

Inventor： YING CHAO YEH ,  SHIH CHENG HUANG ,  PO MIN TU ,  WEN YU LIN ,  PENG YI WU ,  SHIH HSIUNG CHAN

IPC: H01L33/00 ,  H01L21/30

CPC classification number: H01L33/22 ,  H01L21/02458 ,  H01L21/02494 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/02587 ,  H01L21/0262 ,  H01L33/025 ,  H01L33/32

Abstract: A dual-scale rough structure, in which a plurality of islands are grown on a semiconductor layer by heavily doping a dopant during epitaxy of a semiconductor layer of an optoelectronics device, is provided. A plurality of pin holes are formed on the islands by lowering the epitaxial temperature. The pin holes are distributed over the top and sidewall surfaces of the islands so that the total internal reflection within the optoelectronics device can be significantly reduced so as to enhance the brightness thereof. Compared with traditional technologies, the process method of the present invention has the advantages of producing less pollution, being able to perform easily, reducing manufactured cost, increasing the efficiency of light extraction, and increasing the effective area of the dual-scale emitting surface, which is not a smooth surface, of the structure.

Abstract translation: 提供了一种双尺度粗糙结构，其中通过在光电子器件的半导体层的外延期间重掺杂掺杂剂，在半导体层上生长多个岛。 通过降低外延温度，在岛上形成多个针孔。 针孔分布在岛的顶壁和侧壁表面上，使得光电子器件内的全内反射可以显着地减小，从而增强其亮度。 与传统技术相比，本发明的方法具有污染少，能够容易地实现，降低制造成本，提高光提取效率，增加双尺度发射面有效面积的优点， 这不是一个光滑的表面，结构。

公开(公告)号：US20100019256A1

公开(公告)日：2010-01-28

申请号：US12506688

申请日：2009-07-21

Applicant: PENG YI WU ,  SHIH CHENG HUANG ,  PO MIN TU ,  YING CHAO YEH ,  WEN YU LIN ,  CHIH PENG HSU ,  SHIH HSIUNG CHAN

Inventor： PENG YI WU ,  SHIH CHENG HUANG ,  PO MIN TU ,  YING CHAO YEH ,  WEN YU LIN ,  CHIH PENG HSU ,  SHIH HSIUNG CHAN

IPC: H01L33/00

CPC classification number: H01L33/04 ,  H01L33/32

Abstract: A light emitting device with an electron blocking combination layer comprises an active layer, an n-type GaN layer, a p-type GaN layer, and an electron blocking combination layer which has two Group III-V semiconductor layers with different band gaps that can be deposited periodically and repeatedly on the active layer to block overflowing electrons from the active layers.

Abstract translation: 具有电子阻挡组合层的发光器件包括具有两个具有不同带隙的III-V族半导体层的有源层，n型GaN层，p型GaN层和电子阻挡组合层， 周期性地重复地沉积在有源层上以阻挡来自有源层的溢出电子。

公开(公告)号：US20090121214A1

公开(公告)日：2009-05-14

申请号：US12268650

申请日：2008-11-11

Applicant: Po Min Tu ,  Shih Cheng Huang ,  Ying Chao Yeh ,  Wen Yu Lin ,  Peng Yi Wu ,  Chih Peng Hsu ,  Shih Hsiung Chan

Inventor： Po Min Tu ,  Shih Cheng Huang ,  Ying Chao Yeh ,  Wen Yu Lin ,  Peng Yi Wu ,  Chih Peng Hsu ,  Shih Hsiung Chan

IPC: H01L33/00

CPC classification number: H01L33/22 ,  H01L21/02658 ,  H01L33/06 ,  H01L33/32

Abstract: A semiconductor light-emitting device comprises a substrate, a buffer layer, an n-type semiconductor layer, a conformational active layer and a p-type semiconductor layer. The n-type semiconductor layer includes a first surface and a second surface, and the first surface directly contacts the buffer layer. The second surface has a plurality of recesses, and a conformational active layer formed on the second surface and within the plurality of recesses. Therefore, the stress between the n-type semiconductor layer and the conformational active layer can be released with the recesses.

Abstract translation: 半导体发光器件包括衬底，缓冲层，n型半导体层，构象活性层和p型半导体层。 n型半导体层包括第一表面和第二表面，并且第一表面直接接触缓冲层。 第二表面具有多个凹部，以及形成在第二表面上和多个凹部内的构象活性层。 因此，可以用凹部来释放n型半导体层与构象活性层之间的应力。

公开(公告)号：US07943494B2

公开(公告)日：2011-05-17

申请号：US12579779

申请日：2009-10-15

Applicant: Peng Yi Wu ,  Shih Cheng Huang ,  Po Min Tu ,  Ying Chao Yeh ,  Wen Yu Lin ,  Shih Hsiung Chan

Inventor： Peng Yi Wu ,  Shih Cheng Huang ,  Po Min Tu ,  Ying Chao Yeh ,  Wen Yu Lin ,  Shih Hsiung Chan

IPC: H01L21/00 ,  H01L21/66 ,  H01L21/20 ,  H01L21/36

CPC classification number: H01L21/02521 ,  H01L21/0237 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/0265 ,  H01L33/007 ,  H01L33/12

Abstract: The present invention provides a method for blocking the dislocation propagation of a semiconductor. A semiconductor layer is formed by epitaxial process on a substrate. A plurality of recesses is formed on the semiconductor layer by etching fragile locations of the semiconductor layer where dislocation occurs. Thereafter, a blocking layer is formed on each of the plurality of recesses. The aforesaid semiconductor layer undergoes epitaxial process again on the aforesaid semiconductor layer, and laterally overgrows to redirect the dislocation defects.

Abstract translation: 本发明提供一种阻止半导体位错传播的方法。 在衬底上通过外延工艺形成半导体层。 通过蚀刻发生位错的半导体层的脆弱位置，在半导体层上形成多个凹部。 此后，在多个凹部中的每一个上形成阻挡层。 上述半导体层在上述半导体层上再次进行外延处理，并横向过度地重新定位位错缺陷。

公开(公告)号：US20100224900A1

公开(公告)日：2010-09-09

申请号：US12717671

申请日：2010-03-04

Applicant: PENG YI WU ,  SHIH CHENG HUANG ,  CHIH PANG MA ,  PO MIN TU ,  YING CHAO YEH ,  WEN YU LIN ,  SHIH HSIUNG CHAN

Inventor： PENG YI WU ,  SHIH CHENG HUANG ,  CHIH PANG MA ,  PO MIN TU ,  YING CHAO YEH ,  WEN YU LIN ,  SHIH HSIUNG CHAN

IPC: H01L33/44

CPC classification number: H01L33/20 ,  H01L33/0079 ,  H01L33/08 ,  H01L33/44

Abstract: A semiconductor optoelectronic device with enhanced light extraction efficiency includes a major luminescent area and a secondary luminescent area, wherein the major luminescent area is surrounded by a secondary luminescent area. The secondary luminescent area not only can improve the light extraction efficiency of the major luminescent area, but per se also can luminesce. In addition, one embodiment of the present invention provides a fabricating method for forming the secondary luminescent area.

Abstract translation: 具有增强的光提取效率的半导体光电子器件包括主发光区域和二次发光区域，其中主发光区域被二次发光区域包围。 二次发光区域不仅可以提高主要发光区域的光提取效率，而且本身也可以发光。 此外，本发明的一个实施例提供了形成二次发光区域的制造方法。

公开(公告)号：US20100032649A1

公开(公告)日：2010-02-11

申请号：US12536282

申请日：2009-08-05

Applicant: WEN YU LIN ,  SHIH CHENG HUANG ,  PO MIN TU ,  YING CHAO YEH ,  PENG YI WU ,  SHIH HSIUNG CHAN

Inventor： WEN YU LIN ,  SHIH CHENG HUANG ,  PO MIN TU ,  YING CHAO YEH ,  PENG YI WU ,  SHIH HSIUNG CHAN

IPC: H01L33/00

CPC classification number: H01L33/04 ,  H01L33/32

Abstract: A light emitting device (LED), in which a reduced polarization interlayer is formed between an electron blocking layer (EBL) and an active layer of the LED, is disclosed. The reduced polarization interlayer is made of AlxInyGa1-x-yN, where 0≦x≦1 and 0≦y≦1.

Abstract translation: 公开了一种在电子阻挡层（EBL）和LED的有源层之间形成减薄偏振中间层的发光器件（LED）。 减薄偏振中间层由Al x In y Ga 1-x-y N制成，其中0 <= x <= 1且0 <= y <= 1。

公开(公告)号：US08866161B2

公开(公告)日：2014-10-21

申请号：US13314186

申请日：2011-12-08

Applicant: Shih-Cheng Huang ,  Po-Min Tu ,  Ying-Chao Yeh ,  Wen-Yu Lin ,  Peng-Yi Wu ,  Shih-Hsiung Chan

Inventor： Shih-Cheng Huang ,  Po-Min Tu ,  Ying-Chao Yeh ,  Wen-Yu Lin ,  Peng-Yi Wu ,  Shih-Hsiung Chan

IPC: H01L29/06 ,  H01L27/15 ,  H01L21/02 ,  H01L33/00 ,  H01S5/323

CPC classification number: H01L21/0254 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/02656 ,  H01L33/007 ,  H01S5/32341 ,  H01S2301/173 ,  H01S2304/12

Abstract: A structure of semiconductor device includes a first semiconductor layer; an intermediate layer on a surface of said first semiconductor layer; a second semiconductor layer on said intermediate layer, wherein said intermediate layer and said second semiconductor layer are integrated to a set of sub-structures; and a semiconductor light emitting device on said second semiconductor layer.

Abstract translation: 半导体器件的结构包括第一半导体层; 在所述第一半导体层的表面上的中间层; 在所述中间层上的第二半导体层，其中所述中间层和所述第二半导体层被集成到一组子结构中; 以及在所述第二半导体层上的半导体发光器件。