Methods of fabricating trench type capacitors including protective layers for electrodes and capacitors so formed
    11.
    发明申请
    Methods of fabricating trench type capacitors including protective layers for electrodes and capacitors so formed 审中-公开
    制造沟槽型电容器的方法包括如此形成的用于电极和电容器的保护层

    公开(公告)号:US20060115950A1

    公开(公告)日:2006-06-01

    申请号:US11284678

    申请日:2005-11-22

    CPC classification number: H01L28/91 H01L21/3212

    Abstract: A method of forming a capacitor can include forming a protective layer on a metal layer in a trench in an insulating layer and outside thereof. A surface of the protective layer and the metal layer beneath can be planarized using a chemical mechanical polishing (CMP) process to expose a surface of the insulating layer outside the trench. Related structures are also disclosed.

    Abstract translation: 形成电容器的方法可以包括在绝缘层和其外部的沟槽中的金属层上形成保护层。 可以使用化学机械抛光(CMP)工艺将保护层的表面和下面的金属层平坦化,以使沟槽外部的绝缘层的表面露出。 还公开了相关结构。

    Platen structure of polishing apparatus for processing semiconductor wafer and method for exchanging polishing pad affixed to the same
    12.
    发明申请
    Platen structure of polishing apparatus for processing semiconductor wafer and method for exchanging polishing pad affixed to the same 有权
    用于处理半导体晶片的抛光装置的压板结构和用于更换固定在其上的抛光垫的方法

    公开(公告)号:US20060105686A1

    公开(公告)日:2006-05-18

    申请号:US11260902

    申请日:2005-10-28

    CPC classification number: B24B37/16

    Abstract: A platen structure of a polishing apparatus for semiconductor wafer and a method for exchanging a polishing pad affixed to the same are provided in which the polishing pad supported by the platen is exchanged with convenience within a short time. The platen structure of the polishing apparatus in which the polishing pad attached to the platen of the polishing apparatus comprises a pad plate to which the polishing pad for polishing a wafer is attached, and a platen body combined with the pad plate and having at least one vacuum hole formed thereto to provide a vacuum passage.

    Abstract translation: 提供了一种用于半导体晶片的抛光装置的压板结构和用于更换固定在其上的抛光垫的方法,其中在短时间内方便地更换由压板支撑的抛光垫。 抛光装置的压板结构,其中安装在抛光装置的压板上的抛光垫包括一个垫板,用于抛光晶片的抛光垫被安装到该垫板上,以及压板体与该焊盘板组合并具有至少一个 形成真空孔以提供真空通道。

    Polishing pad assembly, apparatus for polishing a wafer including the polishing pad assembly and method for polishing a wafer using the polishing pad assembly
    13.
    发明申请
    Polishing pad assembly, apparatus for polishing a wafer including the polishing pad assembly and method for polishing a wafer using the polishing pad assembly 审中-公开
    抛光垫组件,用于抛光包括抛光垫组件的晶片的设备和使用抛光垫组件抛光晶片的方法

    公开(公告)号:US20050272348A1

    公开(公告)日:2005-12-08

    申请号:US11122918

    申请日:2005-05-03

    CPC classification number: B24D7/14 B24B37/10 B24B37/20

    Abstract: An apparatus for polishing a wafer is provided. The apparatus comprises a polishing pad for polishing the wafer. The polishing pad is divided into multiple portions that are rotated in a substantially same direction. At least one of the portions of the polishing pad is adapted to rotate at a speed different than the other portions. A driving unit is also provided for moving the polishing pad. A polishing head is employed for maintaining the side of the wafer to be polished engaged with the polishing pad, for contacting the polished surface of the wafer with the polishing pad, and for rotating the wafer.

    Abstract translation: 提供了一种用于抛光晶片的设备。 该装置包括用于抛光晶片的抛光垫。 抛光垫被分成沿基本相同方向旋转的多个部分。 抛光垫的至少一部分适于以与其它部分不同的速度旋转。 还提供用于移动抛光垫的驱动单元。 采用抛光头来保持要抛光的晶片的侧面与抛光垫相接合,以使晶片的抛光表面与抛光垫接触,并使晶片转动。

    Method of forming a contact hole of a semiconductor device
    15.
    发明授权
    Method of forming a contact hole of a semiconductor device 有权
    形成半导体器件的接触孔的方法

    公开(公告)号:US06838330B2

    公开(公告)日:2005-01-04

    申请号:US10445843

    申请日:2003-05-28

    CPC classification number: H01L21/02063 H01L21/76897

    Abstract: A method of forming a contact hole of a semiconductor device that is able to prevent excessive etching of an interlayer dielectric pattern includes forming a gate pattern including a first insulation layer pattern, a conductive layer pattern, a capping insulation layer pattern, and a second insulation layer pattern on a substrate; forming a spacer using an insulating material on a sidewall of the gate pattern; forming an interlayer dielectric on the substrate on which the gate pattern and the spacer are formed; forming a contact hole and an interlayer dielectric pattern for exposing the substrate by etching the interlayer dielectric; forming a liner spacer on a sidewall of the spacer and the interlayer dielectric pattern; and cleaning the resultant structure using a cleaning solution. The cleaning solution preferably includes includes ozone water and hydrogen fluoride (HF).

    Abstract translation: 形成能够防止层间电介质图案的过度蚀刻的半导体器件的接触孔的方法包括形成包括第一绝缘层图案,导电层图案,封盖绝缘层图案和第二绝缘体的栅极图案 层图案; 在所述栅极图案的侧壁上使用绝缘材料形成间隔物; 在其上形成有栅极图案和间隔物的基板上形成层间电介质; 形成用于通过蚀刻所述层间电介质来暴露所述衬底的接触孔和层间电介质图案; 在间隔物的侧壁和层间介质图案上形成衬垫; 并使用清洁溶液清洗所得到的结构。 清洗液最好包括臭氧水和氟化氢(HF)。

    Methods for manufacturing semiconductor devices having chamfered metal silicide layers
    16.
    发明授权
    Methods for manufacturing semiconductor devices having chamfered metal silicide layers 有权
    具有倒角金属硅化物层的半导体器件的制造方法

    公开(公告)号:US06331478B1

    公开(公告)日:2001-12-18

    申请号:US09685456

    申请日:2000-10-09

    Abstract: Methods for manufacturing a semiconductor device, in which a chamfered metal silicide layer is formed by a 2-stage continuous wet etching process using different etchants, thereby resulting in a sufficient insulation margin between a lower conductive layer including the metal silicide layer and the contact plug self-aligned with the lower conductive layer are disclosed. In the manufacture of a semiconductor device, a mask pattern is formed on a metal silicide layer to expose a portion of the metal silicide layer. The exposed portion of the metal silicide layer is isotropically etched in a first etchant to form a metal silicide layer with a shallow groove, and defects due to the silicon remaining on the surface of the metal silicide layer with the shallow groove are removed using a second etchant, to form a metal silicide layer with a smooth surface. Microelectronic structures produced by methods of the present invention are also disclosed.

    Abstract translation: 制造半导体器件的方法,其中通过使用不同蚀刻剂的2阶段连续湿蚀刻工艺形成倒角金属硅化物层,从而在包括金属硅化物层的下导电层和接触插塞之间形成足够的绝缘边缘 公开了与下导电层自对准。 在半导体器件的制造中,在金属硅化物层上形成掩模图案以暴露金属硅化物层的一部分。 金属硅化物层的暴露部分在第一蚀刻剂中被各向同性地蚀刻以形成具有浅槽的金属硅化物层,并且由于在具有浅槽的金属硅化物层的表面上残留的硅的缺陷被使用第二 蚀刻剂,以形成具有光滑表面的金属硅化物层。 还公开了通过本发明的方法生产的微电子结构。

    Adjustable selectivity etching solutions and methods of etching
semiconductor devices using the same
    17.
    发明授权
    Adjustable selectivity etching solutions and methods of etching semiconductor devices using the same 失效
    可选择的蚀刻溶液和使用其的半导体器件的蚀刻方法

    公开(公告)号:US6117350A

    公开(公告)日:2000-09-12

    申请号:US684034

    申请日:1996-07-19

    CPC classification number: H01L21/02052 H01L21/31111

    Abstract: Solutions useful for etching semiconductor devices comprise ammonium fluoride, hydrofluoric acid, hydrogen peroxide, and water. Processes for forming the solutions comprise mixing first solutions which comprise ammonium fluoride, hydrofluoric acid, and water with second solutions which comprise hydrogen peroxide and water to form the solutions of the invention. Methods for etching semiconductor devices comprise contacting the devices which comprise a substrate and oxide layer thereon with the solutions of the invention to etch the devices. The oxide layer, for example a damaged silicon oxide layer on a silicon substrate, is selectively etched to the substrate.

    Abstract translation: 用于蚀刻半导体器件的解决方案包括氟化铵,氢氟酸,过氧化氢和水。 用于形成溶液的方法包括将包含氟化铵,氢氟酸和水的第一溶液与包含过氧化氢和水的第二溶液混合以形成本发明的溶液。 蚀刻半导体器件的方法包括将包括衬底和氧化物层的器件与本发明的溶液接触以蚀刻器件。 氧化物层,例如硅衬底上的损坏的氧化硅层被选择性地蚀刻到衬底上。

    Chemical mechanical polishing method
    19.
    发明授权
    Chemical mechanical polishing method 有权
    化学机械抛光方法

    公开(公告)号:US08592315B2

    公开(公告)日:2013-11-26

    申请号:US12711344

    申请日:2010-02-24

    CPC classification number: H01L21/76819 C09G1/02 H01L21/31053

    Abstract: In an embodiment, a chemical mechanical polishing method for a substrate having a first layer and a stepped portion. A surface of the first layer is positioned above an upper face of the stepped portion. A polishing process for selectively removing the stepped portion is performed on the first layer by using a first slurry composition that has a self-stopping characteristic so that the first layer is changed into a second layer having a substantially flat surface. A second polishing process is performed using a second slurry composition that does not have the self-stopping characteristic, until the upper face of the stepped portion is exposed.

    Abstract translation: 在一个实施方案中,一种用于具有第一层和阶梯部分的基材的化学机械抛光方法。 第一层的表面位于台阶部的上表面的上方。 通过使用具有自停特性的第一浆料组合物在第一层上进行用于选择性去除台阶部分的抛光工艺,使得第一层变成具有基本平坦表面的第二层。 使用不具有自停特性的第二浆料组合物进行第二抛光处理,直到阶梯部分的上表面露出。

    Electrode structure and method of manufacturing the same, phase-change memory device having the electrode structure and method of manufacturing the same
    20.
    发明授权
    Electrode structure and method of manufacturing the same, phase-change memory device having the electrode structure and method of manufacturing the same 失效
    电极结构及其制造方法,具有电极结构的相变存储器件及其制造方法

    公开(公告)号:US07589013B2

    公开(公告)日:2009-09-15

    申请号:US11484676

    申请日:2006-07-12

    Abstract: Example embodiments of the present invention relate to an electrode structure, a method of manufacturing the electrode structure, a phase-change memory device having the electrode structure and a method of manufacturing the phase-change memory device. The electrode structure may include a pad, a first insulation layer pattern, a second insulation layer pattern and/or an electrode. The first insulation layer pattern may be formed on the pad. The first insulation layer pattern may have a first opening that partially exposes the pad. The second insulation layer pattern may be formed on the first insulation layer pattern. The second insulation layer pattern may have a second opening connected to the first opening. The electrode may be formed on the pad and filling the first and the second openings.

    Abstract translation: 本发明的示例性实施例涉及电极结构,制造电极结构的方法,具有电极结构的相变存储器件和制造相变存储器件的方法。 电极结构可以包括焊盘,第一绝缘层图案,第二绝缘层图案和/或电极。 第一绝缘层图案可以形成在垫上。 第一绝缘层图案可以具有部分地暴露垫的第一开口。 第二绝缘层图案可以形成在第一绝缘层图案上。 第二绝缘层图案可以具有连接到第一开口的第二开口。 电极可以形成在垫上并填充第一和第二开口。

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