公开(公告)号：US10283353B2

公开(公告)日：2019-05-07

申请号：US15472750

申请日：2017-03-29

Applicant: ASM IP Holding B.V. ,  National University Corporation Nagoya University

Inventor： Akiko Kobayashi ,  Masaru Zaitsu ,  Nobuyoshi Kobayashi ,  Masaru Hori

IPC: H01L21/3105 ,  H01L21/02 ,  H01L21/033

Abstract: A method of reforming an insulating film deposited on a substrate having a recess pattern constituted by a bottom and sidewalls, includes: providing the film deposited on the substrate having the recess pattern in an evacuatable reaction chamber, wherein a property of a portion of the film deposited on the sidewalls is inferior to that of a portion of the film deposited on a top surface of the substrate; adjusting a pressure of an atmosphere of the reaction chamber to 10 Pa or less, which atmosphere is constituted by H2 and/or He without a precursor and without a reactant; and applying RF power to the atmosphere of the pressure-adjusted reaction chamber to generate a plasma to which the film is exposed, thereby reforming the portion of the film deposited on the sidewalls to improve the property of the sidewall portion of the film.

公开(公告)号：US20180350620A1

公开(公告)日：2018-12-06

申请号：US15987755

申请日：2018-05-23

Applicant: ASM IP Holding B.V.

Inventor： Masaru Zaitsu ,  Nobuyoshi Kobayashi ,  Akiko Kobayashi ,  Masaru Hori ,  Takayoshi Tsutsumi

IPC: H01L21/311 ,  H01L21/3213 ,  H01L21/02

Abstract: A method for etching a target layer on a substrate by a dry etching process includes at least one etching cycle, wherein an etching cycle includes: depositing a carbon halide film using reactive species on the target layer on the substrate; and etching the carbon halide film using a plasma of a non-halogen hydrogen-containing etching gas, which plasma alone does not substantially etch the target layer, thereby generating a hydrogen halide as etchant species at a boundary region of the carbon halide film and the target layer, thereby etching a portion of the target layer in the boundary region.

公开(公告)号：US09793135B1

公开(公告)日：2017-10-17

申请号：US15210256

申请日：2016-07-14

Applicant: ASM IP Holding B.V. ,  National University Corporation Nagoya University

Inventor： Masaru Zaitsu ,  Nobuyoshi Kobayashi ,  Akiko Kobayashi ,  Masaru Hori ,  Hiroki Kondo ,  Takayoshi Tsutsumi

IPC: H01L21/311 ,  H01L21/02

CPC classification number: H01L21/31116 ,  H01L21/02118 ,  H01L21/0212 ,  H01L21/02274

Abstract: A method for etching a target layer on a substrate by a dry etching process includes at least one etching cycle, wherein an etching cycle includes: depositing a halogen-containing film using reactive species on the target layer on the substrate; and etching the halogen-containing film using a plasma of a non-halogen etching gas, which plasma alone does not substantially etch the target layer, to generate etchant species at a boundary region of the halogen-containing film and the target layer, thereby etching a portion of the target layer in the boundary region.

公开(公告)号：US12027365B2

公开(公告)日：2024-07-02

申请号：US17530983

申请日：2021-11-19

Applicant: ASM IP Holding B.V.

Inventor： Zecheng Liu ,  Sunja Kim ,  Viljami Pore ,  Jia Li Yao ,  Ranjit Borude ,  Bablu Mukherjee ,  René Henricus Jozef Vervuurt ,  Takayoshi Tsutsumi ,  Nobuyoshi Kobayashi ,  Masaru Hori

IPC: H01L21/02 ,  C23C16/02 ,  C23C16/40 ,  C23C16/455 ,  H01J37/32 ,  H01L21/762

CPC classification number: H01L21/02315 ,  C23C16/0254 ,  C23C16/401 ,  C23C16/45536 ,  C23C16/45553 ,  H01J37/3244 ,  H01J37/32724 ,  H01L21/02164 ,  H01L21/02219 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/76224 ,  H01J37/32082 ,  H01J2237/332

Abstract: Methods and related systems for filling a gap feature comprised in a substrate are disclosed. The methods comprise a step of providing a substrate comprising one or more gap features into a reaction chamber. The one or more gap features comprise an upper part comprising an upper surface and a lower part comprising a lower surface. The methods further comprise a step of subjecting the substrate to a plasma treatment. Thus, the upper surface is inhibited while leaving the lower surface substantially unaffected. Then, the methods comprise a step of selectively depositing a silicon-containing material on the lower surface.

公开(公告)号：US20230386792A1

公开(公告)日：2023-11-30

申请号：US18143652

申请日：2023-05-05

Applicant: ASM IP Holding B.V.

Inventor： Bablu Mukherjee ,  René Henricus Jozef Vervuurt ,  Takayoshi Tsutsumi ,  Nobuyoshi Kobayashi ,  Masaru Hori

IPC: H01J37/32 ,  H01L21/311

CPC classification number: H01J37/32357 ,  H01L21/31116 ,  H01J2237/334

Abstract: The current disclosure relates to methods of selectively etching material from a first surface of a substrate relative to a second surface of the substrate. The method includes providing the substrate having a first surface comprising an etchable material, and a second surface comprising a non-etchable material in a reaction chamber, providing hydrogen-containing plasma into the reaction chamber to reduce the etchable material to a predetermined depth; and providing remotely-generated reactive halogen species and hydrogen into the reaction chamber to selectively etch the reduced etchable material. The disclosure further relates to methods of selectively etching at least two different etchable materials simultaneously from a surface of a substrate relative to a non-etchable material on the same substrate, to methods of simultaneous differential etching of three or more etchable materials on a substrate, as well as to assemblies for processing semiconductor substrates.

公开(公告)号：US20220165569A1

公开(公告)日：2022-05-26

申请号：US17530983

申请日：2021-11-19

Applicant: ASM IP Holding B.V.

Inventor： Zecheng Liu ,  Sunja Kim ,  Viljami Pore ,  Jia Li Yao ,  Ranjit Borude ,  Bablu Mukherjee ,  René Henricus Jozef Vervuurt ,  Takayoshi Tsutsumi ,  Nobuyoshi Kobayashi ,  Masaru Hori

IPC: H01L21/02 ,  H01L21/762 ,  H01J37/32 ,  C23C16/40 ,  C23C16/02 ,  C23C16/455

Abstract: Methods and related systems for filling a gap feature comprised in a substrate are disclosed. The methods comprise a step of providing a substrate comprising one or more gap features into a reaction chamber. The one or more gap features comprise an upper part comprising an upper surface and a lower part comprising a lower surface. The methods further comprise a step of subjecting the substrate to a plasma treatment. Thus, the upper surface is inhibited while leaving the lower surface substantially unaffected. Then, the methods comprise a step of selectively depositing a silicon-containing material on the lower surface.

公开(公告)号：US20200027746A1

公开(公告)日：2020-01-23

申请号：US16040859

申请日：2018-07-20

Applicant: ASM IP Holding B.V.

Inventor： Rene Henricus Jozef Vervuurt ,  Nobuyoshi Kobayashi ,  Takayoshi Tsutsumi ,  Masaru Hori

IPC: H01L21/311 ,  H01L21/02

Abstract: An etching process is provided that includes a pre-clean process to remove a surface oxide of a dielectric material. The removal of the oxide can be executed through a thermal reaction and/or plasma process before the etch process. In some embodiments, the removal of the oxide increases etch process control and reproducibility and can improve the selectivity versus oxides.