Closed-loop digital power control for a wireless transmitter
    11.
    发明授权
    Closed-loop digital power control for a wireless transmitter 有权
    无线发射机的闭环数字功率控制

    公开(公告)号:US08509290B2

    公开(公告)日:2013-08-13

    申请号:US12520448

    申请日:2007-12-21

    IPC分类号: H04B1/38

    CPC分类号: H03G3/3047 H04B2001/0416

    摘要: A closed loop power output calibration system for variable power output wireless devices. The wireless device includes a wireless transceiver having a transmit core coupled to a discrete power amplifier. Power detection circuitry formed in the wireless transceiver provides a detected power level of the power amplifier, and a reference power level, both of which are converted to digital signals using existing I and Q signal analog to digital converters in the receiver core. The digital signals are processed to cancel power distortion and temperature effects to provide a resulting power feedback signal. Corrective control signals are generated in response to the power feedback signal relative to a desired power output level. The gain in the transmit core is then adjusted in response to the corrective control signals such that the power amplifier outputs the target output power level.

    摘要翻译: 一种用于可变功率输出无线设备的闭环功率输出校准系统。 无线设备包括具有耦合到分立功率放大器的发射芯的无线收发器。 在无线收发器中形成的功率检测电路提供功率放大器的检测功率电平和参考功率电平,两者都使用接收机核心中现有的I和Q信号模数转换器转换成数字信号。 处理数字信号以消除功率失真和温度影响,以提供最终的功率反馈信号。 响应于功率反馈信号相对于期望的功率输出电平产生校正控制信号。 然后响应于校正控制信号调整发送内核中的增益,使得功率放大器输出目标输出功率电平。

    DIGITAL LINEAR TRANSMITTER ARCHITECTURE
    12.
    发明申请
    DIGITAL LINEAR TRANSMITTER ARCHITECTURE 有权
    数字线性发射机架构

    公开(公告)号:US20100027711A1

    公开(公告)日:2010-02-04

    申请号:US12520486

    申请日:2007-12-14

    IPC分类号: H04L27/00 H03M1/66

    摘要: A digital linear transmitter for digital to analog conversion of a radio frequency signal. The transmitter includes a delta sigma (ΔΣ) digital to analog converter (DAC) and a weighted signal digital to analog converter in the transmit path of a wireless device to reduce reliance on relatively large analog components. The ΔΣ DAC converts the lowest significant bits of the oversampled signal while the weighted signal digital to analog converter converts the highest significant bits of the oversampled signal. The transmitter core includes components for providing an oversampled modulated digital signal which is then subjected to first order filtering of the oversampled signal prior to generating a corresponding analog signal. The apparatus and method reduces analog components and increases digital components in transmitter core architecture of wireless RF devices.

    摘要翻译: 一种用于数字到模拟转换射频信号的数字线性发射机。 发射机在无线设备的发射路径中包括Δ西格玛(DeltaSigma)数模转换器(DAC)和加权信号数模转换器,以减少对相对大的模拟组件的依赖。 DeltaSigma DAC转换过采样信号的最低有效位,而加权信号数模转换器转换过采样信号的最高有效位。 发射机核心包括用于提供过采样的调制数字信号的组件,然后在产生相应的模拟信号之前对过采样信号进行一阶滤波。 该装置和方法减少了模拟组件并增加了无线RF设备的发射机核心架构中的数字组件。

    CLOSED-LOOP DIGITAL POWER CONTROL FOR A WIRELESS TRANSMITTER
    13.
    发明申请
    CLOSED-LOOP DIGITAL POWER CONTROL FOR A WIRELESS TRANSMITTER 有权
    无线发射机闭环数字功率控制

    公开(公告)号:US20100027596A1

    公开(公告)日:2010-02-04

    申请号:US12520448

    申请日:2007-12-21

    IPC分类号: H04B1/38

    CPC分类号: H03G3/3047 H04B2001/0416

    摘要: A closed loop power output calibration system for variable power output wireless devices. The wireless device includes a wireless transceiver having a transmit core coupled to a discrete power amplifier. Power detection circuitry formed in the wireless transceiver provides a detected power level of the power amplifier, and a reference power level, both of which are converted to digital signals using existing I and Q signal analog to digital converters in the receiver core. The digital signals are processed to cancel power distortion and temperature effects to provide a resulting power feedback signal. Corrective control signals are generated in response to the power feedback signal relative to a desired power output level. The gain in the transmit core is then adjusted in response to the corrective control signals such that the power amplifier outputs the target output power level.

    摘要翻译: 一种用于可变功率输出无线设备的闭环功率输出校准系统。 无线设备包括具有耦合到分立功率放大器的发射芯的无线收发器。 在无线收发器中形成的功率检测电路提供功率放大器的检测功率电平和参考功率电平,两者都使用接收机核心中现有的I和Q信号模数转换器转换成数字信号。 处理数字信号以消除功率失真和温度影响,以提供最终的功率反馈信号。 响应于功率反馈信号相对于期望的功率输出电平产生校正控制信号。 然后响应于校正控制信号调整发送内核中的增益,使得功率放大器输出目标输出功率电平。

    Method and system for calibrating a frequency synthesizer
    14.
    发明授权
    Method and system for calibrating a frequency synthesizer 有权
    用于校准频率合成器的方法和系统

    公开(公告)号:US08836434B2

    公开(公告)日:2014-09-16

    申请号:US13062583

    申请日:2009-09-08

    摘要: A digital frequency synthesizer with an automatic calibration system. The digital frequency synthesizer is calibrated by initiating a coarse tuning operation to rapidly reach a preliminary frequency that is proximate to the desired final frequency. A calibration procedure is then executed for adjusting gain in the frequency synthesizer based on the preliminary frequency. This test involves applying one or more test signals to the frequency synthesizer and measuring a signal generated in the frequency synthesizer. This measured signal corresponds to a gain response of the circuit at the preliminary frequency. When the expected gain is known, any difference relative to the gain of the measured signal is used to adjust the gain in a circuit of the frequency synthesizer such that the actual gain substantially matches the expected gain.

    摘要翻译: 具有自动校准系统的数字频率合成器。 数字频率合成器通过启动粗略调谐操作来校准,以快速达到接近期望最终频率的初步频率。 然后根据初步频率执行校准程序,以调整频率合成器中的增益。 该测试涉及将一个或多个测试信号应用于频率合成器并测量在频率合成器中产生的信号。 该测量信号对应于初始频率处电路的增益响应。 当预期增益是已知的时,使用相对于测量信号的增益的任何差异来调整频率合成器的电路中的增益,使得实际增益基本上与预期的增益相匹配。

    METHOD AND SYSTEM FOR CALIBRATING A FREQUENCY SYNTHESIZER
    15.
    发明申请
    METHOD AND SYSTEM FOR CALIBRATING A FREQUENCY SYNTHESIZER 有权
    用于校准频率合成器的方法和系统

    公开(公告)号:US20110163815A1

    公开(公告)日:2011-07-07

    申请号:US13062583

    申请日:2009-09-08

    IPC分类号: H03L7/099 H03L7/18

    摘要: A digital frequency synthesizer with an automatic calibration system. The digital frequency synthesizer is calibrated by initiating a coarse tuning operation to rapidly reach a preliminary frequency that is proximate to the desired final frequency. A calibration procedure is then executed for adjusting gain in the frequency synthesizer based on the preliminary frequency. This test involves applying one or more test signals to the frequency synthesizer and measuring a signal generated in the frequency synthesizer. This measured signal corresponds to a gain response of the circuit at the preliminary frequency. When the expected gain is known, any difference relative to the gain of the measured signal is used to adjust the gain in a circuit of the frequency synthesizer such that the actual gain substantially matches the expected gain.

    摘要翻译: 具有自动校准系统的数字频率合成器。 数字频率合成器通过启动粗略调谐操作来校准,以快速达到接近期望最终频率的初步频率。 然后根据初步频率执行校准程序,以调整频率合成器中的增益。 该测试涉及将一个或多个测试信号应用于频率合成器并测量在频率合成器中产生的信号。 该测量信号对应于初始频率处电路的增益响应。 当预期增益是已知的时,使用相对于测量信号的增益的任何差异来调整频率合成器的电路中的增益,使得实际增益基本上与预期的增益相匹配。

    System for reducing second order intermodulation products from differential circuits
    16.
    发明申请
    System for reducing second order intermodulation products from differential circuits 有权
    用于从差分电路减少二阶互调产物的系统

    公开(公告)号:US20070132500A1

    公开(公告)日:2007-06-14

    申请号:US11298667

    申请日:2005-12-12

    IPC分类号: G06F7/44

    摘要: A passive CMOS differential mixer circuit with a mismatch correction circuit for balancing the electrical characteristics of the two output paths. Once the output paths of the differential circuit are balanced, or matched as closely as possible, second order intermodulation product generation can be inhibited or at least reduced to acceptable levels. The mismatch correction circuit receives a digital offset signal, and generates one or more voltage signals to be selectively applied to the signal paths of the passive differential mixer circuit. The voltage signals can be adjusted back gate bias voltages applied to the bulk terminals of selected transistors to adjust their threshold voltages, or the voltage signals can be adjusted common mode voltages applied directly to a selected signal path. Since the differential mixer circuit is passive, no DC current contribution to noise is generated. The switching transistors of the mixer circuit can be maintained at minimal dimensions to reduce switching signal drive loading, resulting in lower power consumption and higher operating frequencies than if larger switching transistors were used.

    摘要翻译: 一种具有用于平衡两个输出路径的电气特性的失配校正电路的无源CMOS差分混频器电路。 一旦差分电路的输出路径平衡或尽可能匹配,可以抑制二阶互调乘积的产生或至少降低到可接受的水平。 失配校正电路接收数字偏移信号,并产生一个或多个电压信号以选择性地施加到无源差分混频器电路的信号路径。 电压信号可以调节施加到所选晶体管的体积端子的反向栅极偏置电压以调整其阈值电压,或者可以将电压信号调整为直接施加到选定信号路径的共模电压。 由于差分混频器电路是无源的,所以不产生直流电流对噪声的贡献。 混合电路的开关晶体管可以维持在最小的尺寸以减少开关信号驱动负载,导致比使用更大的开关晶体管时更低的功耗和更高的工作频率。

    Method and apparatus for reducing leakage in a direct conversion transmitter
    17.
    发明申请
    Method and apparatus for reducing leakage in a direct conversion transmitter 有权
    用于减少直接变换发射机泄漏的方法和装置

    公开(公告)号:US20050070238A1

    公开(公告)日:2005-03-31

    申请号:US10833908

    申请日:2004-04-28

    IPC分类号: H04B1/04 H04B1/30 H04B1/18

    CPC分类号: H04B1/30 H04B1/0475

    摘要: Methods and apparatus for reducing the amount of leakage in a transmitter are disclosed. In one embodiment, a wireless transmitter is comprises: a divider providing a local oscillation (LO) signal, a plurality of mixers that receive the LO signal and receive a signal to be modulated, a summer coupled to the plurality of mixers, and a plurality of amplifiers serially coupled to the summer. The divider couples to a capacitor, a resistor, and a power supply and the resistor and the capacitor form a pole that attenuates the LO signal present on the power supply.

    摘要翻译: 公开了减少发射机泄漏量的方法和装置。 在一个实施例中,无线发射机包括:提供本地振荡(LO)信号的分频器,接收所述LO信号并接收待调制的信号的多个混频器,耦合到所述多个混频器的加法器,以及多个 的放大器串联耦合到夏天。 分压器耦合到电容器,电阻器和电源,电阻器和电容器形成一个极点,可以衰减电源上存在的LO信号。

    Low supply regulator having a high power supply rejection ratio
    18.
    发明授权
    Low supply regulator having a high power supply rejection ratio 有权
    低电源调节器具有高电源抑制比

    公开(公告)号:US08669754B2

    公开(公告)日:2014-03-11

    申请号:US13081239

    申请日:2011-04-06

    IPC分类号: G05F3/16

    CPC分类号: H04B15/06

    摘要: A power supply noise rejection circuit for functional circuits, such as a voltage controlled oscillator (VCO). The power supply noise rejection circuit includes an isolation transistor connected to a voltage supply for providing an output current and voltage substantially free of noise across the full frequency range. A current source, a diode connected reference transistor with resistance means connected between its gate and drain terminals, and a dummy circuit serially connected between the voltage supply and ground generate a bias voltage that is applied to the gate of the isolation transistor. The dummy circuit mimics the DC characteristics of the functional circuit such that the output current tracks with process and temperature variations. The isolation transistor and the reference transistor can have negative threshold voltages, and the circuit can include bleed means for drawing current from the gate of the reference transistor and isolation transistor.

    摘要翻译: 用于诸如压控振荡器(VCO)的功能电路的电源噪声抑制电路。 电源噪声抑制电路包括连接到电压源的隔离晶体管,用于在整个频率范围内提供基本上没有噪声的输出电流和电压。 电流源,二极管连接的参考晶体管,其电阻装置连接在其栅极和漏极端子之间,并且串联连接在电压源和地之间的虚拟电路产生施加到隔离晶体管的栅极的偏置电压。 虚拟电路模拟功能电路的DC特性,使得输出电流跟踪过程和温度变化。 隔离晶体管和参考晶体管可以具有负阈值电压,并且该电路可以包括用于从参考晶体管和隔离晶体管的栅极引出电流的放电装置。

    Wireless communication system with variable intermediate frequency transmitter
    19.
    发明授权
    Wireless communication system with variable intermediate frequency transmitter 有权
    具有可变中频发射机的无线通信系统

    公开(公告)号:US07359684B2

    公开(公告)日:2008-04-15

    申请号:US10012869

    申请日:2001-11-06

    摘要: A wireless communication device (UST), comprising an input for receiving baseband data (I, Q) in a first signal having a first frequency. The device also comprises circuitry (681, 682) for increasing the first frequency, to form a second signal having a second frequency, in response to a first frequency reference signal (IF2), and the device comprises circuitry (74) for increasing the second frequency, to form a third signal having a third frequency, in response to a second frequency reference signal (LO2). Lastly, the device comprises an antenna (ATU2) for transmitting the baseband data at a final transmission frequency selected as a band within a predetermined set of frequency bands. With reference to the preceding, the first frequency reference signal and the second frequency reference signal are variable and are selected in response to the final transmission frequency which is a particular band selected as a different band at different times and from the predetermined set of frequency bands.

    摘要翻译: 一种无线通信设备(UST),包括用于在具有第一频率的第一信号中接收基带数据(I,Q)的输入。 该装置还包括用于增加第一频率的电路(68 1,68 2 2),以响应于第一频率参考信号形成具有第二频率的第二信号 (IF 2 2),并且该装置包括用于响应于第二频率参考信号(LO 2)而增加第二频率以形成具有第三频率的第三信号的电路(74) )。 最后,该设备包括用于以选定为预定频带组内的频带的最终传输频率发送基带数据的天线(ATU 2)。 参考前述,第一频率参考信号和第二频率参考信号是可变的,并且是响应于作为在不同时间被选择为不同频带的特定频带的最终发射频率和从预定频带组中​​选择的 。

    Digital detection of blockers for wireless receiver
    20.
    发明申请
    Digital detection of blockers for wireless receiver 有权
    无线接收机阻塞器的数字检测

    公开(公告)号:US20060055579A1

    公开(公告)日:2006-03-16

    申请号:US11203717

    申请日:2005-08-15

    IPC分类号: H03M1/12

    CPC分类号: H03M3/36 H03M3/486 H03M3/49

    摘要: A receiver 100 is provided. The receiver 100 comprises an in-phase analog-to-digital converter 112 operable to detect a saturation condition of the in-phase analog-to-digital converter 112 and to adjust the amplitude of a in-phase signal processed by the in-phase analog-to-digital converter 112 to remove the in-phase analog-to-digital converter 112 from the saturation condition and a in-phase digital filter 114 operable to adjust a gain applied to a digital input to the in-phase digital filter 114 from the in-phase analog-to-digital converter 112, the adjustment of the gain substantially inversely proportional to the adjustment of the amplitude of the in-phase signal processed by the in-phase analog-to-digital converter 112. In an embodiment, the receiver 100 also comprises a quadrature path that is substantially similar to the in-phase path, and the in-phase path and the quadrature path comprise a direct conversion receiver. In an embodiment, the in-phase analog-to-digital converter 112 and the in-phase digital filter 114 comprise an intermediate frequency receiver.

    摘要翻译: 提供接收器100。 接收器100包括同相模拟数字转换器112,其可操作以检测同相模数转换器112的饱和状态,并调整由同相模数转换器112处理的同相信号的振幅 模数转换器112以从饱和状态除去同相模数转换器112;以及同相数字滤波器114,其可操作以调整施加到同相数字滤波器114的数字输入的增益 来自同相模数转换器112的增益基本上与由同相模数转换器112处理的同相信号的振幅的调整成反比地成比例。在一个实施例中 接收器100还包括基本上类似于同相路径的正交路径,并且同相路径和正交路径包括直接转换接收器。 在一个实施例中,同相模数转换器112和同相数字滤波器114包括中频接收器。