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    Extinction ratio improvements in silicon photonics
    11.
    发明授权
    Extinction ratio improvements in silicon photonics 有权

    公开(公告)号：US10686527B2

    公开(公告)日：2020-06-16

    申请号：US16700722

    申请日：2019-12-02

    Applicant: Cisco Technology, Inc.

    Inventor： Sean P. Anderson ,  Mark A. Webster

    IPC: H04B10/50 ,  G02F1/225 ,  H04B10/073 ,  H04B10/54 ,  G02F1/313 ,  H04Q11/00

    Abstract: Improvements in extinguishing optical signals in silicon photonics may be achieved by supplying a test signal of a known characteristics to a Photonic Element (PE) to extinguish the test signal via a first phase shifter and intensity modulator on a first arm of the PE and a second phase shifter and intensity modulator on a second arm of the PE; sweeping through a plurality of voltages at the first intensity modulator to identify a first voltage that is associated with an extinction ratio at an output of the PE that satisfies an induced loss threshold and a second voltage that is associated with an induced loss in the test signal at the output of the PE that satisfies an extinction ratio threshold; and setting the PE to provide an operational voltage to the first intensity modulator based on the first voltage and the second voltage.

    Wafer level optical probing structures for silicon photonics
    12.
    发明授权
    Wafer level optical probing structures for silicon photonics 有权

    公开(公告)号：US10145758B2

    公开(公告)日：2018-12-04

    申请号：US15582306

    申请日：2017-04-28

    Applicant: Cisco Technology, Inc.

    Inventor： Matthew J. Traverso ,  Ravi S. Tummidi ,  Mark A. Webster ,  Sandeep Razdan

    IPC: G01N21/00 ,  G01M11/00 ,  G02B6/12 ,  G02B6/13 ,  G02B6/122

    Abstract: Embodiments herein describe techniques for testing optical components in a photonic chip using a testing structure disposed in a sacrificial region of a wafer. In one embodiment, the wafer is processed to form multiple photonic chips integrated into the wafer. While forming optical components in the photonic chips (e.g., modulators, detectors, waveguides, etc.), a testing structure can be formed in one or more sacrificial regions in the wafer. In one embodiment, the testing structure is arranged near an edge coupler in the photonic chip such that an optical signal can be transferred between the photonic chip and the testing structure. Moreover, the testing structure has a grating coupler disposed at or near a top surface of the wafer which permits optical signals to be transmitted into, or received from, the grating coupler when an optical probe is arranged above the grating coupler.

    Integrated decoupling capacitors
    14.
    发明授权
    Integrated decoupling capacitors 有权

    公开(公告)号：US11810877B2

    公开(公告)日：2023-11-07

    申请号：US17454937

    申请日：2021-11-15

    Applicant: Cisco Technology, Inc.

    Inventor： Vipulkumar K. Patel ,  Mark A. Webster ,  Craig S. Appel

    IPC: H01L23/64 ,  H01L23/00 ,  H01L23/522 ,  H01L21/20 ,  G02B6/122 ,  G02B6/12 ,  G02B6/30

    CPC classification number: H01L24/01 ,  H01L21/2007 ,  H01L23/5222 ,  G02B6/1225 ,  G02B6/305 ,  G02B2006/12061

    Abstract: Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.

    Integrated broadband optical couplers with robustness to manufacturing variation
    18.
    发明授权
    Integrated broadband optical couplers with robustness to manufacturing variation 有权

    公开(公告)号：US11520106B2

    公开(公告)日：2022-12-06

    申请号：US17187477

    申请日：2021-02-26

    Applicant: Cisco Technology, Inc.

    Inventor： Yi Ho Lee ,  Tao Ling ,  Ravi S. Tummidi ,  Mark A. Webster

    IPC: G02B6/28 ,  H04B10/25 ,  H04J14/02

    Abstract: An optical device is disclosed, including a phase delay, a first adiabatic coupler adapted to receive an input signal and adapted to be optically coupled to an input of the phase delay, and a second adiabatic coupler adapted to be optically coupled to an output of the phase delay. The second adiabatic coupler includes a first waveguide including a first portion optically coupled to the first output and including a first width, and a second waveguide including a second portion optically coupled to the second output and including a second width that is approximately equal to the first width.

    Silicon photonics platform with integrated oxide trench edge coupler structure
    19.
    发明授权
    Silicon photonics platform with integrated oxide trench edge coupler structure 有权

    公开(公告)号：US11480730B2

    公开(公告)日：2022-10-25

    申请号：US17304227

    申请日：2021-06-16

    Applicant: Cisco Technology, Inc.

    Inventor： Alexey V. Vert ,  Vipulkumar K. Patel ,  Mark A. Webster

    IPC: G02B6/122 ,  G02B6/12 ,  G02B6/136 ,  G02B6/293 ,  G02B6/30

    Abstract: A method includes defining a first waveguide in a first region of an optical device over a first dielectric layer over a silicon on insulator (SOI) substrate of the optical device and disposing a second dielectric layer on the first waveguide and the first dielectric layer of the optical device. The method also includes defining a second region on the second dielectric layer, the first dielectric layer, and the SOI substrate. The second region includes an integrated trench structure defined in the SOI substrate. The method further includes etching the second region to form an etched second region, disposing a third dielectric layer in the etched second region, and disposing a second waveguide on at least the third dielectric layer. The second waveguide is disposed to provide an optical coupling between the second waveguide and the first waveguide.

    Broadband optical coupling using dispersive elements
    20.
    发明授权
    Broadband optical coupling using dispersive elements 有权

    公开(公告)号：US11366270B2

    公开(公告)日：2022-06-21

    申请号：US16864104

    申请日：2020-04-30

    Applicant: Cisco Technology, Inc.

    Inventor： Shiyi Chen ,  Tao Ling ,  Weizhuo Li ,  Mark A. Webster

    IPC: G02B6/293 ,  G02B6/30 ,  G02B6/122 ,  G02B6/02 ,  G02B6/35 ,  G02B6/12 ,  G02B6/42

    Abstract: Embodiments include a fiber to photonic chip coupling system including a collimating lens which collimate a light transmitted from a light source and an optical grating including a plurality of grating sections. The system also includes an optical dispersion element which separates the collimated light from the collimating lens into a plurality of light beams and direct each of the plurality of light beams to a respective section of the plurality of grating sections. Each light beam in the plurality of light beams is diffracted from the optical dispersion element at a different wavelength a light beam of the plurality of light beams is directed to a respective section of the plurality of grating sections at a respective incidence angle based on the wavelength of the light beam of the plurality of light beams to provide optimum grating coupling.

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