Method for fabricating complementary metal oxide semiconductor (CMOS) devices on a mixed bulk and silicon-on-insulator (SOI) substrate
    11.
    发明授权
    Method for fabricating complementary metal oxide semiconductor (CMOS) devices on a mixed bulk and silicon-on-insulator (SOI) substrate 失效
    在混合体和绝缘体上硅(SOI))衬底上制造互补金属氧化物半导体(CMOS)器件的方法

    公开(公告)号:US06214653B1

    公开(公告)日:2001-04-10

    申请号:US09325732

    申请日:1999-06-04

    IPC分类号: H01L2100

    摘要: A method of forming a semiconductor substrate (and the resulting structure), includes etching a groove into a bulk silicon substrate, forming a dielectric in the groove and planarizing the silicon substrate to form at least one patterned dielectric island in the silicon substrate, forming an amorphous silicon (or SiGe) layer on exposed portions of the silicon substrate and the at least one dielectric island, crystallizing the amorphous silicon (or SiGe) layer using the exposed silicon substrate as a seed, the silicon substrate having direct contact with the formed silicon layer serving as a crystal growth seeding for the crystallization process, and converting the silicon (or SiGe) layer to crystallized silicon, and performing a shallow trench isolation (STI) process, to form oxide isolations between devices.

    摘要翻译: 一种形成半导体衬底的方法(以及所得到的结构)包括将槽蚀刻到体硅衬底中,在沟槽中形成电介质并平坦化硅衬底,以在硅衬底中形成至少一个图案化的电介质岛,形成 在硅衬底和至少一个电介质岛的暴露部分上的非晶硅(或SiGe)层,使用暴露的硅衬底作为晶种使非晶硅(或SiGe)层结晶,硅衬底与所形成的硅直接接触 作为用于晶化过程的晶体生长晶种,并且将硅(或SiGe)层转化为结晶硅,并进行浅沟槽隔离(STI)工艺,以在器件之间形成氧化物隔离。

    Leakage sensor and switch device for deep-trench capacitor array
    12.
    发明授权
    Leakage sensor and switch device for deep-trench capacitor array 有权
    泄漏传感器和开关器件用于深沟槽电容阵列

    公开(公告)号:US08351166B2

    公开(公告)日:2013-01-08

    申请号:US12508665

    申请日:2009-07-24

    IPC分类号: H01G7/16 G01R31/12

    CPC分类号: G01R31/024 G01R31/028

    摘要: A high-density deep trench capacitor array with a plurality of leakage sensors and switch devices. Each capacitor array further comprises a plurality of sub-arrays, wherein the leakage in each sub-array is independently controlled by a sensor and switch unit. The leakage sensor comprises a current mirror, a transimpedance amplifier, a voltage comparator, and a timer. If excessive leakage current is detected, the switch unit will automatically disconnect the leaky capacitor module to reduce stand-by power and improve yield. An optional solid-state resistor can be formed on top of the deep trench capacitor array to increase the temperature and speed up the leakage screening process.

    摘要翻译: 一种高密度深沟槽电容阵列,具有多个漏电传感器和开关器件。 每个电容器阵列还包括多个子阵列,其中每个子阵列中的泄漏由传感器和开关单元独立地控制。 泄漏传感器包括电流镜,跨阻放大器,电压比较器和定时器。 如果检测到过大的漏电流,开关单元将自动断开泄漏电容器模块,以降低待机功率并提高产量。 可以在深沟槽电容器阵列的顶部形成可选的固态电阻器,以增加温度并加快泄漏检测过程。

    Laser annealing for 3-D chip integration
    13.
    发明授权
    Laser annealing for 3-D chip integration 有权
    激光退火3-D芯片集成

    公开(公告)号:US07947599B2

    公开(公告)日:2011-05-24

    申请号:US12018756

    申请日:2008-01-23

    IPC分类号: H01L21/44

    摘要: A laser annealing method for annealing a stacked semiconductor structure having at least two stacked layers is disclosed. A laser beam is focused on a lower layer of the stacked layers. The laser beam is then scanned to anneal features in the lower layer. The laser beam is then focused on an upper layer of the stacked layers, and the laser beam is scanned to anneal features in the upper layer. The laser has a wavelength of less than one micrometer. The beam size, depth of focus, energy dosage, and scan speed of the laser beam are programmable. Features in the lower layer are offset from features in the upper layer such that these features do not overlap along a plane parallel to a path of the laser beam. Each of the stacked layers includes active devices, such as transistors. Also, the first and second layers may be annealed simultaneously.

    摘要翻译: 公开了一种用于退火具有至少两个堆叠层的层叠半导体结构的激光退火方法。 激光束聚焦在堆叠层的下层。 然后扫描激光束以退火下层中的特征。 然后将激光束聚焦在堆叠层的上层上,并且激光束被扫描以退火上层中的特征。 激光器的波长小于1微米。 激光束的光束尺寸,焦深,能量投射和扫描速度是可编程的。 较低层中的特征偏离上层中的特征,使得这些特征不沿着与激光束的路径平行的平面重叠。 堆叠层中的每一个包括诸如晶体管的有源器件。 此外,第一层和第二层可以同时退火。

    LASER ANNEALING FOR 3-D CHIP INTEGRATION
    16.
    发明申请
    LASER ANNEALING FOR 3-D CHIP INTEGRATION 有权
    激光退火三维芯片整合

    公开(公告)号:US20090184264A1

    公开(公告)日:2009-07-23

    申请号:US12018756

    申请日:2008-01-23

    IPC分类号: H01L21/268

    摘要: A laser annealing method for annealing a stacked semiconductor structure having at least two stacked layers is disclosed. A laser beam is focused on a lower layer of the stacked layers. The laser beam is then scanned to anneal features in the lower layer. The laser beam is then focused on an upper layer of the stacked layers, and the laser beam is scanned to anneal features in the upper layer. The laser has a wavelength of less than one micrometer. The beam size, depth of focus, energy dosage, and scan speed of the laser beam are programmable. Features in the lower layer are offset from features in the upper layer such that these features do not overlap along a plane parallel to a path of the laser beam. Each of the stacked layers includes active devices, such as transistors. Also, the first and second layers may be annealed simultaneously.

    摘要翻译: 公开了一种用于退火具有至少两个堆叠层的层叠半导体结构的激光退火方法。 激光束聚焦在堆叠层的下层。 然后扫描激光束以退火下层中的特征。 然后将激光束聚焦在堆叠层的上层上,并且激光束被扫描以退火上层中的特征。 激光器的波长小于1微米。 激光束的光束尺寸,焦深,能量投射和扫描速度是可编程的。 较低层中的特征偏离上层中的特征,使得这些特征不沿着与激光束的路径平行的平面重叠。 堆叠层中的每一个包括诸如晶体管的有源器件。 此外,第一层和第二层可以同时退火。

    Hierarchical power supply noise monitoring device and system for very large scale integrated circuits
    17.
    发明授权
    Hierarchical power supply noise monitoring device and system for very large scale integrated circuits 有权
    用于大型集成电路的分层电源噪声监测装置和系统

    公开(公告)号:US06823293B2

    公开(公告)日:2004-11-23

    申请号:US10334312

    申请日:2002-12-31

    IPC分类号: G06F1500

    CPC分类号: G01R31/3004 G01R31/31721

    摘要: A hierarchical power supply noise monitoring device and system for very large scale integrated circuits. The noise-monitoring device is fabricated on-chip to measure the noise on the chip. The noise-monitoring system includes a plurality of on-chip noise-monitoring devices distributed strategically across the chip. A noise-analysis algorithm analyzes the noise characteristics from the noise data collected from the noise-monitoring devices, and a hierarchical noise-monitoring system maps the noise of each core to the system on chip.

    摘要翻译: 一种用于大规模集成电路的分层电源噪声监测装置和系统。 噪声监测装置是片上制造的,以测量芯片上的噪声。 噪声监测系统包括跨芯片战略性分布的多个片上噪声监测装置。 噪声分析算法从噪声监测装置收集的噪声数据中分析噪声特性,分层噪声监测系统将每个核心的噪声映射到片上系统。

    Narrow-band wide-range frequency modulation continuous wave (FMCW) radar system
    19.
    发明授权
    Narrow-band wide-range frequency modulation continuous wave (FMCW) radar system 有权
    窄带宽频调频连续波(FMCW)雷达系统

    公开(公告)号:US08416121B2

    公开(公告)日:2013-04-09

    申请号:US12963314

    申请日:2010-12-08

    IPC分类号: G01S7/28

    摘要: A frequency modulation continuous wave (FMCW) system includes a first memory receiving a clock signal and storing voltage digital values of I FMCW signals, a second memory receiving the clock signal and storing the voltage digital values of the Q FMCW signals, a first digital-to-analog converter (DAC) connected to the first memory and receiving the clock signal for converting the voltage digital values of the I FMCW signal to a first analog voltage, a second digital-to-analog converter (DAC) connected to the second memory and receiving the clock signal for converting the voltage digital values of the Q FMCW signal to a second analog voltage, an I low-pass filter connected to the first DAC smoothing the I FMCW signal and a Q low-pass filter connected to the second DAC smoothing the Q FMCW signal.

    摘要翻译: 频率调制连续波(FMCW)系统包括接收时钟信号并存储I FMCW信号的电压数字值的第一存储器,接收时钟信号并存储Q FMCW信号的电压数字值的第二存储器,第一数字 - 模拟转换器(DAC),连接到第一存储器并且接收用于将I FMCW信号的电压数字值转换为第一模拟电压的时钟信号;连接到第二存储器的第二数模转换器(DAC) 并接收用于将Q FMCW信号的电压数字值转换为第二模拟电压的时钟信号,连接到第一DAC的I低通滤波器平滑I FMCW信号和连接到第二DAC的Q低通滤波器 平滑Q FMCW信号。

    Laser annealing for 3-D chip integration
    20.
    发明授权
    Laser annealing for 3-D chip integration 有权
    激光退火3-D芯片集成

    公开(公告)号:US08138085B2

    公开(公告)日:2012-03-20

    申请号:US13093798

    申请日:2011-04-25

    IPC分类号: H01L21/44

    摘要: A laser annealing method for annealing a stacked semiconductor structure having at least two stacked layers is disclosed. A laser beam is focused on a lower layer of the stacked layers. The laser beam is then scanned to anneal features in the lower layer. The laser beam is then focused on an upper layer of the stacked layers, and the laser beam is scanned to anneal features in the upper layer. The laser has a wavelength of less than one micrometer. The beam size, depth of focus, energy dosage, and scan speed of the laser beam are programmable. Features in the lower layer are offset from features in the upper layer such that these features do not overlap along a plane parallel to a path of the laser beam. Each of the stacked layers includes active devices, such as transistors. Also, the first and second layers may be annealed simultaneously.

    摘要翻译: 公开了一种用于退火具有至少两个堆叠层的层叠半导体结构的激光退火方法。 激光束聚焦在堆叠层的下层。 然后扫描激光束以退火下层中的特征。 然后将激光束聚焦在堆叠层的上层上,并且激光束被扫描以退火上层中的特征。 激光器的波长小于1微米。 激光束的光束尺寸,焦深,能量投射和扫描速度是可编程的。 较低层中的特征偏离上层中的特征,使得这些特征不沿着与激光束的路径平行的平面重叠。 堆叠层中的每一个包括诸如晶体管的有源器件。 此外,第一层和第二层可以同时退火。