公开(公告)号：US20160365441A1

公开(公告)日：2016-12-15

申请号：US15182244

申请日：2016-06-14

Applicant: Infineon Technologies AG

Inventor： Ralf Siemieniec ,  Markus Zundel ,  Karl-Heinz Bach ,  Franz Hirler ,  Christian Kampen ,  Werner Schustereder

IPC: H01L29/78 ,  H01L29/06 ,  H01L21/324 ,  H01L29/66 ,  H01L21/265 ,  H01L29/10 ,  H01L29/40

CPC classification number: H01L29/7813 ,  H01L21/265 ,  H01L21/2652 ,  H01L21/324 ,  H01L29/063 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/408 ,  H01L29/66734

Abstract: A transistor cell includes, in a semiconductor body, a drift region of a first doping type, a source region of the first doping type, a body region of a second doping type, and a drain region of the first doping type. The body region is arranged between the source and drift regions. The drift region is arranged between the body and drain regions. A gate electrode is adjacent the body region and dielectrically insulated from the body region by a gate dielectric, and a field electrode is dielectrically insulated from the drift region by a field electrode dielectric. The drift region includes an avalanche region having a higher doping concentration than sections of the drift region adjacent the avalanche region and which is spaced apart from the field electrode dielectric in a direction perpendicular to the current flow direction. The field electrode is arranged in a needle-shaped trench.

Abstract translation: 晶体管单元在半导体本体中包括第一掺杂类型的漂移区，第一掺杂型的源极区，第二掺杂型的体区和第一掺杂型的漏极区。 身体区域布置在源区和漂移区之间。 漂移区域布置在体区和漏区之间。 栅极电极与主体区域相邻并且通过栅极电介质与体区电介质绝缘，并且场电极通过场电极电介质与漂移区域介电绝缘。 漂移区域包括具有比与雪崩区域相邻的漂移区域的部分更高的掺杂浓度的雪崩区域，并且在与电流流动方向垂直的方向上与场电极电介质间隔开。 场电极布置在针状沟槽中。

公开(公告)号：US20160329401A1

公开(公告)日：2016-11-10

申请号：US15146459

申请日：2016-05-04

Applicant: Infineon Technologies AG

Inventor： Johannes Georg Laven ,  Moriz Jelinek ,  Hans-Joachim Schulze ,  Werner Schustereder ,  Michael Stadtmueller

IPC: H01L29/06 ,  H01L21/8234 ,  H01L29/739 ,  H01L21/324

CPC classification number: H01L29/0692 ,  H01L21/263 ,  H01L21/26506 ,  H01L21/3221 ,  H01L21/324 ,  H01L21/8234 ,  H01L22/12 ,  H01L22/14 ,  H01L22/20 ,  H01L29/167 ,  H01L29/36 ,  H01L29/7393 ,  H01L29/8611

Abstract: A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.

Abstract translation: 制造半导体器件的方法包括确定指示半导体晶片中的外在掺杂剂浓度和固有氧浓度的信息。 基于关于外在掺杂剂浓度和本征氧浓度的信息以及关于半导体晶片中氧相关热供体的产生速率或解离速率的信息，确定用于产生或解离氧 - 以补偿目标掺杂剂浓度与外在掺杂剂浓度之间的差异。

公开(公告)号：US20160233295A1

公开(公告)日：2016-08-11

申请号：US15016680

申请日：2016-02-05

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Wolfgang Jantscher ,  Roland Rupp ,  Werner Schustereder ,  Hans Weber

IPC: H01L29/06 ,  H01L29/20 ,  H01L21/033 ,  H01L21/265 ,  H01L21/266 ,  H01L29/16 ,  H01L21/04

CPC classification number: H01L29/0634 ,  H01L21/046 ,  H01L21/0465 ,  H01L21/26546 ,  H01L21/266 ,  H01L29/0615 ,  H01L29/1608 ,  H01L29/2003

Abstract: A semiconductor device includes a semiconductor body having a semiconductor body material with a dopant diffusion coefficient that is smaller than the corresponding dopant diffusion coefficient of silicon, at least one first semiconductor region doped with dopants of a first conductivity type and having a columnar shape that extends into the semiconductor body along an extension direction, wherein a respective width of the at least one first semiconductor region continuously increases along the extension direction; and at least one second semiconductor region included in the semiconductor body. The at least one second semiconductor region is arranged adjacent to the at least one first semiconductor region, and is doped with dopants of a second conductivity type complementary to the first conductivity type.

Abstract translation: 一种半导体器件包括具有半导体本体材料的半导体本体材料，其掺杂剂扩散系数小于硅的相应掺杂剂扩散系数，至少一个第一半导体区域掺杂有第一导电类型的掺杂剂并且具有延伸的柱状 沿着延伸方向进入半导体本体，其中至少一个第一半导体区域的相应宽度沿着延伸方向连续增加; 以及包括在半导体本体中的至少一个第二半导体区域。 所述至少一个第二半导体区域布置成与所述至少一个第一半导体区域相邻，并且掺杂有与所述第一导电类型互补的第二导电类型的掺杂剂。

公开(公告)号：US20160225626A1

公开(公告)日：2016-08-04

申请号：US15049192

申请日：2016-02-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Hans-Joachim Schulze ,  Ingo Muri ,  Friedrich Kroener ,  Werner Schustereder

IPC: H01L21/265 ,  H01L21/3063 ,  H01L21/324

CPC classification number: H01L21/26513 ,  H01L21/263 ,  H01L21/265 ,  H01L21/26506 ,  H01L21/3063 ,  H01L21/3242

Abstract: A method for producing a semiconductor is disclosed, the method having: providing a semiconductor body having a first side and a second side; forming an n-doped zone in the semiconductor body by a first implantation into the semiconductor body via the first side to a first depth location of the semiconductor body; and forming a p-doped zone in the semiconductor body by a second implantation into the semiconductor body via the second side to a second depth location of the semiconductor body, a pn-junction forming between said n-doped zone and said p-doped zone in the semiconductor body.

公开(公告)号：US20150123247A1

公开(公告)日：2015-05-07

申请号：US14480705

申请日：2014-09-09

Applicant: Infineon Technologies AG

Inventor： Thomas Neidhart ,  Franz Josef Niedernostheide ,  Hans-Joachim Schulze ,  Werner Schustereder ,  Alexander Susiti

IPC: H01L29/167 ,  H01L29/78 ,  H01L29/06 ,  H01L29/861 ,  H01L29/739 ,  H01L29/36

CPC classification number: H01L29/167 ,  H01L21/265 ,  H01L21/26506 ,  H01L29/0603 ,  H01L29/32 ,  H01L29/36 ,  H01L29/7393 ,  H01L29/7801 ,  H01L29/861

Abstract: A semiconductor component includes a semiconductor body having a first side and a second side opposite the first side. In the semiconductor body, a dopant region is formed by a dopant composed of an oxygen complex. The dopant region extends over a section L having a length of at least 10 μm along a direction from the first side to the second side. The dopant region has an oxygen concentration in a range of 1×1017 cm−3 to 5×1017 cm−3 over the section L.

Abstract translation: 半导体部件包括具有第一侧和与第一侧相对的第二侧的半导体本体。 在半导体本体中，由氧络合物构成的掺杂剂形成掺杂剂区域。 掺杂剂区域沿着从第一侧到第二侧的方向具有至少10μm的长度的部分L延伸。 掺杂剂区域在部分L上的氧浓度范围为1×1017cm-3至5×1017cm-3。

公开(公告)号：US11043384B2

公开(公告)日：2021-06-22

申请号：US16432211

申请日：2019-06-05

Applicant: Infineon Technologies AG

Inventor： Moriz Jelinek ,  Michael Kokot ,  Christian Krueger ,  Hans-Joachim Schulze ,  Werner Schustereder

IPC: H01L21/04 ,  H01L21/265 ,  H01L21/66 ,  H01L29/06 ,  H01L29/10 ,  H01L29/36 ,  H01L21/687

Abstract: A method of manufacturing a semiconductor device includes reducing a thickness of a semiconductor substrate and/or forming a doped region in the semiconductor substrate. The method further includes changing an ion acceleration energy of an ion beam while effecting a relative movement between the semiconductor substrate and the ion beam impinging on the semiconductor substrate.

公开(公告)号：US10679857B2

公开(公告)日：2020-06-09

申请号：US16441534

申请日：2019-06-14

Applicant: Infineon Technologies AG

Inventor： Johannes Georg Laven ,  Anton Mauder ,  Hans-Joachim Schulze ,  Werner Schustereder

IPC: H01L29/423 ,  H01L21/28 ,  H01L29/40 ,  H01L29/66 ,  H01L29/739 ,  H01L21/311 ,  H01L21/3213 ,  H01L29/78 ,  H01L37/00 ,  H01L29/04 ,  H01L21/265

Abstract: A semiconductor device and method is disclosed. In one example, the method for forming a semiconductor device includes forming a trench extending from a front side surface of a semiconductor substrate into the semiconductor substrate. The method includes forming of material to be structured inside the trench. Material to be structured is irradiated with a tilted reactive ion beam at a non-orthogonal angle with respect to the front side surface such that an undesired portion of the material to be structured is removed due to the irradiation with the tilted reactive ion beam while an irradiation of another portion of the material to be structured is masked by an edge of the trench.

公开(公告)号：US20200005957A1

公开(公告)日：2020-01-02

申请号：US16569676

申请日：2019-09-13

Applicant: Infineon Technologies AG

Inventor： Markus BINA ,  Hans-Joachim Schulze ,  Werner Schustereder

IPC: G21G1/06 ,  H01L21/261 ,  C30B31/20

Abstract: An apparatus for processing a plurality of semiconductor wafers, the apparatus including a spallation chamber, a neutron producing material mounted in the spallation chamber, a neutron moderator, and an irradiation chamber coupled to the spallation chamber, wherein the neutron moderator is disposed between the spallation chamber and the irradiation chamber, wherein the irradiation chamber is configured to accommodate the plurality of semiconductor wafers, wherein each of the plurality of semiconductor wafers has a first surface and a second surface opposite the first surface, wherein the plurality of semiconductor wafers are positioned so that a first surface of one semiconductor wafer faces a second surface of another semiconductor wafer.

公开(公告)号：US20190385852A1

公开(公告)日：2019-12-19

申请号：US16432211

申请日：2019-06-05

Applicant: Infineon Technologies AG

Inventor： Moriz Jelinek ,  Michael Kokot ,  Christian Krueger ,  Hans-Joachim Schulze ,  Werner Schustereder

IPC: H01L21/265 ,  H01L21/66 ,  H01L21/687 ,  H01L29/10 ,  H01L29/36 ,  H01L29/06

Abstract: A method of manufacturing a semiconductor device includes reducing a thickness of a semiconductor substrate and/or forming a doped region in the semiconductor substrate. The method further includes changing an ion acceleration energy of an ion beam while effecting a relative movement between the semiconductor substrate and the ion beam impinging on the semiconductor substrate.

公开(公告)号：US10468148B2

公开(公告)日：2019-11-05

申请号：US15494599

申请日：2017-04-24

Applicant: Infineon Technologies AG

Inventor： Markus Bina ,  Hans-Joachim Schulze ,  Werner Schustereder

IPC: G21G1/06 ,  C30B31/20 ,  H01L21/261 ,  G21G4/02

Abstract: In various embodiments, a method of processing one or more semiconductor wafers is provided. The method includes positioning the one or more semiconductor wafers in an irradiation chamber, generating a neutron flux in a spallation chamber coupled to the irradiation chamber, moderating the neutron flux to produce a thermal neutron flux, and exposing the one or more semiconductor wafers to the thermal neutron flux to thereby induce the creation of dopant atoms in the one or more semiconductor wafers.