中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

41 records (took 0.028 seconds)

    Digitally controlled zero voltage switching
    11.
    发明申请
    Digitally controlled zero voltage switching 审中-公开

    公开(公告)号：US20170187284A1

    公开(公告)日：2017-06-29

    申请号：US14757802

    申请日：2015-12-23

    Applicant: Intel Corporation

    Inventor： Vaibhav Vaidya ,  Pavan Kumar ,  Krishnan Ravichandran ,  Vivek K. De

    IPC: H02M3/158

    CPC classification number: H02M1/083 ,  H02M1/38 ,  H02M3/1588 ,  Y02B70/1466

    Abstract: Generally, this disclosure describes an apparatus. The apparatus includes switch controller circuitry. The switch controller circuitry includes dead time logic circuitry to determine an estimated dead time interval between a turn off of a first switch and a turn on of a second switch. The first switch and the second switch are coupled at a switched node. The estimated dead time interval is determined based, at least in part, on a difference between an input voltage, Vin, and a switched voltage, Vsw, detected at the switched node just prior to turning off the first switch, a parasitic capacitance, Cpar, associated with the switched node and a maximum inductor current, IL,max. The difference between Vin and Vsw represents the maximum inductor current.

    VOLTAGE REGULATOR PARTITIONING ACROSS STACKED DIE
    14.
    发明申请
    VOLTAGE REGULATOR PARTITIONING ACROSS STACKED DIE 有权

    公开(公告)号：US20250103074A1

    公开(公告)日：2025-03-27

    申请号：US18474147

    申请日：2023-09-25

    Applicant: Intel Corporation

    Inventor： Harish K. Krishnamurthy ,  Nicolas Butzen ,  Khondker Ahmed ,  Nachiket Desai ,  Su Hwan Kim ,  Krishnan Ravichandran ,  Kaladhar Radhakrishnan ,  Jonathan Douglas

    IPC: G05F1/56

    Abstract: Embodiments herein relate to a voltage regular (VR) formed from dies stacked on a package base layer. The VR can include a first part on a first die and a second part on a second die, where the different parts are selected based on characteristics of the respective die such as their voltage domains or technologies. In a capacitor-based VR, an input capacitor and switches subject to a relatively high input voltage can be provided in the first die, while a flying capacitor, output capacitor and switches subject to a relatively low output voltage can be provided in the second die. In an inductor-based VR, an inductor and one or more switches subject to a relatively high input voltage can be provided in the first die, while an output capacitor subject to a relatively low output voltage can be provided in the second die.

    NON-LINEAR CLAMP STRENGTH TUNING METHOD AND APPARATUS
    15.
    发明申请
    NON-LINEAR CLAMP STRENGTH TUNING METHOD AND APPARATUS 有权

    公开(公告)号：US20210203228A1

    公开(公告)日：2021-07-01

    申请号：US16727759

    申请日：2019-12-26

    Applicant: Intel Corporation

    Inventor： Xiaosen Liu ,  Krishnan Ravichandran ,  Harish Krishnamurthy ,  Vivek De

    IPC: H02M3/158 ,  H03L5/00 ,  H02M1/088 ,  H02N13/00

    Abstract: A 3-level ripple quantization scheme provides power transistor (MOS) strength-tuning mechanism focused on the transient clamp period. The 3-level ripple quantization scheme solves the digital low dropout's (D-LDO's) tradeoff between silicon area (e.g., decoupling capacitor size), quiescent power consumption (e.g., speed of comparators), wide load range, and optimal output ripple. The 3-level ripple quantization scheme eliminates oscillation risk from either wide dynamic range or parasitic by exploiting asynchronous pulse patterns. As such, ripple magnitude for both fast di/dt loading events and various steady-state scenarios are shrunk effectively, resulting significant efficiency benefits.

    Computational current sensor
    19.
    发明授权
    Computational current sensor 有权

    公开(公告)号：US12261526B2

    公开(公告)日：2025-03-25

    申请号：US17323837

    申请日：2021-05-18

    Applicant: Intel Corporation

    Inventor： Harish K. Krishnamurthy ,  Xun Sun ,  Krishnan Ravichandran

    IPC: H02M3/158 ,  G01R19/25 ,  H02M1/00 ,  H02M3/157

    Abstract: A computational current sensor, that enhances traditional Kalman filter based current observer techniques, with transient tracking enhancements and an online parasitic parameter identification that enhances overall accuracy during steady state and transient events while guaranteeing convergence. During transient operation (e.g., a voltage droop), a main filter is bypassed with estimated values calculated from a charge balance principle to enhance accuracy while tracking transient current surges of the DC-DC converter. To address the issue of dependency on a precise model parameter information and further improve accuracy, an online identification algorithm is included to track the equivalent parasitic resistance at run-time.

Patent Agency Ranking