公开(公告)号：US20150032979A1

公开(公告)日：2015-01-29

申请号：US13952279

申请日：2013-07-26

Applicant: International Business Machines Corporation

Inventor： Jing Li ,  Dinesh C. Verma

IPC: G06F3/06

CPC classification number: G06F3/0617 ,  G06F3/0608 ,  G06F3/0632 ,  G06F3/0634 ,  G06F3/0644 ,  G06F3/0679 ,  G06F3/0688 ,  G11C11/5678 ,  G11C13/0004

Abstract: A dynamic self-adjusting memory storage device and method of operating. The device includes a plurality of adjustable-size phase change memory (PCM) storage sub-modules connected to and communicating over a bus with a control device. One of the plurality of adjustable-size memory storage sub-modules is in a stand-by mode of operation. The control device implements steps to: determine, based on a switching criteria, when the memory storage device needs to be switched to a different operation mode; select one or more adjustable-sized memory storage sub-modules for switching to said different operation mode; copy stored data from a selected actively operating adjustable-size memory storage sub-module to said adjustable-size memory storage sub-module in said stand-by mode; and change the capacity of the selected actively operating adjustable-size memory storage sub-module after the copying. The dynamic self-adjusting memory capacity method is performed without powering down the memory storage device or paying any timing penalty.

Abstract translation: 一种动态自调整存储设备及其操作方法。 该装置包括多个可调大小的相变存储器（PCM）存储子模块，其连接到总线上并通过控制装置进行通信。 多个可调节尺寸的存储子模块中的一个处于备用操作模式。 控制装置实现以下步骤：基于切换准则确定何时需要将存储器存储设备切换到不同的操作模式; 选择一个或多个可调大小的存储器子模块以切换到所述不同的操作模式; 将所选择的主动操作的可调大容量存储子模块的存储数据以所述备用模式复制到所述可调大容量存储子模块; 并在复制后更改所选择的主动操作的可调大容量存储子模块的容量。 执行动态自调整存储容量方法而不关闭存储器装置或者支付任何定时损失。

公开(公告)号：US20150023094A1

公开(公告)日：2015-01-22

申请号：US14507144

申请日：2014-10-06

Applicant: International Business Machines Corporation

Inventor： Chung H. Lam ,  Jing Li

IPC: G11C13/00

CPC classification number: G11C13/0069 ,  G11C11/00 ,  G11C11/5628 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/0064 ,  G11C2013/0057 ,  G11C2013/0076 ,  G11C2013/0092

Abstract: An RC-based sensing method and computer program product to effectively sense the cell resistance of a programmed Phase Change Material (PCM) memory cell. The sensing method ensures the same physical configuration of each cell (after programming): same amorphous volume, same trap density/distribution, etc. The sensing method is based on a metric: the RC based sense amplifier implements two trigger points. The measured time interval between these two points is used as the metric to determine whether the programmed cell state, e.g., resistance, is programmed into desired value. The RC-based sensing method is embedded into an iterative PCM cell programming technique to ensure a tight distribution of resistance at each level after programming; and ensure the probability of level aliasing is very small, leading to less problematic drift.

Abstract translation: 一种基于RC的感测方法和计算机程序产品，用于有效地检测编程的相变材料（PCM）存储单元的单元电阻。 感测方法确保每个单元的相同物理配置（编程后）：相同的无定形体积，相同的阱密度/分布等。感测方法基于度量：基于RC的感测放大器实现两个触发点。 将这两个点之间的测量时间间隔用作度量以确定编程的单元状态（例如电阻）是否被编程为期望值。 基于RC的感测方法被嵌入到迭代PCM单元编程技术中，以确保编程后各层电阻的紧密分配; 并确保层次混叠的概率非常小，导致较少的有问题的漂移。

公开(公告)号：US08927425B1

公开(公告)日：2015-01-06

申请号：US13969625

申请日：2013-08-19

Applicant: International Business Machines Corporation

Inventor： Chung H. Lam ,  Jing Li

IPC: H01L21/308

CPC classification number: H01L21/76802 ,  H01L21/0337 ,  H01L21/3086 ,  H01L21/31144 ,  H01L21/76816 ,  H01L21/76883

Abstract: A method for fabricating a semiconductor device utilizing a plurality of masks and spacers. The method includes forming parallel first trenches in a substrate using a first lithographic process. The substrate includes sidewalls adjacent to the parallel first trenches. Forming first spacers adjacent to the sidewalls. Removing the sidewalls, which in part includes using a second lithographic process. Forming second spacers adjacent to the first spacers, resulting in spacer ridges. Etching portions of the substrate between the spacer ridges resulting in second trenches.

公开(公告)号：US08815718B1

公开(公告)日：2014-08-26

申请号：US13931803

申请日：2013-06-28

Applicant: International Business Machines Corporation

Inventor： Chung H. Lam ,  Jing Li

IPC: H01L21/28 ,  H01L21/336

CPC classification number: H01L29/7827 ,  H01L21/2254 ,  H01L21/3086 ,  H01L21/823885 ,  H01L29/42392 ,  H01L29/66666

Abstract: A method for fabricating vertical surround gates in a semiconductor device array structure such that the processes are compatible with CMOS fabrication. The array structure includes a CMOS region and an array region. The method includes forming a polish stop layer, a plurality of patterning layers, a CMOS layer over a substrate, array pillars and array trenches. Forming the array pillars and trenches includes removing the CMOS cover layer and patterning layers. The method further includes doping portions of the substrate within the array trenches. The method includes forming vertical surround gates in the array trenches, an array filler layer to fill in the array trenches, and a CMOS photoresist pattern over the array filler layer. The method includes etching the CMOS trenches down through a portion of the substrate, such that the array pillars under the shared trench are etched to form contact holes.

Abstract translation: 一种用于在半导体器件阵列结构中制造垂直环绕栅极的方法，使得该工艺与CMOS制造兼容。 阵列结构包括CMOS区域和阵列区域。 该方法包括形成抛光停止层，多个图案化层，在衬底上的CMOS层，阵列柱和阵列沟槽。 形成阵列柱和沟槽包括去除CMOS覆盖层和图案化层。 该方法还包括在阵列沟槽内掺杂衬底的部分。 该方法包括在阵列沟槽中形成垂直环形栅极，填充阵列沟槽的阵列填充层以及阵列填充层上的CMOS光刻胶图案。 该方法包括通过衬底的一部分向下蚀刻CMOS沟槽，使得在共享沟槽下方的阵列柱被蚀刻以形成接触孔。

公开(公告)号：US20140114671A1

公开(公告)日：2014-04-24

申请号：US13655918

申请日：2012-10-19

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Jianying Hu ,  Geetika Tewari Lakshmanan ,  Jing Li ,  Jing Mei ,  Guo Tong Xie

IPC: G06Q50/22

CPC classification number: G16H40/20 ,  G06F19/325 ,  G16H50/50

Abstract: A method of mapping a care plan template to a case model includes receiving a care plan template, extracting elements from the care plan template, wherein the elements correspond to a phase comprising at least one task and data attributes corresponding to the task, mapping the task of the care plan template to a task of the case model, mapping a precedence relationship of the task of the care plan template to preconditions of the task of the case model, mapping the data attributes of the care plan template to properties of the case model, wherein the properties are associated with the task of the case model, mapping the task of the care plan template to a role of the case model, and generating the case model including the mapped task, the mapped precedence relationship, the mapped data attributes, and the mapped role.

公开(公告)号：US20250004742A1

公开(公告)日：2025-01-02

申请号：US18216349

申请日：2023-06-29

Applicant: International Business Machines Corporation

Inventor： Yi Yuan ,  XiaoPeng Zhang ,  Heng Wang ,  Xiao Hu He ,  Jing Li

IPC: G06F8/65

Abstract: Techniques are described with regard to container image configuration in a computing environment. An associated computer-implemented method includes initializing a container image storage engine associated with a logical tree structure having a plurality of container image nodes, where each of the plurality of container image nodes includes a hash layer array and a hash data array. The method includes building at least one new container image node to incorporate into the plurality of container image nodes. The method further includes applying a software patch to a target container image node among the plurality of container image nodes. In an embodiment, the method further includes starting at least one container based upon a respective container image node among the plurality of container image nodes.

公开(公告)号：US20240095435A1

公开(公告)日：2024-03-21

申请号：US17932538

申请日：2022-09-15

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  New Jersey Institute of Technology

Inventor： Shun Zhang ,  Xin Zhang ,  Shaoze Fan ,  Ningyuan Cao ,  Jing Li ,  Xiaoxiao Guo ,  Chuang Gan

IPC: G06F30/398

CPC classification number: G06F30/398 ,  G06F2119/02

Abstract: A method, system, and computer program product for circuit design automation. The method identifies a set of circuit components for a proposed circuit design. A subset of circuit components is selected to generate an initial topology for the proposed circuit design. A set of subsequent topologies are iteratively generated by a heuristic search algorithm based on the subset of circuit components and the initial topology. A set of valid topologies of the set of subsequent topologies are determined by a circuit simulator based on the subset of circuit components and a set of connections within the set of subsequent topologies. The method generates the proposed circuit design from the set of valid topologies.

公开(公告)号：US11861023B2

公开(公告)日：2024-01-02

申请号：US17411383

申请日：2021-08-25

Applicant: International Business Machines Corporation

Inventor： Heng Wang ,  Wan Yue Chen ,  Chen Guang Liu ,  Jing Li ,  Xiao Ling Chen ,  Peng Hui Jiang

IPC: G06F21/60 ,  G06N20/00

CPC classification number: G06F21/602 ,  G06N20/00

Abstract: Embodiments of the invention include a computer-implemented method that uses a processor to access cryptographic-function constraints associated with an encrypted message. Based on a determination that the cryptographic-function constraints do not include mandatory cryptographic computing resource requirements, first resource-scaling operations are performed that include an analysis of cryptographic metrics associated with a processor. The cryptographic metrics include information associated with the encrypted message, along with performance measurements of cryptographic functions performed by the processor. The cryptographic-function constraints and results of the analysis of the cryptographic metrics are used to determine cryptographic processing requirements of the encrypted message; and match the cryptographic processing requirements to selected ones of a set of cryptographic computing resources to identify a customized set of cryptographic computing resources matched to cryptographic processing requirements of the encrypted message. The customized set of cryptographic computing resources is used to perform customized cryptographic functions on the encrypted message.

公开(公告)号：US20230022054A1

公开(公告)日：2023-01-26

申请号：US17373928

申请日：2021-07-13

Applicant: International Business Machines Corporation

Inventor： Jing Li ,  Jing Mei ,  Fan Li ,  Ya Bin Dang

IPC: G06N5/04 ,  G06K9/62

Abstract: Embodiments of the present disclosure relate to methods, systems, and computer program products for observation data evaluation. In a method, a hierarchical relationship between a plurality of observation items is obtained based on a dataset including a plurality of observation samples. Here, an observation sample in the plurality of observation samples includes a group of measurements for the group of observation items, respectively. A plurality of evaluation models for evaluating an observation sample is generated based on the hierarchical relationship according to a predefined group of membership functions and a predefined group of fuzzy operators. An evaluation model is selected for a further evaluation from the plurality of evaluation models based on a plurality of confidence intervals for the plurality of evaluation models. With these embodiments, the evaluation model may be obtained in an easy and more effective way.

公开(公告)号：US20220198217A1

公开(公告)日：2022-06-23

申请号：US17130003

申请日：2020-12-22

Applicant: International Business Machines Corporation

Inventor： Lin Dong ,  Chao Xue ,  Jing Li ,  Bin Xu

IPC: G06K9/62 ,  G06N3/08 ,  G06N3/04

Abstract: A model parallel training technique for neural architecture search including the following operations: (i) receiving a plurality of ML (machine learning) models that can be substantially interchangeably applied to a computing task; (ii) for each given ML model of the plurality of ML models: (a) determining how the given ML model should be split for model parallel processing operations, and (b) computing a model parallelism score (MPS) for the given ML model, with the MPS being based on an assumption that the split for the given ML model will be used at runtime; and (iii) selecting a selected ML model based, at least in part, on the MPS scores of the ML models of the plurality of ML models.