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11.
公开(公告)号:US20150243649A1
公开(公告)日:2015-08-27
申请号:US14186840
申请日:2014-02-21
Applicant: Infineon Technologies AG
Inventor: Helmut Brech , Matthias Zigldrum , Albert Birner , Richard Wilson , Saurabh Goel
IPC: H01L27/06 , H01L23/00 , H01L23/528 , H01L23/522 , H01L49/02
CPC classification number: H01L27/0629 , H01L23/4824 , H01L23/5223 , H01L23/5226 , H01L23/528 , H01L24/05 , H01L24/09 , H01L28/40 , H01L29/7802 , H01L29/7816 , H01L2223/6655 , H01L2223/6672 , H01L2224/04042 , H01L2224/0603 , H01L2224/0616 , H01L2224/0912 , H01L2224/48195 , H01L2224/48247 , H01L2224/49111 , H01L2224/49175 , H01L2924/1205 , H01L2924/1305 , H01L2924/13055 , H01L2924/13063 , H01L2924/13064 , H01L2924/13091 , H01L2924/1421 , H01L2924/19041 , H01L2924/19105 , H01L2924/19107 , H01L2924/30105 , H01L2924/00 , H01L2924/0001
Abstract: A power transistor die includes a transistor formed in a semiconductor body. The transistor has a gate terminal, an output terminal and a third terminal. The gate terminal controls a conduction channel between the output terminal and the third terminal. The power transistor die further includes a structured first metal layer disposed on and insulated from the semiconductor body. The structured first metal layer is connected to the output terminal of the transistor. The power transistor die also includes a first bond pad disposed on and insulated from the semiconductor body. The first bond pad forms an output terminal of the power transistor die and is capacitively coupled to the structured first metal layer so as to form a series capacitance between the output terminal of the transistor and the first bond pad. A power semiconductor package including the power transistor die is also provided.
Abstract translation: 功率晶体管管芯包括形成在半导体本体中的晶体管。 晶体管具有栅极端子,输出端子和第三端子。 栅极端子控制输出端子和第三端子之间的导通通道。 功率晶体管管芯还包括设置在半导体本体上并与半导体本体绝缘的结构化的第一金属层。 结构化的第一金属层连接到晶体管的输出端。 功率晶体管管芯还包括设置在半导体本体上并与半导体本体绝缘的第一接合焊盘。 第一接合焊盘形成功率晶体管管芯的输出端子,并且与结构化的第一金属层电容耦合,以便在晶体管的输出端和第一接合焊盘之间形成串联电容。 还提供了包括功率晶体管管芯的功率半导体封装。
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公开(公告)号:US10181833B2
公开(公告)日:2019-01-15
申请号:US15460297
申请日:2017-03-16
Applicant: Infineon Technologies AG
Inventor: Bayaner Arigong , Richard Wilson , Haedong Jang , Frank Trang , Timothy Canning , Rongguo Zhou
Abstract: A phase shifter includes first and second RF terminals, a reference potential terminal; a lumped element LC network connected to the first and second RF terminals and the reference potential terminal, and first and second active semiconductor devices connected to the lumped element LC network and to the reference potential terminal. Each of the first and second active semiconductor devices include a control terminal and first and second output terminals. The lumped element LC network presents a reactance across the first and second RF terminals that shifts the phase of an RF signal as between the first and second RF terminals. The first and second active semiconductor devices are configured to tune the phase shift of the RF signal by controlling the reactance across the first and second RF terminals.
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公开(公告)号:US09882535B2
公开(公告)日:2018-01-30
申请号:US15195575
申请日:2016-06-28
Applicant: Infineon Technologies AG
Inventor: Haedong Jang , Richard Wilson , Timothy Canning , David Seebacher
CPC classification number: H03F1/0288 , H03F1/0294 , H03F1/56 , H03F3/193 , H03F3/245 , H03F3/604 , H03F2200/255 , H03F2200/423 , H03F2200/451
Abstract: An amplifier that is configured to amplify an RF signal includes a power combiner circuit. The power combiner circuit includes a first branch connected between a first RF input port and a summing node and a second branch connected between a second RF input port and the summing node. Each of the first and second branches includes an impedance inverter. The Chireix combiner is configured to present a Chireix load modulated impedance response to the first and second RF input ports. The power combiner circuit further includes compensation elements being configured to at least partially compensate for a reactance of the Chireix combiner circuit in a Doherty amplifier mode in which a signal is applied to the first RF input port and the second RF input port is electrically open.
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公开(公告)号:US20170279419A1
公开(公告)日:2017-09-28
申请号:US15078298
申请日:2016-03-23
Applicant: Infineon Technologies AG
Inventor: Saurabh Goel , Richard Wilson , Haedong Jang
CPC classification number: H03F3/19 , H03F1/565 , H03F3/193 , H03F3/21 , H03F3/245 , H03F2200/111 , H03F2200/222 , H03F2200/252 , H03F2200/267 , H03F2200/421 , H03F2200/451 , H03F2200/48
Abstract: An amplifier is configured to amplify an RF signal as between an input terminal and an output terminal across a wideband frequency range. A first LC network is connected to the input terminal and has first and second reactive components. A first switching device is connected between the first and second reactive components and couples both the first and second reactive components to the input terminal in an ON state, and disconnects the second reactive component from the input terminal in an OFF state. A second LC network is connected to the output terminal and has third and fourth reactive components. A second switching device is connected between the third and fourth reactive components and couples both the third and fourth reactive components to the output terminal in an ON state and disconnects the fourth reactive component from the output terminal in in an OFF state.
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公开(公告)号:US10320335B1
公开(公告)日:2019-06-11
申请号:US15962672
申请日:2018-04-25
Applicant: Infineon Technologies AG
Inventor: Haedong Jang , Bjoern Herrmann , Zulhazmi Mokhti , Richard Wilson
Abstract: An RF amplifier includes an amplifier chip on a flange having an input and an output comprising a parasitic capacitance and a parasitic inductance, a first chip capacitor coupled to the output of the output of the amplifier by a first plurality of bond wires, and a second chip capacitor coupled to the first chip capacitor by a second plurality of bond wires, and an output impedance matching network having an input coupled to the output of the second chip capacitor by a third plurality of bond wires, and an output, and a phase shift between the input and the output of less than 90 degrees, wherein the phase shift from the output of the amplifier chip to the output of the output impedance matching network is 180 degrees.
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公开(公告)号:US20190165753A1
公开(公告)日:2019-05-30
申请号:US15823155
申请日:2017-11-27
Applicant: Infineon Technologies AG
Inventor: Bayaner Arigong , Haedong Jang , Richard Wilson , Frank Trang , Qianli Mu , EJ Hashimoto
Abstract: An amplifier circuit includes a first port, a second port, a reference potential port, and an RF amplifier device having a first terminal electrically coupled to the first port, a second terminal electrically coupled to the second port, and a reference potential terminal electrically coupled to the reference potential port. The RF amplifier device amplifies an RF signal across an RF frequency range that includes a fundamental RF frequency. An impedance matching network is electrically coupled to the first terminal and the first port. The impedance matching network includes a baseband termination circuit that presents low impedance in a baseband frequency region, a fundamental frequency matching circuit that presents a complex conjugate of an intrinsic impedance of the RF amplifier device in the RF frequency range, and a second order harmonic termination circuit that presents low impedance at second order harmonics of frequencies in the fundamental RF frequency range.
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公开(公告)号:US10236833B2
公开(公告)日:2019-03-19
申请号:US15667195
申请日:2017-08-02
Applicant: Infineon Technologies AG
Inventor: Bayaner Arigong , Richard Wilson , Haedong Jang , Frank Trang , Timothy Canning , Rongguo Zhou , Bjoern Herrmann
Abstract: An RF package includes a metal flange, an RF input lead, an RF output lead, and an electrically conductive die attach area. An RF transistor that is configured to amplify an RF signal is mounted in the die attach area. The RF transistor includes an input terminal that is electrically coupled to the RF input lead, an output terminal that is electrically coupled to the RF output lead, and a reference potential terminal that is electrically connected to the die attach area. A first capacitor having one or more upper metal plates, and a dielectric region is mounted in the die attach area and is electrically coupled to the RF transmission path of the RF signal. The first capacitor is configured to simultaneously match an impedance of the RF transistor at a fundamental frequency of the RF signal and to filter a higher order harmonic of the fundamental frequency.
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公开(公告)号:US20190044483A1
公开(公告)日:2019-02-07
申请号:US15667195
申请日:2017-08-02
Applicant: Infineon Technologies AG
Inventor: Bayaner Arigong , Richard Wilson , Haedong Jang , Frank Trang , Timothy Canning , Rongguo Zhou , Bjoern Herrmann
Abstract: An RF package includes a metal flange, an RF input lead, an RF output lead, and an electrically conductive die attach area. An RF transistor that is configured to amplify an RF signal is mounted in the die attach area. The RF transistor includes an input terminal that is electrically coupled to the RF input lead, an output terminal that is electrically coupled to the RF output lead, and a reference potential terminal that is electrically connected to the die attach area. A first capacitor having one or more upper metal plates, and a dielectric region is mounted in the die attach area and is electrically coupled to the RF transmission path of the RF signal. The first capacitor is configured to simultaneously match an impedance of the RF transistor at a fundamental frequency of the RF signal and to filter a higher order harmonic of the fundamental frequency.
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公开(公告)号:US10050591B2
公开(公告)日:2018-08-14
申请号:US15078298
申请日:2016-03-23
Applicant: Infineon Technologies AG
Inventor: Saurabh Goel , Richard Wilson , Haedong Jang
Abstract: An amplifier is configured to amplify an RF signal as between an input terminal and an output terminal across a wideband frequency range. A first LC network is connected to the input terminal and has first and second reactive components. A first switching device is connected between the first and second reactive components and couples both the first and second reactive components to the input terminal in an ON state, and disconnects the second reactive component from the input terminal in an OFF state. A second LC network is connected to the output terminal and has third and fourth reactive components. A second switching device is connected between the third and fourth reactive components and couples both the third and fourth reactive components to the output terminal in an ON state and disconnects the fourth reactive component from the output terminal in an OFF state.
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公开(公告)号:US20180175811A1
公开(公告)日:2018-06-21
申请号:US15386039
申请日:2016-12-21
Applicant: Infineon Technologies AG
Inventor: Timothy Canning , Richard Wilson , Haedong Jang , David Seebacher , Christian Schuberth , Rongguo Zhou , Bayaner Arigong
CPC classification number: H03F1/565 , H01L23/66 , H01L2223/6611 , H01L2223/6655 , H03F3/195 , H03F3/213 , H03F2200/111 , H03F2200/222 , H03F2200/387 , H03F2200/451 , H03H7/1758 , H03H7/38
Abstract: An amplifier circuit includes an RF input port, an RF output port, a reference potential port, and an RF amplifier having an input terminal and a first output terminal. An output impedance matching network electrically couples the first output terminal to the RF output port. A first inductor is electrically connected in series between the first output terminal and the RF output port, a first LC resonator is directly electrically connected between the first output terminal and the reference potential port, and a second LC resonator is directly electrically connected between the first output terminal and the reference potential port. The first LC resonator is configured to compensate for an output capacitance of the RF amplifier at a center frequency of the RF signal. The second LC resonator is configured to compensate for a second order harmonic of the RF signal.
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