公开(公告)号：US08743554B2

公开(公告)日：2014-06-03

申请号：US12655834

申请日：2010-01-08

Applicant: James V. Russell

Inventor： James V. Russell

IPC: H05K1/18

CPC classification number: H05K1/185 ,  H05K1/023 ,  H05K1/0231 ,  H05K1/0234 ,  H05K3/4046 ,  H05K2201/096 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49146 ,  Y10T29/53174

Abstract: Embedding a power modification component such as a capacitance inside of an adaptor board located to extend over and beyond the vias of the main circuit board so that a portion of the interposer board containing the embedded capacitance is located beyond where the vias or blinds are located. This permits that via to conduct through the opening. In this way, the capacitance and the resistance will have a closer contact point to the electrical component. A resistance can also be embedded in an opening in the adaptor board and be vertically aligned within the opening to make contact with a pad on top of the adaptor board and a pad at the bottom of the adaptor board so that electricity conducts through the embedded component.

Abstract translation: 将诸如电容内部的功率改进组件嵌入到位于主电路板的通孔之上延伸超过主电路板的通孔的电容器内，使得包含嵌入电容的插入板的部分位于通孔或百叶窗所在的位置之外。 这允许via通过开放。 以这种方式，电容和电阻将具有与电气部件更接近的接触点。 电阻也可以嵌入到适配器板的开口中并且在开口内垂直对准以与适配器板的顶部上的焊盘接触并且在适配器板的底部具有焊盘，使得电通过嵌入部件 。

公开(公告)号：US20120081867A1

公开(公告)日：2012-04-05

申请号：US13200672

申请日：2011-09-28

Applicant: Thomas P. Warwick ,  James V. Russell

Inventor： Thomas P. Warwick ,  James V. Russell

IPC: H05K1/18 ,  H05K3/30

CPC classification number: H05K1/0233 ,  H05K1/113 ,  H05K1/185 ,  H05K2201/1053 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/4913

Abstract: The present disclosure relates to reducing unwanted RF noise in a printed circuit board (PCB) containing an RF device. An isolation filter is embedded in a PCB containing an RDF device. By placing the isolation filter as close as possible to the RF device in order to dramatically reduce unwanted RF noise due to unavoidable coupling between Vias and planes in the PCB structure.

Abstract translation: 本公开涉及减少包含RF设备的印刷电路板（PCB）中的不期望的RF噪声。 隔离滤波器嵌入在包含RDF设备的PCB中。 通过将隔离滤波器放置在尽可能靠近RF器件的位置，以便显着减少不必要的RF噪声，这是由于通孔和PCB结构中的平面之间的不可避免的耦合。

公开(公告)号：US20110223780A1

公开(公告)日：2011-09-15

申请号：US13065006

申请日：2011-03-11

Applicant: James V. Russell

Inventor： James V. Russell

IPC: H01R12/71

CPC classification number: H01R12/7082 ,  H01R12/57

Abstract: An electrical connector electrically connects either an adaptor board or an electrical component to a main circuit board through the use of a thin printed circuit having an array of pads one each side where on one side the pads are connected to a main circuit board by solder balls, solder columns conductive epoxy or any other way practiced in the art and on the other side of the thin circuit the pads are connected to an adaptor board by a conductive compliant elastomeric material. The sides of the thin printed circuit are electrically connected to one another in ways practiced in the art.

Abstract translation: 电连接器通过使用具有垫阵列的薄印刷电路将适配器板或电气部件电连接到主电路板，每个侧面上的焊盘通过焊球连接到主电路板 ，焊料柱导电环氧树脂或在本领域中实践的任何其它方式，并且在薄电路的另一侧，焊盘通过导电柔性弹性体材料连接到适配器板。 薄印刷电路的侧面以本领域实践的方式彼此电连接。

公开(公告)号：US07931476B2

公开(公告)日：2011-04-26

申请号：US12799712

申请日：2010-04-30

Applicant: James V. Russell

Inventor： James V. Russell

IPC: H01R9/09

CPC classification number: H01R13/2414 ,  H01R4/58 ,  H01R13/03 ,  H05K3/245 ,  H05K3/326 ,  H05K2201/0314 ,  H05K2201/10719

Abstract: An electrical connector using an isotropic conductive elastomer as the interconnect medium.

Abstract translation: 使用各向同性导电弹性体作为互连介质的电连接器。

公开(公告)号：US07766667B2

公开(公告)日：2010-08-03

申请号：US12316677

申请日：2008-12-16

Applicant: James V. Russell

Inventor： James V. Russell

IPC: H01R9/09

CPC classification number: H01R13/2414 ,  H01R4/58 ,  H01R13/03 ,  H05K3/245 ,  H05K3/326 ,  H05K2201/0314 ,  H05K2201/10719

Abstract: An electrical connector using an isotropic conductive elastomer as the interconnect medium.

Abstract translation: 使用各向同性导电弹性体作为互连介质的电连接器。

公开(公告)号：US20090156029A1

公开(公告)日：2009-06-18

申请号：US12316677

申请日：2008-12-16

Applicant: James V. Russell

Inventor： James V. Russell

IPC: H01R4/58

CPC classification number: H01R13/2414 ,  H01R4/58 ,  H01R13/03 ,  H05K3/245 ,  H05K3/326 ,  H05K2201/0314 ,  H05K2201/10719

Abstract: An electrical connector using an isotropic conductive elastomer as the interconnect medium.

Abstract translation: 使用各向同性导电弹性体作为互连介质的电连接器。

公开(公告)号：US09793226B2

公开(公告)日：2017-10-17

申请号：US15055089

申请日：2016-02-26

Applicant: Thomas P. Warwick ,  James V. Russell ,  Dhananjaya Turpuseema

Inventor： Thomas P. Warwick ,  James V. Russell ,  Dhananjaya Turpuseema

IPC: H05K1/00 ,  H01L23/66 ,  H01L23/64 ,  G01R1/073 ,  G01R31/28

CPC classification number: H01L23/66 ,  G01R1/07342 ,  G01R31/2851 ,  G01R31/2889 ,  G01R31/2896 ,  G01R31/31905 ,  H01L23/642

Abstract: The present invention describes essentially three different embodiments for the implementation of low impedance (over frequency) power delivery to a die. Such low impedance to a high frequency allows the die to operate at package-level speed, thus reducing yield loss at the packaging level. Each embodiment addresses a slightly different aspect of the overall wafer probe application. In each embodiment, however, the critical improvement of this disclosure is the location of the passive components used for supply filtering/decoupling relative to prior art. All three embodiments require a method to embed the passive components in close proximity to the pitch translation substrate or physically in the pitch translation substrate.

公开(公告)号：US20170250146A1

公开(公告)日：2017-08-31

申请号：US15055089

申请日：2016-02-26

Applicant: Thomas P. Warwick ,  James V. Russell ,  Dhananjaya Turpuseema

Inventor： Thomas P. Warwick ,  James V. Russell ,  Dhananjaya Turpuseema

IPC: H01L23/66 ,  G01R1/073 ,  G01R31/28 ,  H01L23/64

CPC classification number: H01L23/66 ,  G01R1/07342 ,  G01R31/2851 ,  G01R31/2889 ,  G01R31/2896 ,  G01R31/31905 ,  H01L23/642

Abstract: The present invention describes essentially three different embodiments for the implementation of low impedance (over frequency) power delivery to a die. Such low impedance to a high frequency allows the die to operate at package-level speed, thus reducing yield loss at the packaging level. Each embodiment addresses a slightly different aspect of the overall wafer probe application. In each embodiment, however, the critical improvement of this disclosure is the location of the passive components used for supply filtering/decoupling relative to prior art. All three embodiments require a method to embed the passive components in close proximity to the pitch translation substrate or physically in the pitch translation substrate.

公开(公告)号：US09468108B2

公开(公告)日：2016-10-11

申请号：US13987440

申请日：2013-07-25

Applicant: Dan Turpuseema ,  James V. Russell

Inventor： Dan Turpuseema ,  James V. Russell

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/42 ,  H05K3/40 ,  H05K3/24

CPC classification number: H05K3/425 ,  H05K1/113 ,  H05K1/115 ,  H05K3/0094 ,  H05K3/243 ,  H05K3/4007 ,  H05K3/427 ,  H05K2201/0959 ,  Y10T29/49156

Abstract: A method and an apparatus for forming a contact pad on a printed circuit board over a filled plate via or blind in which an additional metallic or a non metallic coating is applied to a final surface finished plate which encapsulates the side walls of the wear resistant surface plate, and also covers the side walls of the metal layer plated onto the filled via and the wrap around plated metal which was plated in the via and onto the surface of the base metal to the extents of the pad geometry. This prevents subsequent undermining through the etching process and ensuring the integrity and reliability of the vias' electrical connection when an underlying base metal such as but not limited to copper and the surface plated metal are formed when plating metal in the via and consequently onto the surface.

Abstract translation: 一种用于在印刷电路板上形成接触焊盘的方法和装置，该印刷电路板在填充板通孔或盲孔上，其中附加的金属或非金属涂层施加到封装耐磨表面的侧壁的最终表面成品板 并且还覆盖镀在填充的通孔上的金属层的侧壁和镀在金属上的包裹物，其镀覆在基底金属的通孔中并达到基底金属的表面，达到垫几何形状的范围。 这防止了当通过通孔电镀金属并因此到达表面时形成下面的基底金属（例如但不限于铜）和表面电镀金属时，通过蚀刻工艺的后续破坏并确保通孔的电连接的完整性和可靠性 。

公开(公告)号：US20140069704A1

公开(公告)日：2014-03-13

申请号：US13987440

申请日：2013-07-25

Applicant: Dan Turpuseema ,  James V. Russell

Inventor： Dan Turpuseema ,  James V. Russell

IPC: H05K3/42 ,  H05K1/11

CPC classification number: H05K3/425 ,  H05K1/113 ,  H05K1/115 ,  H05K3/0094 ,  H05K3/243 ,  H05K3/4007 ,  H05K3/427 ,  H05K2201/0959 ,  Y10T29/49156

Abstract: A method and an apparatus for forming a contact pad on a printed circuit board over a filled plate via or blind in which an additional metallic or a non metallic coating is applied to a final surface finished plate which encapsulates the side walls of the wear resistant surface plate, and also covers the side walls of the metal layer plated onto the filled via and the wrap around plated metal which was plated in the via and onto the surface of the base metal to the extents of the pad geometry. This prevents subsequent undermining through the etching process and ensuring the integrity and reliability of the vias' electrical connection when an underlying base metal such as but not limited to copper and the surface plated metal are formed when plating metal in the via and consequently onto the surface.

Abstract translation: 一种用于在印刷电路板上形成接触焊盘的方法和装置，该印刷电路板在填充板通孔或盲孔上，其中附加的金属或非金属涂层施加到封装耐磨表面的侧壁的最终表面成品板 并且还覆盖镀在填充的通孔上的金属层的侧壁和镀在金属上的包裹物，其镀覆在基底金属的通孔中并达到基底金属的表面，达到垫几何形状的范围。 这防止了当通过通孔电镀金属并因此到达表面时形成下面的基底金属（例如但不限于铜）和表面电镀金属时，通过蚀刻工艺的后续破坏并确保通孔的电连接的完整性和可靠性 。