公开(公告)号：US08247889B2

公开(公告)日：2012-08-21

申请号：US12856389

申请日：2010-08-13

Applicant: Kuo-Hsien Liao ,  Jian-Cheng Chen

Inventor： Kuo-Hsien Liao ,  Jian-Cheng Chen

IPC: H01L23/552 ,  H01L23/58

CPC classification number: H05K9/0022 ,  H01L23/552 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K3/284 ,  H05K2201/09972 ,  H05K2203/1316 ,  Y10T29/49146 ,  H01L2224/81

Abstract: The present invention relates to a package having an inner shield and a method for making the same. The package includes a substrate, a plurality of electrical elements, a molding compound, an inner shield and a conformal shield. The electrical elements are disposed on the substrate. The molding compound is disposed on a surface of the substrate, encapsulates the electrical elements, and includes at least one groove. The groove penetrates a top surface and a bottom surface of the molding compound and is disposed between the electrical elements, and there is a gap between a short side of the groove and a side surface of the molding compound. The inner shield is disposed in the groove and electrically connected to the substrate. The conformal shield covers the molding compound and a side surface of the substrate, and electrically connects the substrate and the inner shield. Therefore, the inner shield enables the electrical elements to have low electromagnetic interference and high electromagnetic compatibility.

Abstract translation: 本发明涉及具有内屏蔽的封装及其制造方法。 封装包括基板，多个电气元件，模塑料，内护罩和保形罩。 电气元件设置在基板上。 模塑料被设置在基板的表面上，封装电气元件，并且包括至少一个凹槽。 凹槽穿过模制化合物的顶表面和底表面并且设置在电气元件之间，并且在凹槽的短边和模塑料的侧表面之间存在间隙。 内屏蔽件设置在凹槽中并电连接到基板。 共形屏蔽覆盖模塑料和基板的侧表面，并且电连接基板和内屏蔽。 因此，内部屏蔽使得电气元件具有低电磁干扰和高电磁兼容性。

公开(公告)号：US20110090659A1

公开(公告)日：2011-04-21

申请号：US12856389

申请日：2010-08-13

Applicant: Kuo-Hsien Liao ,  Jian-Cheng Chen

Inventor： Kuo-Hsien Liao ,  Jian-Cheng Chen

IPC: H05K7/02 ,  H05K3/10

CPC classification number: H05K9/0022 ,  H01L23/552 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K3/284 ,  H05K2201/09972 ,  H05K2203/1316 ,  Y10T29/49146 ,  H01L2224/81

Abstract: The present invention relates to a package having an inner shield and a method for making the same. The package includes a substrate, a plurality of electrical elements, a molding compound, an inner shield and a conformal shield. The electrical elements are disposed on the substrate. The molding compound is disposed on a surface of the substrate, encapsulates the electrical elements, and includes at least one groove. The groove penetrates a top surface and a bottom surface of the molding compound and is disposed between the electrical elements, and there is a gap between a short side of the groove and a side surface of the molding compound. The inner shield is disposed in the groove and electrically connected to the substrate. The conformal shield covers the molding compound and a side surface of the substrate, and electrically connects the substrate and the inner shield. Therefore, the inner shield enables the electrical elements to have low electromagnetic interference and high electromagnetic compatibility.

Abstract translation: 本发明涉及具有内屏蔽的封装及其制造方法。 封装包括基板，多个电气元件，模塑料，内护罩和保形罩。 电气元件设置在基板上。 模塑料被设置在基板的表面上，封装电气元件，并且包括至少一个凹槽。 凹槽穿过模制化合物的顶表面和底表面并且设置在电气元件之间，并且在凹槽的短边和模塑料的侧表面之间存在间隙。 内屏蔽件设置在凹槽中并电连接到基板。 共形屏蔽覆盖模塑料和基板的侧表面，并且电连接基板和内屏蔽。 因此，内部屏蔽使得电气元件具有低电磁干扰和高电磁兼容性。

公开(公告)号：US20100207259A1

公开(公告)日：2010-08-19

申请号：US12770645

申请日：2010-04-29

Applicant: Kuo-Hsien Liao ,  Jian-Cheng Chen ,  Chen-Chuan Fan ,  Chi-Tsung Chiu ,  Chih-Pin Hung

Inventor： Kuo-Hsien Liao ,  Jian-Cheng Chen ,  Chen-Chuan Fan ,  Chi-Tsung Chiu ,  Chih-Pin Hung

IPC: H01L23/552 ,  H01L21/78

CPC classification number: H01L23/552 ,  H01L21/6835 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2221/68331 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401

Abstract: Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes a grounding element disposed adjacent to a periphery of a substrate unit and at least partially extending between an upper surface and a lower surface of the substrate unit. The grounding element includes an indented portion that is disposed adjacent to a lateral surface of the substrate unit. The semiconductor device package also includes an EMI shield that is electrically connected to the grounding element and is inwardly recessed adjacent to the indented portion of the grounding element.

Abstract translation: 这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。 在一个实施例中，半导体器件封装包括邻近衬底单元的周边设置并至少部分地在衬底单元的上表面和下表面之间延伸的接地元件。 接地元件包括与衬底单元的侧表面相邻设置的凹入部分。 半导体器件封装还包括EMI屏蔽，其电连接到接地元件并且与接地元件的凹入部分相邻地向内凹陷。

公开(公告)号：US20070266152A1

公开(公告)日：2007-11-15

申请号：US11410762

申请日：2006-04-25

Applicant: Jian-Cheng Chen

Inventor： Jian-Cheng Chen

IPC: G06F15/173

CPC classification number: G06F21/34 ,  G06F2221/2101 ,  G06F2221/2129 ,  G06F2221/2137

Abstract: A method for controlling access to a computer first provides a peripheral device with an identification number, and which is coupled to a computer. Next, the accuracy of the identification number of the coupled peripheral device is verified. Operation of the computer is prevented if the identification number is not correct. On the other hand, if the identification number is correct, a first predetermined time for operation of the computer is counted, and then operation of the computer is prevented after the first predetermined time has elapsed.

Abstract translation: 用于控制对计算机的访问的方法首先为外围设备提供识别号，并且其耦合到计算机。 接下来，验证耦合的外围设备的识别号码的精度。 如果识别号码不正确，则防止计算机的操作。 另一方面，如果识别号码正确，则对计算机的操作的第一预定时间进行计数，然后在经过第一预定时间之后防止计算机的操作。

公开(公告)号：US08373285B2

公开(公告)日：2013-02-12

申请号：US13076947

申请日：2011-03-31

Applicant: Jian-Cheng Chen

Inventor： Jian-Cheng Chen

IPC: H01L23/31

CPC classification number: H01L23/24 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/078 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A chip module and a fabricating method thereof are provided. Firstly, a substrate is provided. Next, a chip is assembled on the substrate and electrically connected with the substrate. Afterward, a plurality of passive units is assembled on the substrate in the style of encircling the chip. Then, a first glue structure is filled between the passive units so that an encircled area is defined by the first glue structure and the passive units. Then, a second glue structure is filled in the encircled area so that the chip is covered by the second glue structure.

Abstract translation: 提供了芯片模块及其制造方法。 首先，提供基板。 接下来，将芯片组装在基板上并与基板电连接。 之后，以围绕芯片的方式将多个无源单元组装在基板上。 然后，在被动单元之间填充第一胶结构，使得由第一胶结构和被动单元限定环绕的区域。 然后，在包围的区域填充第二胶结构，使得芯片被第二胶结构覆盖。

公开(公告)号：US08358393B2

公开(公告)日：2013-01-22

申请号：US12482589

申请日：2009-06-11

Applicant: Chih-Yung Hsieh ,  Chien-Hong Chen ,  Jian-Cheng Chen

Inventor： Chih-Yung Hsieh ,  Chien-Hong Chen ,  Jian-Cheng Chen

IPC: G02F1/1343

CPC classification number: G02F1/134309 ,  G02F1/133707 ,  G02F2001/133354 ,  G02F2001/134345

Abstract: In one embodiment of an invention concerning liquid crystal display devices, a first pixel electrode of a thin film transistor (TFT) array substrate may overlap a slit of a second pixel electrode of the TFT array substrate but not overlap another slit of the second pixel electrode. This may help induce a multi-domain electric field without having to precisely position a common electrode of a color filter substrate and the TFT array substrate. This may prevent position errors, enhance display quality, produce a wider viewing angle, and lower color shift sometimes associated with conventional liquid crystal display devices and methods.

Abstract translation: 在关于液晶显示装置的发明的一个实施例中，薄膜晶体管（TFT）阵列基板的第一像素电极可以与TFT阵列基板的第二像素电极的狭缝重叠，但不与第二像素电极的另一个狭缝重叠 。 这可能有助于诱导多畴电场，而不必精确地定位滤色器基板和TFT阵列基板的公共电极。 这可以防止位置误差，增强显示质量，产生更宽的视角，并且有时与常规液晶显示装置和方法相关联地降低颜色偏移。

公开(公告)号：US20090065953A1

公开(公告)日：2009-03-12

申请号：US12230829

申请日：2008-09-05

Applicant: Jian-Cheng Chen

Inventor： Jian-Cheng Chen

IPC: H01L23/16 ,  H01L21/58

CPC classification number: H01L23/24 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/078 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A chip module and a fabricating method thereof are provided. Firstly, a substrate is provided. Next, a chip is assembled on the substrate and electrically connected with the substrate. Afterward, a plurality of passive units is assembled on the substrate in the style of encircling the chip. Then, a first glue structure is filled between the passive units so that an encircled area is defined by the first glue structure and the passive units. Then, a second glue structure is filled in the encircled area so that the chip is covered by the second glue structure.

Abstract translation: 提供了芯片模块及其制造方法。 首先，提供基板。 接下来，将芯片组装在基板上并与基板电连接。 之后，以围绕芯片的方式将多个无源单元组装在基板上。 然后，在被动单元之间填充第一胶结构，使得由第一胶结构和被动单元限定环绕的区域。 然后，在包围的区域填充第二胶结构，使得芯片被第二胶结构覆盖。

公开(公告)号：US08537315B2

公开(公告)日：2013-09-17

申请号：US13084799

申请日：2011-04-12

Applicant: Jian-Cheng Chen ,  Chih-Yung Hsieh ,  Bo-Chin Tsuei

Inventor： Jian-Cheng Chen ,  Chih-Yung Hsieh ,  Bo-Chin Tsuei

IPC: G02F1/1337 ,  G02F1/1343

CPC classification number: G02F1/133707 ,  G02F1/133753 ,  G02F1/134309

Abstract: A liquid crystal display (LCD) structure is provided. A first alignment layer and a first electrode layer are disposed on a liquid crystal layer. A second electrode layer and a second alignment layer disposed under the liquid crystal layer. The first alignment layer and the second alignment layer respectively have a plurality of alignment areas with different aligning directions. At least one of the first electrode layer and the second electrode layer includes a substrate material and a plurality of openings, and at least includes a plurality of electrode areas. The boundaries of the electrode areas correspond to the boundaries of the alignment areas. The directions of the openings in the electrode areas are between the aligning directions of the corresponding alignment areas of the first alignment layer and the second alignment layer.

Abstract translation: 提供了液晶显示（LCD）结构。 第一取向层和第一电极层设置在液晶层上。 设置在液晶层下方的第二电极层和第二取向层。 第一取向层和第二取向膜分别具有不同的取向方向的多个取向区域。 第一电极层和第二电极层中的至少一个包括基板材料和多个开口，并且至少包括多个电极区域。 电极区域的边界对应于对准区域的边界。 电极区域中的开口方向位于第一取向层和第二取向层的对应取向区域的​​对准方向之间。

公开(公告)号：US20120295187A1

公开(公告)日：2012-11-22

申请号：US13111980

申请日：2011-05-20

Applicant: Chen-Hua Tsai ,  Jian-Cheng Chen ,  Chin-Yueh Tsai ,  Yao-Jen Fan ,  Heng-Kun Chen ,  Hsiang Yang

Inventor： Chen-Hua Tsai ,  Jian-Cheng Chen ,  Chin-Yueh Tsai ,  Yao-Jen Fan ,  Heng-Kun Chen ,  Hsiang Yang

IPC: G03F1/00 ,  G06F17/50

CPC classification number: G03F1/70 ,  G06F17/5072 ,  G06F2217/12 ,  H01L21/0334 ,  H01L23/48 ,  H01L23/481 ,  H01L23/528 ,  H01L2924/0002 ,  Y02P90/265 ,  H01L2924/00

Abstract: A method for generating dummy patterns includes providing a layout region having a layout pattern with a first density, inserting a plurality of first dummy patterns with a second density corresponding to the first density in the layout pattern, dividing the layout region into a plurality of sub-regions with a third density, adjusting a size of the first dummy pattern according to a difference between the second density and the third density, and outputting the layout pattern and the first dummy patterns on a photomask.

Abstract translation: 一种用于产生虚拟图案的方法包括提供具有第一密度的布局图案的布局区域，在布局图案中插入具有与第一密度对应的第二密度的多个第一伪图案，将布局区域分成多个子图 具有第三密度的区域，根据第二密度和第三密度之间的差来调整第一伪图案的尺寸，并将布局图案和第一伪图案输出到光掩模上。

公开(公告)号：US20120025356A1

公开(公告)日：2012-02-02

申请号：US13114915

申请日：2011-05-24

Applicant: Kuo-Hsien Liao ,  Chi-Hong Chan ,  Jian-Cheng Chen ,  Chian-Her Ueng ,  Yu-Hsiang Sun

Inventor： Kuo-Hsien Liao ,  Chi-Hong Chan ,  Jian-Cheng Chen ,  Chian-Her Ueng ,  Yu-Hsiang Sun

IPC: H01L23/552 ,  H01L21/78

CPC classification number: H01L24/97 ,  H01L23/3121 ,  H01L23/49805 ,  H01L23/552 ,  H01L24/16 ,  H01L24/48 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The semiconductor device package includes a conformal shield layer applied to the exterior surface of the encapsulant. and an internal fence or separation structure embedded in the encapsulant. The fence separates the package into various compartments. with each compartment containing at least one die. The fence thus suppresses EMI between adjacent packages. The package further includes a ground path connected to the internal fence and conformal shield.

Abstract translation: 半导体器件封装包括施加到密封剂的外表面的保形屏蔽层。 以及嵌入密封剂中的内部围栏或分离结构。 围栏将包装分成各个隔间。 每个隔间包含至少一个模具。 因此，围栏可以抑制相邻包装之间的EMI。 该封装还包括连接到内部栅栏和保形屏蔽的接地路径。