公开(公告)号：US20080315183A1

公开(公告)日：2008-12-25

申请号：US12052229

申请日：2008-03-20

申请人： Atsuhiro KINOSHITA ,  Yoshifumi Nishi ,  Ken Uchida ,  Junji Koga

发明人： Atsuhiro KINOSHITA ,  Yoshifumi Nishi ,  Ken Uchida ,  Junji Koga

IPC分类号： H01L29/12 ,  H01L21/336

CPC分类号： H01L51/105 ,  B82Y10/00 ,  H01L51/0048 ,  H01L51/0512 ,  H01L51/0541 ,  H01L51/0545

摘要： A high-performance semiconductor device having a channel region structured from a carbon nanotube (CNT) for reducing or minimizing a drain leakage current is provided. This semiconductor device includes, in addition to the CNT-formed channel region, a gate electrode formed to overlie the channel region with a gate insulation film sandwiched therebetween, and a pair of source and drain regions interposing the channel region therebetween. The source and drain regions have portions in contact with the channel region, which portions are made of a specific semiconductor material that is wider in energy band gap than the channel region.

摘要翻译： 提供了一种具有由碳纳米管（CNT）构成的沟道区，用于降低或最小化漏极漏电流的高性能半导体器件。 除了CNT形成的沟道区域之外，该半导体器件还包括形成为覆盖沟道区域的栅电极，其间夹有栅极绝缘膜，并且在其间插入沟道区域的一对源极和漏极区域。 源极区和漏极区具有与沟道区接触的部分，这些部分由能量带隙比通道区宽的特定半导体材料制成。

公开(公告)号：US07111029B2

公开(公告)日：2006-09-19

申请号：US10235827

申请日：2002-09-06

申请人： Shinobu Fujita ,  Ken Uchida ,  Ryuji Ohba ,  Junji Koga

发明人： Shinobu Fujita ,  Ken Uchida ,  Ryuji Ohba ,  Junji Koga

IPC分类号： G06F1/02

CPC分类号： H04L9/0861 ,  G06F7/588

摘要： A random number generating circuit can generate random numbers with high randomness, and can be made as a compact integrated circuit. The random number generating circuit includes an uncertain logic circuit having a flip-flop type logic circuit that gives digital output values not determined definitely by a digital input value, and an equalizing circuit having an exclusive OR operating circuit for equalizing appearance frequencies of “0” and “1” in the digital output values output from the uncertain logic circuit.

公开(公告)号：US4916174A

公开(公告)日：1990-04-10

申请号：US243719

申请日：1988-09-13

申请人： Akira Yoshizumi ,  Shinetsu Fujieda ,  Ken Uchida ,  Naoko Kihara ,  Kazuhiro Sawai ,  Tsutomu Nagata ,  Shinji Murakami ,  Shigeyuki Kouchiyama

发明人： Akira Yoshizumi ,  Shinetsu Fujieda ,  Ken Uchida ,  Naoko Kihara ,  Kazuhiro Sawai ,  Tsutomu Nagata ,  Shinji Murakami ,  Shigeyuki Kouchiyama

IPC分类号： C08L61/10 ,  C08L9/00 ,  C08L51/04 ,  C08L55/02 ,  C08L61/04 ,  C08L61/06 ,  C08L63/00 ,  H01B3/40

CPC分类号： H01B3/40 ,  C08L61/06 ,  C08L63/00

摘要： A rubber-modified phenolic resin composition contains a novolak-type phenolic resin in which at least one modifying agent selected from the group consisting of an ABS resin and an MBS resin is homogeneously dispersed. The composition has good impact resistance and thermal shock resistance. The composition is prepared by adding at least one modifying agent described above to a novolak-type phenolic resin which is heated and melted at its softening point or more, so that the modifying agent is homogeneous dispersed in the resin. The resin composition is suitably used as a curing agent for an epoxy resin encapsulant for sealing electronic devices.

公开(公告)号：US20100213533A1

公开(公告)日：2010-08-26

申请号：US12773967

申请日：2010-05-05

申请人： Masumi SAITOH ,  Ken Uchida

发明人： Masumi SAITOH ,  Ken Uchida

IPC分类号： H01L29/788

CPC分类号： H01L29/42324 ,  H01L21/28273 ,  H01L29/165 ,  H01L29/7881

摘要： A non-volatile semiconductor storage device includes: a semiconductor substrate; a source region and a drain region formed in the semiconductor substrate so as to be separated from each other; a first insulating film formed between the source region and the drain region, on the semiconductor substrate; a floating electrode formed on the first insulating film and including a semiconductor conductive material layer having extension strain; a second insulating film formed on the floating electrode; and a control electrode formed on the second insulating film. The extension strain of the floating electrode becomes gradually small as the location advances from the second insulating film toward the first insulating film, and the floating electrode has extension strain of 0.01% or more at an interface between the floating electrode and the second insulating film, and has extension strain less than 0.01% at an interface between the floating electrode and the first insulating film.

摘要翻译： 非易失性半导体存储器件包括：半导体衬底; 源极区域和漏极区域，形成在半导体衬底中以便彼此分离; 在所述半导体衬底上形成在所述源极区域和所述漏极区域之间的第一绝缘膜; 形成在所述第一绝缘膜上并具有延伸应变的半导体导电材料层的浮动电极; 形成在浮置电极上的第二绝缘膜; 以及形成在所述第二绝缘膜上的控制电极。 浮动电极的延伸应变随着位置从第二绝缘膜向第一绝缘膜前进而逐渐变小，浮动电极在浮动电极和第二绝缘膜之间的界面具有0.01％以上的延伸应变， 并且在浮动电极和第一绝缘膜之间的界面处具有小于0.01％的延伸应变。

公开(公告)号：US07781274B2

公开(公告)日：2010-08-24

申请号：US12210328

申请日：2008-09-15

申请人： Yukio Nakabayashi ,  Ken Uchida

发明人： Yukio Nakabayashi ,  Ken Uchida

IPC分类号： H01L21/00

CPC分类号： H01L29/66795 ,  H01L29/785

摘要： A multi-gate field effect transistor includes: a plurality of semiconductor layers arranged in parallel on a substrate; source and drain regions formed in each of the semiconductor layers; channel regions each provided between the source region and the drain region in each of the semiconductor layers; protection films each provided on an upper face of each of the channel regions; gate insulating films each provided on both side faces of each of the channel regions; a plurality of gate electrodes provided on both side faces of each of the channel regions so as to interpose the gate insulating film, provided above the upper face of each of the channel region so as to interpose the protection film, and containing a metal element; a connecting portion connecting upper faces of the gate electrodes; and a gate wire connected to the connecting portion.

摘要翻译： 多栅极场效应晶体管包括：平行布置在衬底上的多个半导体层; 形成在每个半导体层中的源区和漏区; 沟道区域，每个沟道区域设置在每个半导体层中的源极区域和漏极区域之间; 保护膜分别设置在每个通道区域的上表面上; 栅极绝缘膜各自设置在每个沟道区域的两个侧面上; 设置在每个沟道区域的两个侧面上的多个栅电极，以便设置在每个沟道区域的上表面上方的栅极绝缘膜，以便插入保护膜，并且容纳金属元件; 连接所述栅电极的上表面的连接部; 以及连接到连接部分的栅极线。

公开(公告)号：US07605422B2

公开(公告)日：2009-10-20

申请号：US11846830

申请日：2007-08-29

申请人： Masumi Saitoh ,  Ken Uchida

发明人： Masumi Saitoh ,  Ken Uchida

IPC分类号： H01L29/792

CPC分类号： H01L29/4234 ,  H01L21/845 ,  H01L27/115 ,  H01L27/11568 ,  H01L27/1211 ,  H01L29/66795 ,  H01L29/66833 ,  H01L29/785 ,  H01L29/792

摘要： A semiconductor device capable of realizing low-voltage drivability and large storage capacity (miniaturization) by achieving large threshold voltage shifts and long retention time while at the same time suppressing variations in characteristics among memory cells is disclosed. The device includes a semiconductor memory cell having a channel region formed in a semiconductor substrate, a tunnel insulator film on the channel region, a charge storage insulator film on the tunnel insulator film, a control dielectric film on the charge storage film, a control electrode on the control dielectric film, and source/drain regions at opposite ends of the channel region. The memory cell's channel region has a cross-section at right angles to a direction along the channel length, the width W and height H of which are each less than or equal to 10 nm.

摘要翻译： 公开了一种半导体器件，其能够通过实现大的阈值电压偏移和长的保持时间来实现低电压驱动性和大的存储容量（小型化），同时抑制存储器单元之间的特性变化。 该器件包括半导体存储单元，其具有形成在半导体衬底中的沟道区，沟道区上的隧道绝缘膜，隧道绝缘膜上的电荷存储绝缘膜，电荷存储膜上的控制电介质膜，控制电极 在控制电介质膜上，以及在沟道区的相对端处的源/漏区。 存储单元的沟道区域具有与沿着沟道长度的方向成直角的横截面，其宽度W和高度H都小于或等于10nm。

公开(公告)号：US06787795B2

公开(公告)日：2004-09-07

申请号：US09990362

申请日：2001-11-23

申请人： Ken Uchida ,  Junji Koga ,  Ryuji Ohba

发明人： Ken Uchida ,  Junji Koga ,  Ryuji Ohba

IPC分类号： H01L2906

CPC分类号： B82Y10/00 ,  H01L29/7888 ,  H01L49/006 ,  H03K19/08

摘要： A logic apparatus having first and second single-electron devices connected serially or in parallel. Each of the single-electron devices includes a conductive island insulatively disposed between two tunnel barriers, which separate the conductive island from respective source/drain electrodes. A first charge storage region is insulatively disposed over and under the conductive island and a gate electrode, respectively. When charges are accumulated in the charge storage region, a Coulomb oscillation of the respective device is shifted by a half-period from the Coulomb oscillation that results when no charge has accumulated therein.

摘要翻译： 具有串联或并联连接的第一和第二单电子器件的逻辑器件。 每个单电子器件包括绝缘地设置在两个隧道势垒之间的导电岛，其将导电岛与相应的源/漏电极分离。 第一电荷存储区分别绝缘地设置在导电岛和栅电极之上和之下。 当在电荷存储区域中累积电荷时，各器件的库仑振荡从库仑振荡偏移了半周期，当没有电荷累积时产生库仑振荡。

公开(公告)号：US06680505B2

公开(公告)日：2004-01-20

申请号：US10107440

申请日：2002-03-28

申请人： Ryuji Ohba ,  Junji Koga ,  Ken Uchida

发明人： Ryuji Ohba ,  Junji Koga ,  Ken Uchida

IPC分类号： H01L2972

CPC分类号： G11C11/5671 ,  H01L21/28273 ,  H01L29/7883

摘要： A nonvolatile semiconductor storage element which has a charge stored layer as a floating gate, and whose storage time is made sufficiently long. The storage element comprises a channel region formed between a source region and a drain region; first and second tunnel insulator layers formed over the channel region and through which electrons can directly tunnel quantum-mechanically; and a conductive particle layer which is sandwiched in between the first and second tunnel insulator layers; the charge stored layer being formed on the second tunnel insulator layer. An energy level at which the information electron in the charge stored layer is injected is lower than the energy level of a conduction band edge in the channel region.

摘要翻译： 一种具有电荷存储层作为浮动栅极并且其存储时间足够长的非易失性半导体存储元件。 存储元件包括形成在源极区域和漏极区域之间的沟道区域; 形成在通道区域上的第一和第二隧道绝缘体层，电子可以通过其直接隧道量子力学; 以及夹在所述第一和第二隧道绝缘体层之间的导电性粒子层; 电荷存储层形成在第二隧道绝缘体层上。 注入电荷存储层中的信息电子的能级低于沟道区的导带边缘的能级。

公开(公告)号：US6060748A

公开(公告)日：2000-05-09

申请号：US997508

申请日：1997-12-23

申请人： Ken Uchida ,  Akira Toriumi ,  Akiko Ohata ,  Junji Koga

发明人： Ken Uchida ,  Akira Toriumi ,  Akiko Ohata ,  Junji Koga

IPC分类号： H01L21/84 ,  H01L23/528 ,  H01L27/12 ,  H01L25/00 ,  H01L29/00

CPC分类号： H01L23/5286 ,  H01L21/84 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/3011

摘要： A semiconductor integrated circuit (IC) device has a silicon-on-insulator substrate having a semiconductor substrate, an insulating film formed on the semiconductor substrate, and a silicon layer formed on the insulating film. The semiconductor IC device includes at least one semiconductor device formed on the semiconductor substrate, and at least one semiconductor device formed on the silicon layer and operated with a power-supply voltage different from a power-supply voltage for the semiconductor device formed on the semiconductor substrate.

摘要翻译： 半导体集成电路（IC）器件具有绝缘体上硅衬底，其具有半导体衬底，形成在半导体衬底上的绝缘膜和形成在绝缘膜上的硅层。 半导体IC器件包括形成在半导体衬底上的至少一个半导体器件和形成在硅层上的至少一个半导体器件，并且以形成在半导体上的半导体器件的电源电压不同的电源电压来操作 基质。

公开(公告)号：US5624788A

公开(公告)日：1997-04-29

申请号：US490614

申请日：1995-06-15

申请人： Shinji Murai ,  Yoshihiko Nakano ,  Ken Uchida ,  Shuji Hayase

发明人： Shinji Murai ,  Yoshihiko Nakano ,  Ken Uchida ,  Shuji Hayase

IPC分类号： B41M5/36 ,  C07F7/08 ,  C08F4/00 ,  C08G77/48 ,  C08G77/60 ,  C08L83/02 ,  C08L83/16 ,  G03F7/004 ,  G03F7/027 ,  G03F7/029 ,  G03F7/075 ,  G03F7/023 ,  G08G77/00

CPC分类号： G03F7/027 ,  B41M5/368 ,  C07F7/0821 ,  C08G77/60 ,  G03F7/0045 ,  G03F7/029 ,  G03F7/075 ,  G03F7/0757

摘要： Disclosed are an organic silicon compound having a repeating unit represented by general formula (I) shown below, a resist, a thermal polymerization composition and a photopolymerization composition containing the organic silicon compound, ##STR1## wherein R.sup.1 is a t-butyl group or a tetrahydropyranyl group, R.sup.2 is an hydrogen atom, a substituted or unsubstituted alkyl group having 1 to 24 carbon atoms, a substituted or unsubstituted aryl group having 1 to 24 carbon atoms, or a substituted or unsubstituted aralkyl having 7 to 24 carbon atoms, R.sup.3 is a substituted or unsubstituted alkyl group having 1 to 24 carbon atoms, a substituted or unsubstituted aryl group having 6 to 24 carbon atoms, a substituted or unsubstituted aralkyl group having 7 to 24 carbon atoms or an alkoxyl group, and k represents an integer from 0 to 4.

摘要翻译： 公开了具有下述通式（I）表示的重复单元的有机硅化合物，抗蚀剂，热聚合组合物和含有有机硅化合物的光聚合组合物，R 2是氢原子， 取代或未取代的碳原子数为1〜24的烷基，取代或未取代的碳原子数为1〜24的芳基或取代或未取代的碳原子数为7〜24的芳烷基，R3为取代或未取代的烷基， 碳原子，取代或未取代的碳原子数为6〜24的芳基，取代或未取代的碳原子数为7〜24的芳烷基或烷氧基，k表示0〜4的整数。